ISL70005SEH

Space & Harsh Environment

概览

The ISL70005SEH is radiation hardened dual output Point-of-Load (POL) regulator combining the high efficiency of a synchronous buck regulator with the low noise of a Low Dropout (LDO) regulator. They are suited for systems with 3.3V or 5V power buses and can support continuous output load currents of 3A for the buck regulator and ±1A for the LDO. The buck regulator uses a voltage mode control architecture and switches at a resistor adjustable frequency of 100kHz to 1MHz. Externally adjustable loop compensation allows for an optimum balance between stability and output dynamic performance. The internal synchronous power switches are optimized for high efficiency and excellent thermal performance. The LDO is completely configurable independent of the switching regulator. It uses NMOS pass devices and separate chip bias voltage (L_VCC) to drive its gate, enabling the LDO to operate with a very low voltage at the L_VIN input. The LDO can sink and source up to 1A continuously, making it an ideal choice to power DDR memory. The ISL70005SEH is available in a space-saving 28 Ld ceramic dual flat-pack package or in die form. It is specified to operate across a temperature range of T_A = -55 °C to +125 °C.

ISL70005SEH_ISL73005SEH Functional Diagram

Dual output regulator: Sync buck and LDO
Independent EN, SS and PG indicators
±1% reference voltage
1A current sourcing/sinking capability on LDO
External clock synchronization: 100kHz to 1MHz
Full military temperature range operation
- T_A = -55 °C to +125 °C
- T_J = -55 °C to +150 °C
Radiation acceptance testing - ISL70005SEH
- HDR (50-300rad(Si)/s): 100krad(Si)
- LDR (0.01rad(Si)/s): 75krad(Si)
SEE hardness (see test report)
- No SEB or SEL at LET 86.4MeV•cm²/mg
- SET at LET 86.4MeV•cm²/mg <±3% ΔVOUT
- No SEFI at LET 43MeV•cm²/mg
Electrically screened to DLA SMD 5962-19209

应用

Point-of-load for low power FPGA core
Auxiliary and I/O supply voltages
DDR memory power for VDDQ and VTT rails
Distributed power system of satellite payloads

文档

文档标题	类型	日期
ISL70005SEH, ISL73005SEH Datasheet PDF 1.42 MB	数据手册	2022年7月28日
ISL70005SEHEV2Z Evaluation Board Manual PDF 1.19 MB	手册 - 开发工具	2023年8月22日
Intersil Space Products Brochure PDF 4.85 MB	手册	2023年7月19日
R34AN0006: Linear vs Switching Regulators: Taking Accurate Efficiency Measurements PDF 414 KB	应用文档	2023年3月23日
ISL70005SEHDEMO1Z Demonstration Board Manual PDF 1.38 MB	手册 - 开发工具	2022年11月16日
R34AN0002EU: ISL70005SEH, ISL73005SEH iSim:PE Model vs Silicon Application Report PDF 3.61 MB	应用文档	2022年11月4日
ISL70005SEH, ISL73005SEH SEE Test Report PDF 1.70 MB	报告	2022年11月4日
ISL70005SEH, ISL73005SEH Total Dose Test Report PDF 469 KB	报告	2022年11月1日
Space Grade Power Solution for the Xilinx® XQRKU060 FPGA White Paper PDF 799 KB	白皮书	2022年2月28日
PA20002 - Correction to the Renesas ISL70005SEH and ISL73005SEH Datasheets PDF 206 KB	Product Advisory	2020年1月8日
Standard Microcircuit Drawing 5962-19209 (ISL73005SEH, ISL70005SEH)	其他	2018年8月28日
Wafer by Wafer Low Dose Rate Acceptance White Paper PDF 533 KB	白皮书	2011年8月24日
AN9867: End of Life Derating: A Necessity or Overkill PDF 338 KB	应用文档	1999年11月10日
13 items

设计和开发

软件与工具

Software title	Software type	公司

iSim:PE Offline Simulation Tool iSim Personal Edition (iSim:PE) speeds the design cycle and reduces risk early in any project, identifying parts that can be used in current as well as next-generation designs. 下载 ISL70005SEH, ISL73005SEH DDR Tracking iSim: PE Model ISL70005SEH, ISL73005SEH FPGA Bode iSim: PE Model ISL70005SEH, ISL73005SEH FPGA Load Step iSim: PE Model R34AN0002EU: ISL70005SEH, ISL73005SEH iSim:PE Model vs Silicon Application Report	Simulator	瑞萨电子
1 item

软件下载

文档标题	类型	日期
ISL70005SEHDEMO1Z Design Files ZIP 1.06 MB	PCB设计文档	2019年12月20日
ISL70005SEHEV2Z Design Files ZIP 2.01 MB	PCB设计文档	2019年12月20日
2 items

开发板与套件

ISL70005SEHDEMO1Z

演示

立即订购

Rad Hard, Dual Output Point-of-Load, Integrated Synchronous Buck and LDO Demonstration Board

The ISL70005SEHDEMO1Z demonstration board is designed to demonstrate the performance of the ISL70005SEH radiation hardened, 3A buck regulator and 1A source/sink LDO....

特色文件:

ISL70005SEHEV2Z

评估

立即订购

Rad Hard, Dual Output Point-of-Load, Integrated Synchronous Buck and LDO Evaluation Board

The ISL70005SEHEV2Z evaluation board is designed to evaluate the performance of the ISL70005SEH radiation hardened, 3A buck regulator and 1A source/sink LDO. The same...

特色文件:

ISLRTG4DEMO1Z

参考

立即订购

Renesas Radiation Hardened Power Solution for RTG4 FPGA

Over the last decade satellites and spacecrafts have seen an exponential increase in the need for on-board data processing and storage demands. Additionally, major...

特色文件:

ISLKU060DEMO1Z

参考

立即订购

Renesas Rad Hard Power Management Reference Design for Xilinx's Space Grade XQRKU060

Over the last decade satellites and spacecrafts have seen an exponential increase in the need for on-board data processing and storage demands. Additionally, major...

特色文件:

ISLVERSALDEMO2Z

演示

立即订购

Power Management Reference Design for AMD Versal XQRVC1902

The ISLVERSALDEMO2Z demo board provides the power management for the AMD Xilinx Space Grade Versal ACAP AI Core VC1902 using Renesas' Radiation Hardened Power...

特色文件:

ECAD 模块

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

扩展 ECAD 模块

模型

文档标题	类型	日期
ISL70005SEH, ISL73005SEH DDR Tracking iSim: PE Model SXSCH 553 KB	模型 - iSim	2020年6月2日
ISL70005SEH, ISL73005SEH FPGA Bode iSim: PE Model SXSCH 542 KB	模型 - iSim	2020年6月2日
ISL70005SEH, ISL73005SEH FPGA Load Step iSim: PE Model SXSCH 541 KB	模型 - iSim	2020年6月2日
3 items

产品选择

Processing table

	Pkg. Type	Carrier Type	MOQ	DLA SMD	购买 / 样片
(4) 有效 (0) 无效/NRND/LTB	CFP DIE	Tray	最大值 Minimum order quantity. 最小值 Minimum order quantity.	5962R1920901V9A 5962R1920901VXC	获取样片购买 / 报价
器件号	Logical Operator	Logical Operator		Logical Operator	Logical Operator
ISL70005SEHF/PROTO play_circle有效 memoryPkg. Info spa Env. Documentation view_in_ar PCB Symbol, Footprint, and 3D Model 可提供样品	CFP	Tray	1		获取样片, 购买 / 报价
ISL70005SEHVF play_circle有效 memoryPkg. Info spa Env. Documentation view_in_ar PCB Symbol, Footprint, and 3D Model	CFP	Tray	25	5962R1920901VXC	购买 / 报价
ISL70005SEHVX play_circle有效 memoryPkg. Info view_in_ar PCB Symbol, Footprint, and 3D Model			10	5962R1920901V9A	购买 / 报价
ISL70005SEHX/SAMPLE play_circle有效 memoryPkg. Info view_in_ar PCB Symbol, Footprint, and 3D Model	DIE		5		购买 / 报价

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支持

Space & Harsh Environment FAQs

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联系销售

Renesas 样片

选择下单器件型号:

下单器件型号	样片
ISL70005SEHF/PROTO	Availability Add to request

资源

Rad Hard Test Reports	页面
Low Dose Rate Acceptance Testing	页面
Rad Hard SMD Test Flow	页面
Standard Data Package	页面

设计资源

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Radiation Hardened Dual Output Point-of-Load, Integrated Synchronous Buck and Low Dropout Regulator

概览

简介

特性

应用

应用

文档

设计和开发

软件与工具

软件与工具

软件下载

开发板与套件

开发板与套件

Rad Hard, Dual Output Point-of-Load, Integrated Synchronous Buck and LDO Demonstration Board

特色文件:

Rad Hard, Dual Output Point-of-Load, Integrated Synchronous Buck and LDO Evaluation Board

特色文件:

Renesas Radiation Hardened Power Solution for RTG4 FPGA

特色文件:

Renesas Rad Hard Power Management Reference Design for Xilinx's Space Grade XQRKU060

特色文件:

Power Management Reference Design for AMD Versal XQRVC1902

特色文件:

模型

ECAD 模块

模型

产品选择

Tips for Using This Parametric Table:

支持

Renesas 样片

资源