This is the evaluation board for the Renesas 5P49V59xx VersaClock 5 family of programmable clock generators. With RMS phase jitter less than 0.7 picoseconds over the full 12 kHz to 20 MHz integration range, the device meets the stringent jitter requirements of PCI ExpressR Gen 1/2/3, USB 3.0, and 1G/10G Ethernet. VersaClock 5 ideal for high-performance consumer, networking, industrial, computing, and data-communications applications.
Note that the evaluation board for the VersaClock 5 family is based around the 5P49V5901, which contains a superset of functionality for the other family members.
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分類 | タイトル | 日時 |
マニュアル-ハードウェア | PDF 725 KB | |
マニュアル-ソフトウェア | PDF 2.04 MB | |
回路図 | PDF 844 KB | |
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This video will show you how to program VersaClock® 5 Low Power Programmable Clock Generator.
This video will show you how to program VersaClock® 5 Low Power Programmable Clock Generator.