RX Application Binary Interface for GCC

Glossary

Aggregate: struct and union in C.

Scalar: antonym of aggregate, i.e., as char, short, and int.

Frame: stack space pushed for a function invocation.

Byte Ordering:

· RX has big-endian and little-endian mode.

· These endian is used to access data.

· The instruction fetch is always little endian.

· In big endian setting, code and data should not co-exist in a single section.

· In each instruction, 2-byte, 3-byte, 4-byte operands are always stored in little endian byte

order.

Stack Layout:

· Each called function creates and deletes its own frame.

· The stack grows from high address to low address.

· The top of stack (i.e., the lowest address) is always referenced by a register known as the stack pointer, SP (R0).

· The stack pointer is always 4 byte aligned.

· The topmost frame is the frame of the currently executing function. When a function is called, it allocates its own frame by decreasing SP; on exit, it deletes the frame by restoring SP to the value upon entry. Each function is responsible for creating and deleting its own frame. Not all functions will require a stack frame and a stack frame is allocated only if required.

ELF Header Information for RX:

Field name

Size (bytes)

Value

Meaning

e_machine

0xad

CPU Type: RX

e_flags

0x0

Processor-specific flags

e_machine: 0xad:RX

0x00:RX600

0x01:RX600(FPU)

0x02:RX600(DSP)

0x03:RX600(FPU,DSP)

　　　　 0x10:RX200

0x11:RX200(FPU)

0x12:RX200(DSP)

0x13:RX200(FPU,DSP)

#FPU stands for Floating-point processing unit.

#DSP stands for Digital Signal Processing.

Data type sizes and alignments

The following table shows the size and alignment for all data types:

Type	Size (bytes)	Alignment (bytes)	Sign(integral type)
char	1 byte	1 byte	unsigned
signed char	1 byte	1 byte	signed
unsigned char	1 byte	1 byte	unsigned
int	4 byte	4 byte	signed
signed int	4 byte	4 byte	signed
unsigned int	4 byte	4 byte	unsigned
short	2 byte	2 byte	signed
signed short	2 byte	2 byte	signed
unsigned short	2 byte	2 byte	unsigned
long	4 byte	4 byte	signed
signed long	4 byte	4 byte	signed
unsigned long	4 byte	4 byte	unsigned
long long	8 byte	4 byte	signed
signed long long	8 byte	4 byte	signed
unsigned long long	8 byte	4 byte	unsigned
float	4 byte	4 byte	IEEE Single Precision
Double^#1	4 byte	4 byte	IEEE Single Precision
long Double^#1	4 byte	4 byte	IEEE Single Precision
size_t	4 byte	4 byte	unsigned
ptrdiff_t	4 byte	4 byte	signed
enum	4 byte	4 byte	signed
bool	1 byte	1 byte	signed
Pointer Types	4 byte	4 byte	unsigned

#1 Size of double can be set to 64-bit using compiler option "-m64bit-doubles"

Register Usage:

· A register is Caller Save if its value is not guaranteed to be preserved across function calls.

· A register is Callee Save if its value is guaranteed to be preserved across calls. The implication is that the callee will either not modify the register or else save it to memory.

· A register is Reserved if it has some special use required either by software convention or by the hardware. They are not used by the compiler.

The registers and there usage is given below:

R0: Stack Pointer, SP, callee saves

R1-R4: Used to pass parameters and return values, callers save

R5: Caller save

R6-R13: Callee save

R14: Caller save

R15: Pointer for struct return value, caller save

ACC: Accumulator Register, caller save (ACC register must be saved by interrupt routines if

the system uses any DSP instruction. In the GNURX compiler, you can use the compiler option '-msave-acc-in-interrupts' to specify whether interrupt functions should save and restore the accumulator register. ACC register is not guaranteed across function call)

FINTV: Fast interrupt vector register (Special Register)

BPSW: Backup PSW (Special Register)

INTB: Interrupt table register (Special Register)

BPC: Backup Program Counter (Special Register)

CPEN: CPU Bus Error Notification Control (Special Register)

Function linkage and parameter passing
Parameter Passing

Registers R1-R4 and stack are used for parameter passing from left to right in the increasing order of register number.

a. If long long, double or long double 8-byte scalar type is used two registers are used .If only one register is remaining, it is not allocated to register. Lower 4 bytes are allocated to the register with smaller number; upper 4 bytes are allocated to the register with larger number. This allocation is not affected by the CPU endian

b. If int, long, char, short, pointer, enum, size_t, ptrdiff_t, and float types (when double is 4-byte, double and long double also) scalar type within 4-byte is used one register is used. When the size is less than 4-byte, it is loaded to register after integral promotion.

c. For struct (or union) with size not larger than 4*(number of remaining parameter registers), the number of register used is the size of the struct (or union) divided by 4.

Return Values

The scalar function value no larger than 8 bytes in size is returned in R1 and R2 and values no larger than 4 bytes are returned in R1.

If its size is within 16 bytes and the size of multiple of 4, its memory image is set to R1, R2, R3, R4, 4 bytes each, in the ascending order of memory address.

If its size is larger than 16 bytes or it is not multiple of 4, the return value is copied to the area pointed by R15 before function call.

Registers Reserved for High-speed Interrupt

Starting from R13, up to 4 contiguous registers (maximum R10-R13) may be reserved for high-speed interrupt. These registers may be used in interrupt routines without any save/restore, and so cannot be used by normal C program.

Bit Field

Bit fields are supported for char, short, int, long, long long (and their signed or unsigned versions) and enum. The "plain" types without signed or unsigned are interpreted as unsigned type. Enum types are interpreted as signed type.

Bit field members are allocated from LSB to MSB.

Structure Alignment

Struct members are allocated from lower address to higher address, according to its alignment, in their declaration order. The size of a struct is always the multiple of its alignment.

Position-independent code and data

Position-independence is to enable easy downloading and updating of application programs in the flash memory.

Each downloadable module is position independent. A module, when copied to any position in the flash memory area, is immediately executable.

a. The address of function is dynamically calculated based on PC (Program Counter)

b. RAM data access can use absolute address

c. ROM data consist of the const section and compiler-dependent sections

d. ROM data consists of the const sections and other compiler-dependent sections to be located in the ROM.

e. Whether a data is allocated in ROM or RAM is determined by whether the data has const qualifier or not. If the const qualifier is not used consistently among the files, the behavior is undefined.

f. Address of functions or ROM data cannot be used to initialize static variables.

Shared Library

Shared library is desirable to reduce the size of application programs. Shared library is position-dependent code (or data) located in the fixed memory area in the ROM.

a. When building position-dependent library code from position-independent application code the table of entry point labels and their address is generated.

Example:

Shared library entry table:

Function Address

A 0X1000

B 0X1020

C 0X1040

b. Following assembly code is generated from the above table, and linked to the application.

Linkage code:

_A:

MOV #0x1000,R14

JMP R14

_B:

MOV #0x1020,R14

JMP R14

_C:

MOV #0x1040,R14

JMP R14

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