(NETLIST)
(FOR DRAWING: C:/PSD_Data/projects/isl78083_demo_board_reva/ISL78083 DEMO_BOARD-06-05-2018_final.brd)
(GENERATED BY: ALLEGRO 16.6 S085 (v16-6-112GP))
(Tue Jun 05 11:39:28 2018)
$PACKAGES
'CAPAE_260X228_PANASONIC_SIZE-D' ! SM_POLCAP_2_CAPAE_260X228_PANAS ,
        ! DNP_22uF ; C7 
CAP_0402 ! 'C_2_CAP_0402_0.1UF' ! '0.1uF' ; C3 C4 C9 C10 C15 
CAP_0402 ! 'C_2_CAP_0402_0.22UF' ! '0.22uF' ; C1 
CAP_0805 ! C_2_CAP_0805_1UF ! 1uF ; C14 
CAP_0805 ! 'C_2_CAP_0805_2.2UF' ! '2.2uF' ; C8 
CAP_0805 ! 'C_2_CAP_0805_4.7UF' ! '4.7uF' ; C13 
CAP_1210 ! C_2_CAP_1210_10UF ! 10uF ; C2 C5 C11 
CAP_1210 ! C_2_CAP_1210_DNP ! DNP ; C6 C12 
'CONN-1X3' ! 'JUMPER_3_CONN-1X3_JUMPER-3_?' ! 'JUMPER-3' ; J1 J3 
CONN2 ! JUMPER_7_CONN2_JUMPER_2_JUMPER2 ! JUMPER_2 ; J2 
IND_TOKO_DFE252012F ! 'TOKO-1608-SERIES_IND_TOKO_DFE25' ! '4.7uH' ; L1 
IND_TOKO_DFE252012F ! 'TOKO-1608-SERIES_IND_TOKO_DFE_1' ! '1.5uH' ; L2 L3 
MTP500X ! 'T POINT R_MTP500X_EN' ! EN ; TP11 
MTP500X ! 'T POINT R_MTP500X_EN_LV' ! EN_LV ; TP12 
MTP500X ! 'T POINT R_MTP500X_GPIO/PGOOD1' ! GPIO/PGOOD1 ; TP13 
MTP500X ! 'T POINT R_MTP500X_RSTB' ! RSTB ; TP16 
MTP500X ! 'T POINT R_MTP500X_SCL/PGOOD4' ! SCL/PGOOD4 ; TP15 
MTP500X ! 'T POINT R_MTP500X_SDA/PGOOD2/3' ! SDA/PGOOD2/3 ; TP14 
QFN24_157X157_197_EPH ! ISL78268_12_QFN24_157X157_197_E ! ISL78268 ; U1 
RES_0402 ! 'SM_RES_2_RES_0402_0_H2511-01003' ! 0 ; R1 
RES_0603 ! 'SM_RES_2_RES_0603_0_H2511-01003' ! 0 ; R2 R4 R10 R11 R12 R13 ,
        R18 R19 R20 R23 R25 
RES_0603 ! 'SM_RES_2_RES_0603_10K_H2511-010' ! 10K ; R5 R6 R7 R8 R14 
RES_0603 ! 'SM_RES_2_RES_0603_8.25K_H2511-0' ! '8.25K' ; R22 
RES_0603 ! 'SM_RES_2_RES_0603_DNP_H2511-010' ! DNP ; R3 R9 R15 R16 R17 R21 ,
        R24 
SOT23 ! 2N7002_SOT23_2N7002 ! 2N7002 ; Q1 Q2 
'TP-150C100P-RTP' ! 'KEYSTONE-PN-1514-150P100H_TP-15' ,
        ! 'KEYSTONE-PN-1514-150p100h' ; TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 ,
        TP10 
USB_CONN_20 ! 'USBAPPLE-1_4_USB_CONN_20_I2C' ! I2C ; J4 
$NETS
BOOT1 ; R1.2 U1.5 
BOOTR ; C1.2 R1.1 
BYP ; C13.2 J3.1 R3.1 R9.2 U1.12 
CFG1 ; R9.1 R11.1 U1.2 
EN ; J1.2 J2.2 TP11.1 U1.7 
EN_BYP_CTL ; Q2.1 R25.2 
EN_CTL ; Q1.1 R18.2 
EN_I2C ; J2.1 Q1.3 R14.1 R22.2 
EN_LV ; J3.2 R19.2 TP12.1 U1.3 
FB2 ; C4.2 C5.1 C6.1 L2.2 TP5.1 U1.20 
FB3 ; C10.2 C11.1 C12.1 L3.2 TP6.1 U1.21 
GND ; C2.2 C3.1 C4.1 C5.2 C6.2 C7.2 C8.2 C9.1 C10.1 C11.2 C12.2 C13.1 C14.2 ,
        C15.1 J1.3 J3.3 J4.3 J4.15 Q1.2 Q2.2 R11.2 R20.2 R23.2 TP2.1 TP3.1 ,
        TP7.1 TP8.1 TP10.1 U1.10 U1.11 U1.22 U1.25 
GPIO/PGOOD1 ; R6.1 R13.1 TP13.1 U1.15 
LDOOUT4 ; C14.1 TP9.1 U1.19 
MCU_3V3 ; J4.1 R4.2 R14.2 
N4575301 ; Q2.3 R22.1 
N4582210 ; J4.19 R16.1 
'P0.4' ; J4.4 R12.2 
'P0.5' ; J4.2 R10.2 
'P1.0' ; J4.6 R13.2 
'P1.1' ; J4.8 R15.2 
'P1.2' ; J4.10 R17.2 
'P1.3' ; J4.12 R20.1 R21.2 
'P1.4' ; J4.14 R23.1 R24.2 
'P1.5' ; J4.16 R25.1 
'P1.6' ; J4.18 R19.1 
'P1.7' ; J4.20 R18.1 
PHASE1 ; C1.1 L1.2 U1.6 
PHASE2 ; L2.1 U1.24 
PHASE3 ; L3.1 U1.23 
RSTB ; R16.2 TP16.1 U1.16 
SCL/PGOOD4 ; R5.1 R8.1 R10.1 R17.1 TP15.1 U1.13 
SDA/PGOOD2/3 ; R7.1 R12.1 R15.1 TP14.1 U1.14 
VIN1 ; C7.1 C8.1 C9.2 R2.1 TP4.1 U1.8 
VINR ; J1.1 R2.2 
VOUT1 ; C2.1 C3.2 C15.2 L1.1 TP1.1 U1.1 U1.17 U1.18 
VPULLUP ; R3.2 R4.1 R5.2 R6.2 R7.2 R8.2 R21.1 R24.1 
$NETS
$A_PROPERTIES
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):en_i2c'; 'EN_I2C'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.1\'; 'P1.1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.2\'; 'P1.2'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.3\'; 'P1.3'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.4\'; 'P1.4'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):n4582210'; 'N4582210'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):en_byp_ctl'; 'EN_BYP_CTL'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):en_ctl'; 'EN_CTL'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):n4575301'; 'N4575301'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.5\'; 'P1.5'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):vinr'; 'VINR'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.7\'; 'P1.7'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.6\'; 'P1.6'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p1.0\'; 'P1.0'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):vpullup'; 'VPULLUP'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):fb3'; 'FB3'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):fb2'; 'FB2'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):en_lv'; 'EN_LV'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):cfg1'; 'CFG1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):byp'; 'BYP'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):bootr'; 'BOOTR'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):phase1'; 'PHASE1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):phase2'; 'PHASE2'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):phase3'; 'PHASE3'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):vout1'; 'VOUT1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):boot1'; 'BOOT1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):vin1'; 'VIN1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):rstb'; 'RSTB'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):mcu_3v3'; 'MCU_3V3'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\gpio/pgood1\'; 'GPIO/PGOOD1'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\sda/pgood2/3\'; 'SDA/PGOOD2/3'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p0.4\'; 'P0.4'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\scl/pgood4\'; 'SCL/PGOOD4'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):\p0.5\'; 'P0.5'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):ldoout4'; 'LDOOUT4'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):en'; 'EN'
LOGICAL_PATH '@\isl78083 customer evb 04june2018 - new ref des\.schematic1(sch_1):gnd'; 'GND'
SN_BONDPAD_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_TESTVIA_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_TESTPIN_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SMDPIN_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_TESTVIA_TO_THRUPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_HOLE_TO_VIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BONDPAD_TO_BBV_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_BBV_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_TESTPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_SMDPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_THRUPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BONDPAD_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_TESTVIA_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_THRUVIA_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_TESTPIN_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SMDPIN_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_THRUPIN_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_HOLE_TO_SHAPE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BONDPAD_TO_SHAPE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SHAPE_TO_SHAPE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SHAPE_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_SHAPE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SHAPE_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SHAPE_TO_TESTPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_SHAPE_TO_SMDPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_THRUPIN_TO_SHAPE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_HOLE_TO_LINE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BONDPAD_TO_LINE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_SHAPE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_TESTVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_BBV_TO_LINE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_THRUVIA_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_TESTPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_SMDPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_THRUPIN_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
SN_LINE_TO_LINE_SPACING '5 MIL'; 'GND' 'EN' 'LDOOUT4' 'P0.5' 'SCL/PGOOD4' 'P0.4',
           'SDA/PGOOD2/3' 'GPIO/PGOOD1' 'MCU_3V3' 'RSTB' 'VIN1' 'BOOT1',
           'VOUT1' 'PHASE3' 'PHASE2' 'PHASE1' 'BOOTR' 'BYP',
           'CFG1' 'EN_LV' 'FB2' 'FB3' 'VPULLUP' 'P1.0',
           'P1.6' 'P1.7'
$END
