Synergy Software Package User's Manual
Clock Initialization

Macros

#define CGC_SYS_CLOCK_FREQ_NO_RAM_WAITS   (60000000U)
 
#define CGC_SYS_CLOCK_FREQ_ONE_ROM_WAITS   (40000000U)
 
#define CGC_SYS_CLOCK_FREQ_TWO_ROM_WAITS   (80000000U)
 
#define CGC_SRAM_ZERO_WAIT_CYCLES   (0U)
 Specify zero wait states for SRAM.
 
#define CGC_SRAM_ONE_WAIT_CYCLES   (1U)
 Specify one wait states for SRAM.
 

Functions

void bsp_clock_init (void)
 Sets up system clocks. More...
 
uint32_t bsp_cpu_clock_get (void)
 Returns frequency of CPU clock in Hz. More...
 
__STATIC_INLINE void bsp_clocks_rom_wait_set (uint8_t setting)
 This function sets the value of the ROMWT register which is used to specify wait states required when accessing Flash ROM. More...
 
__STATIC_INLINE uint32_t bsp_clocks_rom_wait_get (void)
 This function gets the value of the ROMWT register. More...
 
__STATIC_INLINE void bsp_clocks_sram_wait_set (uint32_t setting)
 This function sets the RAM wait state settings for the SRAM0, SRAM0 ECC and SRAM1 RAM memory. More...
 
ssp_err_t bsp_clock_set_callback (bsp_clock_set_callback_args_t *p_args)
 

Detailed Description

Functions in this file configure the system clocks based upon the macros in bsp_clock_cfg.h.

Macro Definition Documentation

◆ CGC_SYS_CLOCK_FREQ_NO_RAM_WAITS

#define CGC_SYS_CLOCK_FREQ_NO_RAM_WAITS   (60000000U)

SRAM requires 1 wait state be inserted at ICLK > 60 MHz. SRAMHS is always no wait state

◆ CGC_SYS_CLOCK_FREQ_ONE_ROM_WAITS

#define CGC_SYS_CLOCK_FREQ_ONE_ROM_WAITS   (40000000U)

FLASH requires 1 wait state be inserted when (40 MHz < ICLK <= 80 MHz)

◆ CGC_SYS_CLOCK_FREQ_TWO_ROM_WAITS

#define CGC_SYS_CLOCK_FREQ_TWO_ROM_WAITS   (80000000U)

FLASH requires 2 wait states be inserted when (80 MHz < ICLK <= 120 MHz)

Function Documentation

◆ bsp_clock_init()

void bsp_clock_init ( void  )

Sets up system clocks.

MOCO is default clock out of reset. Enable new clock if chosen.

Need to start PLL source clock and let it stabilize before starting PLL

Set PLL Divider.

Set PLL Multiplier.

Set PLL Source clock.

Wait for PLL clock source to stabilize

If the system clock has failed to start call the unrecoverable error handler.

Enable ROM cache

MOCO, LOCO, and subclock do not have stabilization flags that can be checked.

Wait for clock source to stabilize

Set which clock to use for system clock and divisors for all system clocks.

If the system clock has failed to be configured properly call the unrecoverable error handler.

Set USB clock divisor.

Configure BCLK

Configure SDRAM Clock

◆ bsp_clock_set_callback()

ssp_err_t bsp_clock_set_callback ( bsp_clock_set_callback_args_t *  p_args)

Wait states for low speed RAM (SRAM0 and SRAM1)

No wait: ICLK <= 60 MHz

1 wait: ICLK > 60 MHz

Calculate the Wait states for ROM

Set the wait state BEFORE we change iclk

In this case we need to set the wait state AFTER we change iclk

◆ bsp_clocks_rom_wait_get()

__STATIC_INLINE uint32_t bsp_clocks_rom_wait_get ( void  )

This function gets the value of the ROMWT register.

Return values
MEMWAITsetting

◆ bsp_clocks_rom_wait_set()

__STATIC_INLINE void bsp_clocks_rom_wait_set ( uint8_t  setting)

This function sets the value of the ROMWT register which is used to specify wait states required when accessing Flash ROM.

Parameters
[in]settingThe number of wait states to be used.
Return values
none

◆ bsp_clocks_sram_wait_set()

__STATIC_INLINE void bsp_clocks_sram_wait_set ( uint32_t  setting)

This function sets the RAM wait state settings for the SRAM0, SRAM0 ECC and SRAM1 RAM memory.

Parameters
[in]settingThe number of wait states to be used.
Return values
none

◆ bsp_cpu_clock_get()

uint32_t bsp_cpu_clock_get ( void  )

Returns frequency of CPU clock in Hz.

Return values
Frequencyof the CPU in Hertz