Driver for Low Power Modes. More...

Data Structures
struct	lpmv2_mcu_cfg_t

Enumerations
enum	lpmv2_snooze_request_t { , LPMV2_SNOOZE_REQUEST_ACMPLP = 0x00800000U , LPMV2_SNOOZE_REQUEST_RXD0_FALLING = 0x00000000U, LPMV2_SNOOZE_REQUEST_IRQ0 = 0x00000001U, LPMV2_SNOOZE_REQUEST_IRQ1 = 0x00000002U, LPMV2_SNOOZE_REQUEST_IRQ2 = 0x00000004U, LPMV2_SNOOZE_REQUEST_IRQ3 = 0x00000008U, LPMV2_SNOOZE_REQUEST_IRQ4 = 0x00000010U, LPMV2_SNOOZE_REQUEST_IRQ5 = 0x00000020U, LPMV2_SNOOZE_REQUEST_IRQ6 = 0x00000040U, LPMV2_SNOOZE_REQUEST_IRQ7 = 0x00000080U, LPMV2_SNOOZE_REQUEST_IRQ8 = 0x00000100U, LPMV2_SNOOZE_REQUEST_IRQ9 = 0x00000200U, LPMV2_SNOOZE_REQUEST_IRQ10 = 0x00000400U, LPMV2_SNOOZE_REQUEST_IRQ11 = 0x00000800U, LPMV2_SNOOZE_REQUEST_IRQ12 = 0x00001000U, LPMV2_SNOOZE_REQUEST_IRQ13 = 0x00002000U, LPMV2_SNOOZE_REQUEST_IRQ14 = 0x00004000U, LPMV2_SNOOZE_REQUEST_IRQ15 = 0x00008000U, LPMV2_SNOOZE_REQUEST_KEY = 0x00020000U, LPMV2_SNOOZE_REQUEST_ACMPHS0 = 0x00400000U, LPMV2_SNOOZE_REQUEST_RTC_ALARM = 0x01000000U, LPMV2_SNOOZE_REQUEST_RTC_PERIOD = 0x02000000U, LPMV2_SNOOZE_REQUEST_AGT1_UNDERFLOW = 0x10000000U, LPMV2_SNOOZE_REQUEST_AGT1_COMPARE_A = 0x20000000U, LPMV2_SNOOZE_REQUEST_AGT1_COMPARE_B = 0x40000000U }

enum	lpmv2_snooze_end_t { , LPMV2_SNOOZE_END_SCI0_ADDRESS_MISMATCH = 0x80U , LPMV2_SNOOZE_END_STANDBY_WAKE_SOURCES = 0x00U, LPMV2_SNOOZE_END_AGT1_UNDERFLOW = 0x01U, LPMV2_SNOOZE_END_DTC_TRANS_COMPLETE = 0x02U, LPMV2_SNOOZE_END_DTC_TRANS_COMPLETE_NEGATED = 0x04U, LPMV2_SNOOZE_END_ADC0_COMPARE_MATCH = 0x08U, LPMV2_SNOOZE_END_ADC0_COMPARE_MISMATCH = 0x10U, LPMV2_SNOOZE_END_ADC1_COMPARE_MATCH = 0x20U, LPMV2_SNOOZE_END_ADC1_COMPARE_MISMATCH = 0x40U, LPMV2_SNOOZE_END_SCI0_ADDRESS_MATCH = 0x80U }

enum	lpmv2_snooze_cancel_t { , LPMV2_SNOOZE_CANCEL_SOURCE_ADC0_WCMPM = (79), LPMV2_SNOOZE_CANCEL_SOURCE_ADC0_WCMPUM = (80), LPMV2_SNOOZE_CANCEL_SOURCE_ADC1_WCMPM = (85), LPMV2_SNOOZE_CANCEL_SOURCE_ADC1_WCMPUM = (86), LPMV2_SNOOZE_CANCEL_SOURCE_SCI0_AM = (376), LPMV2_SNOOZE_CANCEL_SOURCE_SCI0_RXI_OR_ERI = (377), LPMV2_SNOOZE_CANCEL_SOURCE_DTC_COMPLETE = (41), LPMV2_SNOOZE_CANCEL_SOURCE_DOC_DOPCI = (134), LPMV2_SNOOZE_CANCEL_SOURCE_CTSU_CTSUFN = (18) }

enum	lpmv2_snooze_dtc_t { , LPMV2_SNOOZE_DTC_DISABLE = 0U, LPMV2_SNOOZE_DTC_ENABLE = 1U }

enum	lpmv2_standby_wake_source_t { , LPMV2_STANDBY_WAKE_SOURCE_ACMPLP0 = 0x00800000U , LPMV2_STANDBY_WAKE_SOURCE_VBATT = 0x00100000U , LPMV2_STANDBY_WAKE_SOURCE_IRQ0 = 0x00000001U, LPMV2_STANDBY_WAKE_SOURCE_IRQ1 = 0x00000002U, LPMV2_STANDBY_WAKE_SOURCE_IRQ2 = 0x00000004U, LPMV2_STANDBY_WAKE_SOURCE_IRQ3 = 0x00000008U, LPMV2_STANDBY_WAKE_SOURCE_IRQ4 = 0x00000010U, LPMV2_STANDBY_WAKE_SOURCE_IRQ5 = 0x00000020U, LPMV2_STANDBY_WAKE_SOURCE_IRQ6 = 0x00000040U, LPMV2_STANDBY_WAKE_SOURCE_IRQ7 = 0x00000080U, LPMV2_STANDBY_WAKE_SOURCE_IRQ8 = 0x00000100U, LPMV2_STANDBY_WAKE_SOURCE_IRQ9 = 0x00000200U, LPMV2_STANDBY_WAKE_SOURCE_IRQ10 = 0x00000400U, LPMV2_STANDBY_WAKE_SOURCE_IRQ11 = 0x00000800U, LPMV2_STANDBY_WAKE_SOURCE_IRQ12 = 0x00001000U, LPMV2_STANDBY_WAKE_SOURCE_IRQ13 = 0x00002000U, LPMV2_STANDBY_WAKE_SOURCE_IRQ14 = 0x00004000U, LPMV2_STANDBY_WAKE_SOURCE_IRQ15 = 0x00008000U, LPMV2_STANDBY_WAKE_SOURCE_IWDT = 0x00010000U, LPMV2_STANDBY_WAKE_SOURCE_KEY = 0x00020000U, LPMV2_STANDBY_WAKE_SOURCE_LVD1 = 0x00040000U, LPMV2_STANDBY_WAKE_SOURCE_LVD2 = 0x00080000U, LPMV2_STANDBY_WAKE_SOURCE_ACMPHS0 = 0x00400000U, LPMV2_STANDBY_WAKE_SOURCE_RTCALM = 0x01000000U, LPMV2_STANDBY_WAKE_SOURCE_RTCPRD = 0x02000000U, LPMV2_STANDBY_WAKE_SOURCE_USBHS = 0x04000000U, LPMV2_STANDBY_WAKE_SOURCE_USBFS = 0x08000000U, LPMV2_STANDBY_WAKE_SOURCE_AGT1UD = 0x10000000U, LPMV2_STANDBY_WAKE_SOURCE_AGT1CA = 0x20000000U, LPMV2_STANDBY_WAKE_SOURCE_AGT1CB = 0x40000000U, LPMV2_STANDBY_WAKE_SOURCE_IIC0 = 0x80000000U }

enum	lpmv2_io_port_t { , LPMV2_IO_PORT_RESET = 0U, LPMV2_IO_PORT_NO_CHANGE = 1U }

enum	lpmv2_power_supply_t { , LPMV2_POWER_SUPPLY_DEEPCUT0 = 0U, LPMV2_POWER_SUPPLY_DEEPCUT1 = 1U, LPMV2_POWER_SUPPLY_DEEPCUT3 = 3UL }

enum	lpmv2_deep_standby_cancel_edge_t { , LPMV2_DEEP_STANDBY_CANCEL_SOURCE_EDGE_NONE = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ0_RISING = 0x00000001U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ0_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ1_RISING = 0x00000002U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ1_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ2_RISING = 0x00000004U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ2_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ3_RISING = 0x00000008U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ3_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ4_RISING = 0x00000010U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ4_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ5_RISING = 0x00000020U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ5_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ6_RISING = 0x00000040U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ6_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ7_RISING = 0x00000080U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ7_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ8_RISING = 0x00000100U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ8_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ9_RISING = 0x00000200U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ9_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ10_RISING = 0x00000400U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ10_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ11_RISING = 0x00000800U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ11_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ12_RISING = 0x00001000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ12_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ13_RISING = 0x00002000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ13_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ14_RISING = 0x00004000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ14_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ15_RISING = 0x00008000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ15_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD1_RISING = 0x00010000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD1_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD2_RISING = 0x00020000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD2_FALLING = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_NMI_RISING = 0x00100000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_NMI_FALLING = 0U }

enum	lpmv2_deep_standby_cancel_source_t { , LPMV2_DEEP_STANDBY_CANCEL_SOURCE_RESET_ONLY = 0U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ0 = 0x00000001U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ1 = 0x00000002U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ2 = 0x00000004U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ3 = 0x00000008U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ4 = 0x00000010U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ5 = 0x00000020U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ6 = 0x00000040U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ7 = 0x00000080U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ8 = 0x00000100U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ9 = 0x00000200U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ10 = 0x00000400U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ11 = 0x00000800U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ12 = 0x00001000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ13 = 0x00002000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ14 = 0x00004000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ15 = 0x00008000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD1 = 0x00010000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD2 = 0x00020000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_RTC_INTERVAL = 0x00040000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_RTC_ALARM = 0x00080000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_NMI = 0x00100000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_USBFS = 0x01000000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_USBHS = 0x02000000U, LPMV2_DEEP_STANDBY_CANCEL_SOURCE_AGT1 = 0x04000000U }

enum	lpmv2_output_port_enable_t { , LPMV2_OUTPUT_PORT_ENABLE_HIGH_IMPEDANCE = 0U, LPMV2_OUTPUT_PORT_ENABLE_RETAIN = 1U }

Functions
ssp_err_t	R_LPMV2_VersionGet (ssp_version_t *const p_version)
	Get the driver version based on compile time macros. More...

ssp_err_t	R_LPMV2_Init (void)
	Perform any necessary initialization. More...

ssp_err_t	R_LPMV2_LowPowerConfigure (lpmv2_cfg_t const *const p_cfg)
	Configure a low power mode. More...

ssp_err_t	R_LPMV2_LowPowerModeEnter (void)
	Enter low power mode (sleep/standby/deep standby) using WFI macro. More...

ssp_err_t	R_LPMV2_ClearIOKeep (void)
	Clear the IOKEEP bit after deep software stand by. More...

Detailed Description

Driver for Low Power Modes.

The LPMV2 driver supports low power modes deep standby, standby, sleep, and snooze.

Note: Not all low power modes are available on all MCU's.

Enumeration Type Documentation

◆ lpmv2_deep_standby_cancel_edge_t

enum lpmv2_deep_standby_cancel_edge_t

Deep Standby Interrupt Edge

Enumerator
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_EDGE_NONE	No options for a deep standby cancel source (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ0_RISING	IRQ0-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ0_FALLING	IRQ0-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ1_RISING	IRQ1-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ1_FALLING	IRQ1-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ2_RISING	IRQ2-DS Pin Rising Edge (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ2_FALLING	IRQ2-DS Pin Falling Edge (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ3_RISING	IRQ3-DS Pin Rising Edge (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ3_FALLING	IRQ3-DS Pin Falling Edge (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ4_RISING	IRQ4-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ4_FALLING	IRQ4-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ5_RISING	IRQ5-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ5_FALLING	IRQ5-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ6_RISING	IRQ6-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ6_FALLING	IRQ6-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ7_RISING	IRQ7-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ7_FALLING	IRQ7-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ8_RISING	IRQ8-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ8_FALLING	IRQ8-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ9_RISING	IRQ9-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ9_FALLING	IRQ9-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ10_RISING	IRQ10-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ10_FALLING	IRQ10-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ11_RISING	IRQ11-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ11_FALLING	IRQ11-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ12_RISING	IRQ12-DS Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ12_FALLING	IRQ12-DS Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ13_RISING	IRQ13-DS Pin Rising Edge (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ13_FALLING	IRQ13-DS Pin Falling Edge (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ14_RISING	IRQ14-DS Pin Rising Edge (S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ14_FALLING	IRQ14-DS Pin Falling Edge (S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ15_RISING	IRQ15-DS Pin Rising Edge (S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ15_FALLING	IRQ15-DS Pin Falling Edge (S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD1_RISING	LVD1 Rising Slope (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD1_FALLING	LVD1 Falling Slope (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD2_RISING	LVD2 Rising Slope (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD2_FALLING	LVD2 Falling Slope (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_NMI_RISING	NMI Pin Rising Edge (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_NMI_FALLING	NMI Pin Falling Edge (S5D3, S5D5, S5D9, S7G2).

◆ lpmv2_deep_standby_cancel_source_t

enum lpmv2_deep_standby_cancel_source_t

Deep Standby cancel sources

Enumerator
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_RESET_ONLY	Cancel deep standby only by reset (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ0	IRQ0 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ1	IRQ1 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ2	IRQ2 (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ3	IRQ3 (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ4	IRQ4 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ5	IRQ5 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ6	IRQ6 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ7	IRQ7 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ8	IRQ8 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ9	IRQ9 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ10	IRQ10 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ11	IRQ11 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ12	IRQ12 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ13	IRQ13 (S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ14	IRQ14 (S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_IRQ15	IRQ15 (S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD1	LVD1 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_LVD2	LVD2 (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_RTC_INTERVAL	RTC Interval Interrupt (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_RTC_ALARM	RTC Alarm Interrupt (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_NMI	NMI (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_USBFS	USBFS Suspend/Resume (S5D3, S5D5, S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_USBHS	USBHS Suspend/Resume (S5D9, S7G2).
LPMV2_DEEP_STANDBY_CANCEL_SOURCE_AGT1	AGT1 Underflow (S5D3, S5D5, S5D9, S7G2).

◆ lpmv2_io_port_t

enum lpmv2_io_port_t

I/O port state after Deep Software Standby mode (S5D3, S5D5, S5D9, S7G2)

Enumerator
LPMV2_IO_PORT_RESET	When the Deep Software Standby mode is canceled, the I/O ports are in the reset state.
LPMV2_IO_PORT_NO_CHANGE	When the Deep Software Standby mode is canceled, the I/O ports are in the same state as in the Deep Software Standby mode.

◆ lpmv2_output_port_enable_t

enum lpmv2_output_port_enable_t

Output port enable (S3A1, S3A3, S3A7, S5D3, S5D5, S5D9, S7G2)

Enumerator
LPMV2_OUTPUT_PORT_ENABLE_HIGH_IMPEDANCE	0: In Software Standby Mode or Deep Software Standby Mode, the address output pins, data output pins, and other bus control signal output pins are set to the high-impedance state. In Snooze, the status of the address bus and bus control signals are same as before entering Software Standby Mode.
LPMV2_OUTPUT_PORT_ENABLE_RETAIN	1: In Software Standby Mode, the address output pins, data output pins, and other bus control signal output pins retain the output state.

◆ lpmv2_power_supply_t

enum lpmv2_power_supply_t

Power supply control (S5D3, S5D5, S5D9, S7G2)

Enumerator
LPMV2_POWER_SUPPLY_DEEPCUT0	Power to the standby RAM, Low-speed on-chip oscillator, AGTn, and USBFS/HS resume detecting unit is supplied in deep software standby mode.
LPMV2_POWER_SUPPLY_DEEPCUT1	Power to the standby RAM, Low-speed on-chip oscillator, AGTn, and USBFS/HS resume detecting unit is not supplied in deep software standby mode.
LPMV2_POWER_SUPPLY_DEEPCUT3	Power to the standby RAM, Low-speed on-chip oscillator, AGTn, and USBFS/HS resume detecting unit is not supplied in deep software standby mode. In addition, LVD is disabled and the low power function in a poweron reset circuit is enabled.

◆ lpmv2_snooze_cancel_t

enum lpmv2_snooze_cancel_t

Snooze cancel control

Enumerator
LPMV2_SNOOZE_CANCEL_SOURCE_ADC0_WCMPM	ADC Channel 0 window compare match (all Synergy MCUs).
LPMV2_SNOOZE_CANCEL_SOURCE_ADC0_WCMPUM	ADC Channel 0 window compare mismatch (all Synergy MCUs).
LPMV2_SNOOZE_CANCEL_SOURCE_ADC1_WCMPM	ADC Channel 1 window compare match (S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_CANCEL_SOURCE_ADC1_WCMPUM	ADC Channel 1 window compare mismatch (S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_CANCEL_SOURCE_SCI0_AM	SCI0 address match event (all Synergy MCUs).
LPMV2_SNOOZE_CANCEL_SOURCE_SCI0_RXI_OR_ERI	SCI0 receive error (all Synergy MCUs).
LPMV2_SNOOZE_CANCEL_SOURCE_DTC_COMPLETE	DTC transfer completion (all Synergy MCUs).
LPMV2_SNOOZE_CANCEL_SOURCE_DOC_DOPCI	Data operation circuit interrupt (all Synergy MCUs).
LPMV2_SNOOZE_CANCEL_SOURCE_CTSU_CTSUFN	CTSU measurement end interrupt (all Synergy MCUs).

◆ lpmv2_snooze_dtc_t

enum lpmv2_snooze_dtc_t

DTC Enable in Snooze Mode

Enumerator
LPMV2_SNOOZE_DTC_DISABLE	Disable DTC operation (all Synergy MCUs).
LPMV2_SNOOZE_DTC_ENABLE	Enable DTC operation (all Synergy MCUs).

◆ lpmv2_snooze_end_t

enum lpmv2_snooze_end_t

Snooze end control

Enumerator
LPMV2_SNOOZE_END_SCI0_ADDRESS_MISMATCH	SCI0 address mismatch (S5D3)
LPMV2_SNOOZE_END_STANDBY_WAKE_SOURCES	Transition from Snooze to Normal mode directly (all Synergy MCUs).
LPMV2_SNOOZE_END_AGT1_UNDERFLOW	AGT1 underflow (all Synergy MCUs).
LPMV2_SNOOZE_END_DTC_TRANS_COMPLETE	Last DTC transmission completion (all Synergy MCUs).
LPMV2_SNOOZE_END_DTC_TRANS_COMPLETE_NEGATED	Not Last DTC transmission completion (all Synergy MCUs).
LPMV2_SNOOZE_END_ADC0_COMPARE_MATCH	ADC Channel 0 compare match (all Synergy MCUs).
LPMV2_SNOOZE_END_ADC0_COMPARE_MISMATCH	ADC Channel 0 compare mismatch (all Synergy MCUs).
LPMV2_SNOOZE_END_ADC1_COMPARE_MATCH	ADC 1 compare match (S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_END_ADC1_COMPARE_MISMATCH	ADC 1 compare mismatch (S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_END_SCI0_ADDRESS_MATCH	SCI0 address mismatch (S124, S128, S1JA, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2)

◆ lpmv2_snooze_request_t

enum lpmv2_snooze_request_t

Snooze request sources

Enumerator
LPMV2_SNOOZE_REQUEST_ACMPLP	Enable Low-speed analog comparator snooze request (S124, S128, S1JA, S3A1, S3A3, S3A6, S3A7).
LPMV2_SNOOZE_REQUEST_RXD0_FALLING	Enable RXD0 falling edge snooze request (S124, S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2). Enable RXD0/DALI falling edge snooze request (S128, S1JA).
LPMV2_SNOOZE_REQUEST_IRQ0	Enable IRQ0 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ1	Enable IRQ1 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ2	Enable IRQ2 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ3	Enable IRQ3 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ4	Enable IRQ4 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ5	Enable IRQ5 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ6	Enable IRQ6 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ7	Enable IRQ7 pin snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_IRQ8	Enable IRQ8 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ9	Enable IRQ9 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ10	Enable IRQ10 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ11	Enable IRQ11 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ12	Enable IRQ12 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ13	Enable IRQ13 pin snooze request (S3A1, S3A3, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ14	Enable IRQ14 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_IRQ15	Enable IRQ15 pin snooze request (S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_KEY	Enable KR snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_ACMPHS0	Enable High-speed analog comparator 0 snooze request (S5D3, S5D5, S5D9, S7G2).
LPMV2_SNOOZE_REQUEST_RTC_ALARM	Enable RTC alarm snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_RTC_PERIOD	Enable RTC period snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_AGT1_UNDERFLOW	Enable AGT1 underflow snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_AGT1_COMPARE_A	Enable AGT1 compare match A snooze request (all Synergy MCUs).
LPMV2_SNOOZE_REQUEST_AGT1_COMPARE_B	Enable AGT1 compare match B snooze request (all Synergy MCUs).

◆ lpmv2_standby_wake_source_t

enum lpmv2_standby_wake_source_t

Wake from standby mode sources, does not apply to sleep or deep standby modes

Enumerator
LPMV2_STANDBY_WAKE_SOURCE_ACMPLP0	Analog Comparator Low-speed 0 interrupt (S124, S128, S1JA, S3A1, S3A3, S3A6, S3A7).
LPMV2_STANDBY_WAKE_SOURCE_VBATT	VBATT Monitor interrupt (S3A1, S3A3, S3A6, S3A7).
LPMV2_STANDBY_WAKE_SOURCE_IRQ0	IRQ0 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ1	IRQ1 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ2	IRQ2 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ3	IRQ3 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ4	IRQ4 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ5	IRQ5 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ6	IRQ6 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ7	IRQ7 (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IRQ8	IRQ8 (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ9	IRQ9 (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ10	IRQ10 (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ11	IRQ11 (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ12	IRQ12 (S3A1, S3A3, S3A6, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ13	IRQ13 (S3A1, S3A3, S3A7, S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ14	IRQ14 (S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IRQ15	IRQ15 (S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_IWDT	Independent watchdog interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_KEY	Key interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_LVD1	Low Voltage Detection 1 interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_LVD2	Low Voltage Detection 2 interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_ACMPHS0	Analog Comparator High-speed 0 interrupt (S5D3, S5D5, S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_RTCALM	RTC Alarm interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_RTCPRD	RTC Period interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_USBHS	USB High-speed interrupt (S5D9, S7G2).
LPMV2_STANDBY_WAKE_SOURCE_USBFS	USB Full-speed interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_AGT1UD	AGT1 underflow interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_AGT1CA	AGT1 compare match A interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_AGT1CB	AGT1 compare match B interrupt (all Synergy MCUs).
LPMV2_STANDBY_WAKE_SOURCE_IIC0	I2C 0 interrupt (all Synergy MCUs).

Function Documentation

◆ R_LPMV2_ClearIOKeep()

ssp_err_t R_LPMV2_ClearIOKeep ( void )

Clear the IOKEEP bit after deep software stand by.

Return values

SSP_SUCCESS	DSPBYCR_b.IOKEEP bit cleared Successfully.
SSP_ERR_UNSUPPORTED	Deep stand by mode not supported on this MCU.

◆ R_LPMV2_Init()

ssp_err_t R_LPMV2_Init ( void )

Perform any necessary initialization.

Return values

SSP_SUCCESS LPMV2 Software lock initialized

◆ R_LPMV2_LowPowerConfigure()

ssp_err_t R_LPMV2_LowPowerConfigure ( lpmv2_cfg_t const *const p_cfg )

Configure a low power mode.

NOTE: This function does not enter the low power mode, it only configures parameters of the mode. Execution of the WFI instruction is what causes the low power mode to be entered.

Return values

SSP_SUCCESS	Low power mode successfuly applied
SSP_ERR_INVALID_POINTER	p_cfg is NULL
SSP_ERR_IN_USE	Lock was not acquired
SSP_ERR_INVALID_HW_CONDITION	Operating mode change transition was detected (OPCMTSF, SOPCMTSF bits)

Get hardware lock

Unlock LPMV2 registers

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Configure MCU specific settings related to low power modes

Lock LPMV2 registers

Release hardware lock.

Get hardware lock

Unlock LPMV2 registers

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Configures MCU specific settings related to low power modes

Lock LPMV2 registers

Release hardware lock

Get hardware lock

Unlock LPMV2 registers

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Configure MCU specific settings related to low power modes

Lock LPMV2 registers

Release hardware lock.

Get hardware lock

Unlock LPMV2 registers

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Configure MCU specific settings related to low power modes

Lock LPMV2 registers

Release hardware lock.

◆ R_LPMV2_LowPowerModeEnter()

ssp_err_t R_LPMV2_LowPowerModeEnter ( void )

Enter low power mode (sleep/standby/deep standby) using WFI macro.

Function will return after waking from low power mode.

Return values

SSP_SUCCESS	Successful.
SSP_ERR_INVALID_HW_CONDITION	HOCO was unstable during attempt to revert operating mode.

Get hardware lock

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Enter low power mode

Release hardware lock

Get hardware lock

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Enter low power mode

Release hardware lock

Get hardware lock

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Enter low power mode

Release hardware lock.

Get hardware lock

Check for ongoing operating mode transition (OPCMTSF, SOPCMTSF)

Enter low power mode

Release hardware lock.

◆ R_LPMV2_VersionGet()

ssp_err_t R_LPMV2_VersionGet ( ssp_version_t *const p_version )

Get the driver version based on compile time macros.

Return values

SSP_SUCCESS	Successful close.
SSP_ERR_INVALID_POINTER	p_version is NULL.

Data Structures

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ lpmv2_deep_standby_cancel_edge_t

◆ lpmv2_deep_standby_cancel_source_t

◆ lpmv2_io_port_t

◆ lpmv2_output_port_enable_t

◆ lpmv2_power_supply_t

◆ lpmv2_snooze_cancel_t

◆ lpmv2_snooze_dtc_t

◆ lpmv2_snooze_end_t

◆ lpmv2_snooze_request_t

◆ lpmv2_standby_wake_source_t

Function Documentation

◆ R_LPMV2_ClearIOKeep()

◆ R_LPMV2_Init()

◆ R_LPMV2_LowPowerConfigure()

◆ R_LPMV2_LowPowerModeEnter()

◆ R_LPMV2_VersionGet()