Driver for the Serial Peripheral Interface (SPI).
More...
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| enum | rspi_spcmd_bit_length_t { RSPI_SPCMD_BIT_LENGTH_8 = (0x7),
RSPI_SPCMD_BIT_LENGTH_16 = (0xF),
RSPI_SPCMD_BIT_LENGTH_32 = (0x3)
} |
| |
| enum | rspi_operation_t { RSPI_OPERATION_SPI,
RSPI_OPERATION_CLK_SYN
} |
| |
| enum | rspi_communication_t { RSPI_COMMUNICATION_FULL_DUPLEX,
RSPI_COMMUNICATION_TRANSMIT_ONLY
} |
| |
| enum | rspi_sslp_t { RSPI_SSLP_LOW,
RSPI_SSLP_HIGH
} |
| |
| enum | rspi_loopback1_t { RSPI_LOOPBACK1_NORMAL_DATA,
RSPI_LOOPBACK1_INVERTED_DATA
} |
| |
| enum | rspi_loopback2_t { RSPI_LOOPBACK2_NORMAL_DATA,
RSPI_LOOPBACK2_NOT_INVERTED_DATA
} |
| |
| enum | rspi_mosi_idle_fixed_val_t { RSPI_MOSI_IDLE_FIXED_VAL_LOW,
RSPI_MOSI_IDLE_FIXED_VAL_HIGH
} |
| |
| enum | rspi_mosi_idle_val_fixing_t { RSPI_MOSI_IDLE_VAL_FIXING_ENABLE,
RSPI_MOSI_IDLE_VAL_FIXING_DISABLE
} |
| |
| enum | rspi_parity_state_t { RSPI_PARITY_STATE_DISABLE,
RSPI_PARITY_STATE_ENABLE
} |
| |
| enum | rspi_byte_swap_t { RSPI_BYTE_SWAP_DISABLE,
RSPI_BYTE_SWAP_ENABLE
} |
| |
| enum | rspi_parity_mode_t { RSPI_PARITY_MODE_ODD,
RSPI_PARITY_MODE_EVEN
} |
| |
| enum | rspi_ssl_select_t { RSPI_SSL_SELECT_SSL0,
RSPI_SSL_SELECT_SSL1,
RSPI_SSL_SELECT_SSL2,
RSPI_SSL_SELECT_SSL3
} |
| |
| enum | rspi_ssl_level_keep_t { RSPI_SSL_LEVEL_KEEP_NOT,
RSPI_SSL_LEVEL_KEEP
} |
| |
| enum | rspi_clock_delay_count_t {
RSPI_CLOCK_DELAY_COUNT_1,
RSPI_CLOCK_DELAY_COUNT_2,
RSPI_CLOCK_DELAY_COUNT_3,
RSPI_CLOCK_DELAY_COUNT_4,
RSPI_CLOCK_DELAY_COUNT_5,
RSPI_CLOCK_DELAY_COUNT_6,
RSPI_CLOCK_DELAY_COUNT_7,
RSPI_CLOCK_DELAY_COUNT_8
} |
| |
| enum | rspi_clock_delay_state_t { RSPI_CLOCK_DELAY_STATE_DISABLE,
RSPI_CLOCK_DELAY_STATE_ENABLE
} |
| |
| enum | rspi_ssl_negation_delay_count_t {
RSPI_SSL_NEGATION_DELAY_1,
RSPI_SSL_NEGATION_DELAY_2,
RSPI_SSL_NEGATION_DELAY_3,
RSPI_SSL_NEGATION_DELAY_4,
RSPI_SSL_NEGATION_DELAY_5,
RSPI_SSL_NEGATION_DELAY_6,
RSPI_SSL_NEGATION_DELAY_7,
RSPI_SSL_NEGATION_DELAY_8
} |
| |
| enum | rspi_ssl_negation_delay_state_t { RSPI_SSL_NEGATION_DELAY_DISABLE,
RSPI_SSL_NEGATION_DELAY_ENABLE
} |
| |
| enum | rspi_next_access_delay_count_t {
RSPI_NEXT_ACCESS_DELAY_COUNT_1,
RSPI_NEXT_ACCESS_DELAY_COUNT_2,
RSPI_NEXT_ACCESS_DELAY_COUNT_3,
RSPI_NEXT_ACCESS_DELAY_COUNT_4,
RSPI_NEXT_ACCESS_DELAY_COUNT_5,
RSPI_NEXT_ACCESS_DELAY_COUNT_6,
RSPI_NEXT_ACCESS_DELAY_COUNT_7,
RSPI_NEXT_ACCESS_DELAY_COUNT_8
} |
| |
| enum | rspi_next_access_delay_state_t { RSPI_NEXT_ACCESS_DELAY_STATE_DISABLE,
RSPI_NEXT_ACCESS_DELAY_STATE_ENABLE
} |
| |
| enum | rspi_spcmd_br_div_t { RSPI_SPCMD_BR_DIV_1 = (0x0),
RSPI_SPCMD_BR_DIV_2 = (0x1),
RSPI_SPCMD_BR_DIV_4 = (0x2),
RSPI_SPCMD_BR_DIV_8 = (0x3)
} |
| |
| enum | rspi_spcmd_assert_ssl_t { RSPI_SPCMD_ASSERT_SSL0 = (0x0),
RSPI_SPCMD_ASSERT_SSL1 = (0x1),
RSPI_SPCMD_ASSERT_SSL2 = (0x2),
RSPI_SPCMD_ASSERT_SSL3 = (0x3)
} |
| |
|
| ssp_err_t | R_RSPI_Open (spi_ctrl_t *p_api_ctrl, spi_cfg_t const *const p_cfg) |
| | This functions initializes a channel for SPI communication mode. More...
|
| |
| ssp_err_t | R_RSPI_Read (spi_ctrl_t *const p_api_ctrl, void const *p_dest, uint32_t const length, spi_bit_width_t const bit_width) |
| | This function receives data from a SPI device. More...
|
| |
| ssp_err_t | R_RSPI_Write (spi_ctrl_t *const p_api_ctrl, void const *p_src, uint32_t const length, spi_bit_width_t const bit_width) |
| | This function transmits data to a SPI device using the TX Only Communications Operation Mode. More...
|
| |
| ssp_err_t | R_RSPI_WriteRead (spi_ctrl_t *const p_api_ctrl, void const *p_src, void const *p_dest, uint32_t const length, spi_bit_width_t const bit_width) |
| | This function simultaneously transmits data to a SPI device while receiving data from a SPI device (full duplex). More...
|
| |
| ssp_err_t | R_RSPI_Close (spi_ctrl_t *const p_api_ctrl) |
| | This function manages the closing of a channel by the following task. More...
|
| |
| ssp_err_t | R_RSPI_VersionGet (ssp_version_t *p_version) |
| | This function gets the version information of the underlying driver. More...
|
| |
Driver for the Serial Peripheral Interface (SPI).
This module supports SPI serial communication for the SPI module. The SPI Interface is defined in r_spi_api.h
◆ rspi_byte_swap_t
SPDCR2 (RSPI Data Control Register 2 ) – Byte swapping operation enable/disable
| Enumerator |
|---|
| RSPI_BYTE_SWAP_DISABLE | Disable Byte swap
|
| RSPI_BYTE_SWAP_ENABLE | Enable Byte swap
|
◆ rspi_clock_delay_count_t
SPCKD (RSPI Clock Delay) Register – Clock Delay Count select
| Enumerator |
|---|
| RSPI_CLOCK_DELAY_COUNT_1 | Set RSPCK Clock delay to 1 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_2 | Set RSPCK Clock delay to 2 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_3 | Set RSPCK Clock delay to 3 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_4 | Set RSPCK Clock delay to 4 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_5 | Set RSPCK Clock delay to 5 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_6 | Set RSPCK Clock delay to 6 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_7 | Set RSPCK Clock delay to 7 RSPCK
|
| RSPI_CLOCK_DELAY_COUNT_8 | Set RSPCK Clock delay to 8 RSPCK
|
◆ rspi_clock_delay_state_t
SPCMD (RSPI Command) Register – RSPCK Delay Enable/Disable select – SCKDEN
| Enumerator |
|---|
| RSPI_CLOCK_DELAY_STATE_DISABLE | RSPCK delay=1 RSPCK
|
| RSPI_CLOCK_DELAY_STATE_ENABLE | RSPCK delay=SPCKD register setting
|
◆ rspi_communication_t
SPCR (RSPI Control register) – TXMD (communication operating mode) select
| Enumerator |
|---|
| RSPI_COMMUNICATION_FULL_DUPLEX | Full-Duplex synchronous serial communication
|
| RSPI_COMMUNICATION_TRANSMIT_ONLY | Transit only serial communication
|
◆ rspi_loopback1_t
SPPCR (RSPI Pin Control Register) – Loopback1 select
| Enumerator |
|---|
| RSPI_LOOPBACK1_NORMAL_DATA | Loopback1 normal mode
|
| RSPI_LOOPBACK1_INVERTED_DATA | Loopback1 with inverted data
|
◆ rspi_loopback2_t
SPPCR (RSPI Pin Control Register) – Loopback2 select
| Enumerator |
|---|
| RSPI_LOOPBACK2_NORMAL_DATA | Loopback2 normal mode
|
| RSPI_LOOPBACK2_NOT_INVERTED_DATA | Loopback2 with not inverted data
|
◆ rspi_mosi_idle_fixed_val_t
SPPCR (RSPI Pin Control Register) – MOIFV select
| Enumerator |
|---|
| RSPI_MOSI_IDLE_FIXED_VAL_LOW | MOSIn level low during MOSI idling
|
| RSPI_MOSI_IDLE_FIXED_VAL_HIGH | MOSIn level high during MOSI idling
|
◆ rspi_mosi_idle_val_fixing_t
SPPCR (RSPI Pin Control Register) – MOIFE (MOSI idle value fixing) select
| Enumerator |
|---|
| RSPI_MOSI_IDLE_VAL_FIXING_ENABLE | MOSI output value=final data from previous transfer
|
| RSPI_MOSI_IDLE_VAL_FIXING_DISABLE | MOSI output value=value set in MOIFV bit
|
◆ rspi_next_access_delay_count_t
SPND (RSPI Next-Access Delay) Register – Next Access Delay Count select
| Enumerator |
|---|
| RSPI_NEXT_ACCESS_DELAY_COUNT_1 | Set next access delay to 1 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_2 | Set next access delay to 2 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_3 | Set next access delay to 3 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_4 | Set next access delay to 4 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_5 | Set next access delay to 5 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_6 | Set next access delay to 6 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_7 | Set next access delay to 7 RSPCK+2PCLK
|
| RSPI_NEXT_ACCESS_DELAY_COUNT_8 | Set next access delay to 8 RSPCK+2PCLK
|
◆ rspi_next_access_delay_state_t
SPCMD (RSPI Command) Register – Next Access Delay select – SPNDEN
| Enumerator |
|---|
| RSPI_NEXT_ACCESS_DELAY_STATE_DISABLE | Next access delay=1 RSPCK + 2 PCLK
|
| RSPI_NEXT_ACCESS_DELAY_STATE_ENABLE | Next access delay=SPND register setting
|
◆ rspi_operation_t
SPCR (RSPI Control register) – SPMS (RSPI mode) select
| Enumerator |
|---|
| RSPI_OPERATION_SPI | SPI operation (4-wire method)
|
| RSPI_OPERATION_CLK_SYN | Clock Synchronous operation (3-wire method)
|
◆ rspi_parity_mode_t
SPCR2 (RSPI Control Register 2) – Parity select
| Enumerator |
|---|
| RSPI_PARITY_MODE_ODD | Select even parity
|
| RSPI_PARITY_MODE_EVEN | Select odd parity
|
◆ rspi_parity_state_t
SPCR2 (RSPI Control Register 2) – Parity Enable select
| Enumerator |
|---|
| RSPI_PARITY_STATE_DISABLE | Disable parity
|
| RSPI_PARITY_STATE_ENABLE | Enable parity
|
◆ rspi_spcmd_assert_ssl_t
Slave select to be asserted during transfer operation.
| Enumerator |
|---|
| RSPI_SPCMD_ASSERT_SSL0 | Select SSL0
|
| RSPI_SPCMD_ASSERT_SSL1 | Select SSL1
|
| RSPI_SPCMD_ASSERT_SSL2 | Select SSL2
|
| RSPI_SPCMD_ASSERT_SSL3 | Select SSL3
|
◆ rspi_spcmd_bit_length_t
Frame data length
| Enumerator |
|---|
| RSPI_SPCMD_BIT_LENGTH_8 | 0100 to 0111 = 8 bits data length
|
| RSPI_SPCMD_BIT_LENGTH_16 | 1111 = 16 bits data length
|
| RSPI_SPCMD_BIT_LENGTH_32 | 0011 = 32 bits data length
|
◆ rspi_spcmd_br_div_t
Clock base rate division
| Enumerator |
|---|
| RSPI_SPCMD_BR_DIV_1 | Select the base bit rate
|
| RSPI_SPCMD_BR_DIV_2 | Select the base bit rate divided by 2
|
| RSPI_SPCMD_BR_DIV_4 | Select the base bit rate divided by 4
|
| RSPI_SPCMD_BR_DIV_8 | Select the base bit rate divided by 8
|
◆ rspi_ssl_level_keep_t
SPCMD (RSPI Command) Register – SSL Signal Level Keeping select
| Enumerator |
|---|
| RSPI_SSL_LEVEL_KEEP_NOT | Negates all SSL signals upon transfer completion
|
| RSPI_SSL_LEVEL_KEEP | Keeps the SSL level upon transfer completion
|
◆ rspi_ssl_negation_delay_count_t
SSLND (RSPI Slave Select Negation Delay) Register – Slave Select Negation Delay Count select
| Enumerator |
|---|
| RSPI_SSL_NEGATION_DELAY_1 | Set SSL negation delay to 1 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_2 | Set SSL negation delay to 2 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_3 | Set SSL negation delay to 3 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_4 | Set SSL negation delay to 4 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_5 | Set SSL negation delay to 5 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_6 | Set SSL negation delay to 6 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_7 | Set SSL negation delay to 7 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_8 | Set SSL negation delay to 8 RSPCK
|
◆ rspi_ssl_negation_delay_state_t
SPCMD (RSPI Command) Register – SSL Negation Delay select – SLNDEN
| Enumerator |
|---|
| RSPI_SSL_NEGATION_DELAY_DISABLE | SSL negation delay=1 RSPCK
|
| RSPI_SSL_NEGATION_DELAY_ENABLE | SSL negation delay=SSLND register setting
|
◆ rspi_ssl_select_t
SPCMD (RSPI Command) Register – SSL Signal Assertion select
| Enumerator |
|---|
| RSPI_SSL_SELECT_SSL0 | Select SSL0 as slave
|
| RSPI_SSL_SELECT_SSL1 | Select SSL1 as slave
|
| RSPI_SSL_SELECT_SSL2 | Select SSL2 as slave
|
| RSPI_SSL_SELECT_SSL3 | Select SSL3 as slave
|
◆ rspi_sslp_t
Definition for SSLP (RSPI Slave Select Polarity register) select
| Enumerator |
|---|
| RSPI_SSLP_LOW | SSLP signal polarity active low
|
| RSPI_SSLP_HIGH | SSLP signal polarity active high
|
◆ R_RSPI_Close()
This function manages the closing of a channel by the following task.
Implements spi_api_t::close Disables SPI operations by disabling the SPI bus. Power off the channel. Disables all the associated interrupts. Update channel status.
- Return values
-
| SSP_SUCCESS | Channel successfully closed. |
| SSP_ERR_ASSERTION | A required pointer argument is NULL. |
| SSP_ERR_NOT_OPEN | The channel has not been opened. Open the channel first. |
- Note
- This function is reentrant.
◆ R_RSPI_Open()
This functions initializes a channel for SPI communication mode.
Implements spi_api_t::open This function performs the following tasks: Performs parameter checking and processes error conditions. Applies power to the SPI channel. Disables interrupts. Initializes the associated registers with some default value and the user-configurable options. Provides the channel control for use with other API functions. Updates user-configurable file if necessary.
- Return values
-
| SSP_SUCCESS | Channel initialized successfully. |
| SSP_ERR_ASSERTION | NULL pointer to following parameters p_ctrl, p_cfg, p_cfg::p_transfer_rx::p_api, p_cfg::p_transfer_rx::p_ctrl, p_cfg::p_transfer_rx::p_cfg, p_cfg::p_transfer_rx::p_cfg::p_info. or failed to set the baud rate, |
| SSP_ERR_INVALID_ARGUMENT | An element of the r_spi_cfg_t structure contains an invalid value. The parameters is out of range. Both transfer modules need to be present or absent. |
| SSP_ERR_HW_LOCKED | The lock could not be acquired. The channel is busy. |
- Returns
- See Common Error Codes or functions called by this function for other possible return codes. This function calls:
- Note
- This function is reentrant.
◆ R_RSPI_Read()
This function receives data from a SPI device.
Implements spi_api_t::read The function performs the following tasks: Performs parameter checking and processes error conditions. Disable Interrupts. Disable the SPI bus. Setup data bit width per user request. Enable the SPI bus. Enable interrupts. Start data transmission with dummy data via transmit buffer empty interrupt. Copy data from source buffer to the SPI data register for transmission. Receive data from receive buffer full interrupt occurs and copy data to the buffer of destination. Complete data reception via receive buffer full interrupt and transmitting dummy data.
- Return values
-
| SSP_SUCCESS | Read operation successfully completed. |
| SSP_ERR_ASSERTION | NULL pointer to control or destination parameters or transfer length is zero. |
| SSP_ERR_UNSUPPORTED | With DTC transfer mode, bit_width must match configured DTC transfer width |
| SSP_ERR_HW_LOCKED | The lock could not be acquired. The channel is busy. |
| SSP_ERR_NOT_OPEN | The channel has not been opened. Open channel first. |
| SSP_ERR_INVALID_HW_CONDITION | Failed to clear errors in the module |
- Note
- This function is reentrant.
◆ R_RSPI_VersionGet()
This function gets the version information of the underlying driver.
Implements spi_api_t::versionget
- Return values
-
| void | |
| SSP_SUCCESS | Successful version get. |
| SSP_ERR_ASSERTION | The parameter p_version is NULL. |
- Note
- This function is reentrant.
◆ R_RSPI_Write()
This function transmits data to a SPI device using the TX Only Communications Operation Mode.
Implements spi_api_t::write The function performs the following tasks: Performs parameter checking and processes error conditions. Disable Interrupts. Disable the SPI bus. Setup data bit width per user request. Enable the SPI bus. Enable interrupts. Start data transmission with dummy data via transmit buffer empty interrupt. Copy data from source buffer to the SPI data register for transmission. Receive data from receive buffer full interrupt occurs and do nothing with the received data. Complete data transmission via receive buffer full interrupt.
- Return values
-
| SSP_SUCCESS | Write operation successfully completed. |
| SSP_ERR_ASSERTION | NULL pointer to control or source parameters or transfer length is zero. |
| SSP_ERR_UNSUPPORTED | With DTC transfer mode, bit_width must match configured DTC transfer width |
| SSP_ERR_HW_LOCKED | The lock could not be acquired. The channel is busy. |
| SSP_ERR_NOT_OPEN | The channel has not been opened. Open the channel first. |
| SSP_ERR_INVALID_HW_CONDITION | Failed to clear errors in the module |
- Note
- This function is reentrant.
◆ R_RSPI_WriteRead()
This function simultaneously transmits data to a SPI device while receiving data from a SPI device (full duplex).
Implements spi_api_t::writeread The function performs the following tasks: Performs parameter checking and processes error conditions. Disable Interrupts. Disable the SPI bus. Setup data bit width per user request. Enable the SPI bus. Enable interrupts. Start data transmission using transmit buffer empty interrupt. Copy data from source buffer to the SPI data register for transmission. Receive data from receive buffer full interrupt occurs and copy data to the buffer of destination. Complete data transmission and reception via receive buffer full interrupt.
- Return values
-
| SSP_SUCCESS | Write operation successfully completed. |
| SSP_ERR_ASSERTION | NULL pointer to control, source or destination parameters or transfer length is zero. |
| SSP_ERR_UNSUPPORTED | With DTC transfer mode, bit_width must match configured DTC transfer width |
| SSP_ERR_HW_LOCKED | The lock could not be acquired. The channel is busy. |
| SSP_ERR_NOT_OPEN | The channel has not been opened. Open the channel first. |
| SSP_ERR_INVALID_HW_CONDITION | Failed to clear errors in the module |
- Note
- This function is reentrant.