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Synergy Software Package User's Manual
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Synergy Software Package User's Manual
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RTOS-integrated USBX adaptation framework for Synergy. Implements USB HOST and DEVICE low level device drivers. More...
Data Structures | |
| struct | UX_DCD_SYNERGY_ED |
| struct | UX_DCD_SYNERGY_TRANSFER |
| struct | UX_DCD_SYNERGY_PAYLOAD_TRANSFER |
| struct | UX_DCD_SYNERGY |
| struct | UX_HCD_SYNERGY_TRANSFER |
| struct | UX_HCD_SYNERGY |
| struct | UX_HCD_SYNERGY_PAYLOAD_TRANSFER |
| struct | UX_HCD_SYNERGY_FIFO |
| struct | UX_SYNERGY_ED |
| struct | UX_SYNERGY_TD |
| struct | UX_SYNERGY_ISO_TD |
Functions | |
| void | usbhs_usb_int_resume_isr (void) |
| This function calls the host interrupt handler or the device interrupt handler. | |
| void | usbfs_int_isr (void) |
| All the USBFS interrupts are handled by this ISR. | |
| void | usbfs_resume_isr (void) |
| VBINT (VBUS interrupt), RESM (Resume interrupt), OVRCR (Over current input), BCHG (Change interrupt), and PDDETINT0 (Bus change interrupt) fire this ISR. This is only used for canceling following standby modes. More... | |
| VOID | ux_dcd_synergy_buffer_empty_interrupt (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, ULONG flag) |
| This function processes the BEMP interrupt for the specific endpoint. More... | |
| VOID | ux_dcd_synergy_buffer_notready_interrupt (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, ULONG flag) |
| This function processes the NRDY(Not Ready) interrupt for the specific endpoint. More... | |
| UINT | ux_dcd_synergy_buffer_read (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function reads from a specified pipe into a buffer. More... | |
| VOID | ux_dcd_synergy_buffer_ready_interrupt (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, ULONG flag) |
| This function enable or disable the BRDY(Ready) interrupt for the pipe. More... | |
| UINT | ux_dcd_synergy_buffer_write (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function writes a data from input buffer to the specified PIPE. More... | |
| VOID | ux_dcd_synergy_current_endpoint_change (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, ULONG direction) |
| This function configures the FIFO as per the request specified in endpoint descriptor. More... | |
| ULONG | ux_dcd_synergy_data_buffer_size (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function returns the size of the data buffer and selects the specified pipe. More... | |
| UINT | ux_dcd_synergy_endpoint_create (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_ENDPOINT *endpoint) |
| This function creates a physical endpoint. More... | |
| UINT | ux_dcd_synergy_endpoint_destroy (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_ENDPOINT *endpoint) |
| This function will destroy a physical endpoint. More... | |
| VOID | ux_dcd_synergy_endpoint_nak_set (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function sets a NAK(Not Acknowledged) to an endpoint. More... | |
| UINT | ux_dcd_synergy_endpoint_reset (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_ENDPOINT *endpoint) |
| This function will reset a physical endpoint. More... | |
| UINT | ux_dcd_synergy_remote_wakeup (UX_DCD_SYNERGY *dcd_synergy, ULONG *parameter) |
| This function is called when the device wants to wake up the host. More... | |
| UINT | ux_dcd_synergy_endpoint_stall (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_ENDPOINT *endpoint) |
| This function will stall a physical endpoint. More... | |
| UINT | ux_dcd_synergy_endpoint_status (UX_DCD_SYNERGY *dcd_synergy, ULONG endpoint_index) |
| This function will retrieve the status of the endpoint. More... | |
| ULONG | ux_dcd_synergy_fifo_port_change (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, ULONG direction) |
| This function configures the FIFO port. More... | |
| UINT | ux_dcd_synergy_fifoc_read (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function reads from the hardware FIFO C and stores in the destination buffer. More... | |
| UINT | ux_dcd_synergy_fifo_read (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function reads from the hardware FIFO D0 or D1 and stores in the destination buffer. More... | |
| UINT | ux_dcd_synergy_fifo_read_dma (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, UINT dma_bytes_to_transfer) |
| This function reads the data from HW D0/ D1 FIFO using DMA. More... | |
| UINT | ux_dcd_synergy_fifoc_write (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function writes a data from a buffer into USB FIFO using CPU. More... | |
| VOID | ux_dcd_synergy_fifo_write_software_copy (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_PAYLOAD_TRANSFER *p_payload, VOID *p_fifo, ULONG fifo_sel) |
| USBX DCD FIFO write by software copy. Call a subroutine for selected USB controller hardware. More... | |
| VOID | ux_dcd_synergy_fifo_write_last_bytes (UX_DCD_SYNERGY_PAYLOAD_TRANSFER *p_payload, VOID *p_fifo, ULONG usb_base) |
| USBX DCD FIFO write - Copy last bytes to FIFO by software if the rest bytes are less than FIFO access width. More... | |
| UINT | ux_dcd_synergy_fifod_write (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed) |
| This function writes a buffer to FIFOD0 or FIFOD1. More... | |
| UINT | ux_dcd_synergy_fifod_write_dma (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_ED *ed, UINT dma_bytes_to_transfer) |
| This function writes a buffer to FIFOD0 or FIFOD1 using DMA. More... | |
| VOID | ux_dcd_synergy_write_dma_configure (UX_DCD_SYNERGY *dcd_synergy, UX_DCD_SYNERGY_PAYLOAD_TRANSFER *p_payload, ULONG fifo_sel, ULONG endpoint_size) |
| USBX DCD DMA write setup function. Call a subroutine for selected USB controller hardware. More... | |
| VOID | ux_dcd_synergy_fifo_dma_start_write (UX_DCD_SYNERGY *dcd_synergy, UCHAR *p_payload_buffer, VOID *p_fifo_add, VOID *p_fifo_ctrl, VOID *p_fifo_sel) |
| USBX DCD DMA FIFO write - DMA start function. More... | |
| UINT | ux_dcd_synergy_frame_number_get (UX_DCD_SYNERGY *dcd_synergy, ULONG *frame_number) |
| This function will return the frame number currently used by the controller. This function is mostly used for isochronous purposes. More... | |
| UINT | ux_dcd_synergy_function (UX_SLAVE_DCD *dcd, UINT function, VOID *parameter) |
| This function act as interface between upper layer USBX device stack and synergy controller. More... | |
| UINT | ux_dcd_synergy_initialize (ULONG dcd_io) |
| This function initializes the USB slave controller for Renesas Synergy MCUs. More... | |
| UINT | ux_dcd_synergy_initialize_transfer_support (ULONG dcd_io, UX_DCD_SYNERGY_TRANSFER *p_transfer_instance) |
| The function initializes the USB slave controller of the Renesas Synergy MCUs with associated DMA transfer modules. More... | |
| UINT | ux_dcd_synergy_initialize_complete (VOID) |
| This function completes the initialization of the USB slave controller for the Renesas Synergy MCUs. More... | |
| VOID | ux_dcd_synergy_interrupt_handler (VOID) |
| This function is the interrupt handler for the synergy controller. More... | |
| VOID | ux_dcd_synergy_register_clear (UX_DCD_SYNERGY *dcd_synergy, ULONG synergy_register, USHORT value) |
| This function clears a bit in a register of the synergy. More... | |
| VOID | ux_dcd_synergy_usb_status_register_clear (UX_DCD_SYNERGY *dcd_synergy, ULONG synergy_register, USHORT value) |
| This function clears a bit in a status register of the synergy.To clear the status bits, need to write 0 only to the bits to be cleared. Write 1 to the other bits. More... | |
| ULONG | ux_dcd_synergy_register_read (UX_DCD_SYNERGY *dcd_synergy, ULONG synergy_register) |
| This function reads a synergy USB register. More... | |
| VOID | ux_dcd_synergy_register_set (UX_DCD_SYNERGY *dcd_synergy, ULONG synergy_register, USHORT value) |
| This function set a bit in synergy USB register. More... | |
| VOID | ux_dcd_synergy_register_write (UX_DCD_SYNERGY *dcd_synergy, ULONG synergy_register, USHORT value) |
| This function writes a bit in synergy USB register. More... | |
| UINT | ux_dcd_synergy_transfer_abort (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_TRANSFER *transfer_request) |
| This function will terminate the transfer. More... | |
| UINT | ux_dcd_synergy_transfer_callback (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_TRANSFER *transfer_request, ULONG interrupt_status, ULONG ctsq_mask) |
| This function is invoked under ISR when an event happens on a specific endpoint. More... | |
| UINT | ux_dcd_synergy_transfer_request (UX_DCD_SYNERGY *dcd_synergy, UX_SLAVE_TRANSFER *transfer_request) |
| This function will initiate a transfer to a specific endpoint. If the endpoint is IN, the endpoint register will be set to accept the request. If the endpoint is IN, the endpoint FIFO will be filled with the buffer and the endpoint register set. More... | |
| void | ux_dcd_synergy_disconnect (void) |
| USBX DCD disconnect the USB controller communication from the host. | |
| UINT | ux_dcd_synergy_uninitialize (ULONG dcd_io) |
| USBX DCD un-initialization the USB controller. More... | |
| UINT | ux_dcd_synergy_uninitialize_transfer_support (ULONG dcd_io) |
| The function un-initializes the USB slave controller of the Renesas Synergy MCUs with associated DMA transfer modules. More... | |
| VOID | ux_hcd_synergy_asynch_queue_process (UX_HCD_SYNERGY *hcd_synergy) |
| This function process the asynchronous transactions. The function will identify the USB interrupts occurred associated with an endpoint and will process the interrupts. More... | |
| VOID | ux_hcd_synergy_asynch_queue_process_bemp (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the BEMP(Buffer Empty) interrupt that occurred on a specific ED. More... | |
| VOID | ux_hcd_synergy_asynch_queue_process_brdy (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the BRDY(Buffer Ready)interrupt that occurred on a specific ED. More... | |
| VOID | ux_hcd_synergy_asynch_queue_process_nrdy (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the NRDY(Not Ready) Interrupt that occurred on a specific ED. More... | |
| VOID | ux_hcd_synergy_asynch_queue_process_sign (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the Setup transaction Error Interrupt. More... | |
| VOID | ux_hcd_synergy_asynch_schedule (UX_HCD_SYNERGY *hcd_synergy) |
| This function schedules new transfers from the control or bulk lists. More... | |
| UINT | ux_hcd_synergy_asynchronous_endpoint_create (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will create an asynchronous endpoint. The control and bulk endpoints fall into this category. More... | |
| UINT | ux_hcd_synergy_asynchronous_endpoint_destroy (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will destroy an asynchronous endpoint. The control and bulk endpoints fall into this category. More... | |
| VOID | ux_hcd_synergy_buffer_empty_interrupt (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed, ULONG flag) |
| This function enable or disable the BEMP(Buffer Empty) interrupt for the pipe. More... | |
| VOID | ux_hcd_synergy_buffer_notready_interrupt (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed, ULONG flag) |
| This function enable or disable the NRDY(Not Ready) interrupt for the pipe. More... | |
| UINT | ux_hcd_synergy_buffer_read (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function reads from a specified pipe into a buffer. More... | |
| VOID | ux_hcd_synergy_buffer_ready_interrupt (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed, ULONG flag) |
| This function enable or disable the BRDY(Ready) interrupt for the pipe. More... | |
| UINT | ux_hcd_synergy_buffer_write (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function writes data to the selected FIFO of the endpoint. More... | |
| UINT | ux_hcd_synergy_bulk_endpoint_create (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will create a bulk endpoint. More... | |
| UINT | ux_hcd_synergy_bulk_int_td_add (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function adds a transfer descriptor to an Bulk or INT ED. More... | |
| UINT | ux_hcd_synergy_control_endpoint_create (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will create a control endpoint. More... | |
| UINT | ux_hcd_synergy_control_td_add (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function adds a transfer descriptor to an ED. More... | |
| UINT | ux_hcd_synergy_controller_disable (UX_HCD_SYNERGY *hcd_synergy) |
| This function will disable the Synergy controller. The controller will release all its resources (memory, IO ...). After this, the controller will not send SOF any longer. All transactions should have been completed, all classes should have been closed. More... | |
| VOID | ux_hcd_synergy_current_endpoint_change (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed, ULONG direction) |
| This function change the endpoint in the FIFO. More... | |
| ULONG | ux_hcd_synergy_data_buffer_size (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function returns the size of the buffer data. More... | |
| UX_SYNERGY_ED * | ux_hcd_synergy_ed_obtain (UX_HCD_SYNERGY *hcd_synergy) |
| This function obtains a free ED from the ED list. More... | |
| VOID | ux_hcd_synergy_ed_td_clean (UX_SYNERGY_ED *ed) |
| This function process cleans the ED of all tds except the last dummy TD. More... | |
| VOID | ux_hcd_synergy_endpoint_nak_set (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function sets a NAK(Not Acknowledged) to an endpoint. More... | |
| UINT | ux_hcd_synergy_endpoint_reset (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will reset an endpoint. More... | |
| UINT | ux_hcd_synergy_entry (UX_HCD *hcd, UINT function, VOID *parameter) |
| This function is the entry function to the USB driver from the USB stack. More... | |
| ULONG | ux_hcd_synergy_fifo_port_change (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed, ULONG direction) |
| This function change the port of the FIFO. More... | |
| UINT | ux_hcd_synergy_fifo_read (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function read data from the FIFO configured for the PIPE(FIFO C, D0 or D1). More... | |
| UINT | ux_hcd_synergy_fifoc_write (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function writes a buffer to FIFOC. More... | |
| VOID | ux_hcd_synergy_fifo_write_software_copy (UX_HCD_SYNERGY *hcd_synergy, ULONG payload_length, UCHAR *payload_buffer, VOID *fifo_addr, ULONG fifo_sel) |
| USBX HCD CPU FIFO write by software copy. Call a suitable subroutine for selected USB controller hardware. More... | |
| VOID | ux_hcd_synergy_fifo_write_software_copy_remaining_bytes (UX_HCD_SYNERGY *hcd_synergy, ULONG payload_length, UCHAR *payload_buffer, VOID *fifo_addr) |
| USBX HCD CPU FIFO write - Copy remaining bytes to FIFO by software if the rest bytes are less than FIFO access width. More... | |
| UINT | ux_hcd_synergy_fifod_write (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function writes a buffer data to FIFOD0 or FIFOD1. More... | |
| UINT | ux_hcd_synergy_frame_number_get (UX_HCD_SYNERGY *hcd_synergy, ULONG *frame_number) |
| This function will return the frame number currently used by the controller. This function is mostly used for isochronous purposes and for timing. More... | |
| VOID | ux_hcd_synergy_frame_number_set (UX_HCD_SYNERGY *hcd_synergy, ULONG frame_number) |
| This function will set the current frame number to the one specified. This function is mostly used for isochronous purpos.es. More... | |
| UINT | ux_hcd_synergy_initialize (UX_HCD *hcd) |
| This function initializes the Synergy controller. More... | |
| UINT | ux_hcd_synergy_initialize_transfer_support (UX_HCD *hcd, const UX_HCD_SYNERGY_TRANSFER *p_transfer_instance) |
| USBX HCD Transfer Support with DMA support. More... | |
| UINT | ux_hcd_synergy_interrupt_endpoint_create (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will create an interrupt endpoint. The interrupt endpoint has an interval of operation from 1 to 255. The Synergy has no hardware scheduler but we still build an interrupt tree similar to the OHCI controller. More... | |
| VOID | ux_hcd_synergy_interrupt_handler (UINT hcd_index) |
| This function is the interrupt handler for the Synergy USB HS controller. Normally an interrupt occurs from the controller when there is either a EOF signal and there has been transfers within the frame or when there is a change on one of the downstream ports. More... | |
| VOID | ux_hcd_synergy_iso_queue_process (UX_HCD_SYNERGY *hcd_synergy) |
| This function process the isochronous transactions that happened in the last frame. More... | |
| VOID | ux_hcd_synergy_iso_queue_process_bemp (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the BEMP(Buffer Empty) Interrupt that occurred on a specific ED used for Isochronous transfer. More... | |
| VOID | ux_hcd_synergy_iso_queue_process_brdy (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the BRDY(Buffer Ready)interrupt that occurred on a specific ED used for isochronous transfer. More... | |
| VOID | ux_hcd_synergy_iso_queue_process_nrdy (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function process the NRDY(Not Ready) Interrupt that occurred on a specific ED used for Isochronous transfer. More... | |
| VOID | ux_hcd_synergy_iso_schedule (UX_HCD_SYNERGY *hcd_synergy) |
| This function schedules new transfers from isochronous list. More... | |
| UINT | ux_hcd_synergy_iso_td_add (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function adds a transfer descriptor to an Isochronous Endpoint Descriptor. More... | |
| UINT | ux_hcd_synergy_isochronous_endpoint_create (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function creates an isochronous endpoint. More... | |
| UX_SYNERGY_ISO_TD * | ux_hcd_synergy_isochronous_td_obtain (UX_HCD_SYNERGY *hcd_synergy) |
| This function obtains a free TD from the isochronous TD list. More... | |
| UX_SYNERGY_ED * | ux_hcd_synergy_least_traffic_list_get (UX_HCD_SYNERGY *hcd_synergy) |
| This function return a pointer to the first ED in the periodic tree that has the least traffic registered. More... | |
| UINT | ux_hcd_synergy_periodic_endpoint_destroy (UX_HCD_SYNERGY *hcd_synergy, UX_ENDPOINT *endpoint) |
| This function will destroy an isochronous endpoint. More... | |
| VOID | ux_hcd_synergy_periodic_schedule (UX_HCD_SYNERGY *hcd_synergy) |
| This function schedules new transfers from the periodic interrupt list. More... | |
| UINT | ux_hcd_synergy_periodic_tree_create (UX_HCD_SYNERGY *hcd_synergy) |
| This function creates the periodic static tree for the interrupt and isochronous eds. More... | |
| UINT | ux_hcd_synergy_port_disable (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will disable a specific port attached to the root HUB. More... | |
| UINT | ux_hcd_synergy_port_enable (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will enable a specific port attached to the root HUB. More... | |
| UINT | ux_hcd_synergy_port_reset (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will reset a specific port attached to the root HUB. More... | |
| UINT | ux_hcd_synergy_port_resume (UX_HCD_SYNERGY *hcd_synergy, UINT port_index) |
| This function will resume a specific port attached to the root HUB. Present, this function is not supported for resume port. More... | |
| ULONG | ux_hcd_synergy_port_status_get (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will return the status for each port attached to the root HUB. More... | |
| UINT | ux_hcd_synergy_port_suspend (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will suspend a specific port attached to the root HUB. Present, this function is does not supported. More... | |
| UINT | ux_hcd_synergy_power_down_port (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will power down a specific port attached to the root HUB. Present, this function is does not supported. More... | |
| UINT | ux_hcd_synergy_power_on_port (UX_HCD_SYNERGY *hcd_synergy, ULONG port_index) |
| This function will power a specific port attached to the root HUB. Present, this function is does not supported. More... | |
| VOID | ux_hcd_synergy_power_root_hubs (UX_HCD_SYNERGY *hcd_synergy) |
| This function will power the root HUB. Present, this function is does not supported. More... | |
| VOID | ux_hcd_synergy_register_clear (UX_HCD_SYNERGY *hcd_synergy, ULONG synergy_register, USHORT value) |
| This function clears flags in a synergy USB register. More... | |
| VOID | ux_hcd_synergy_register_status_clear (UX_HCD_SYNERGY *hcd_synergy, ULONG synergy_register, USHORT value) |
| This function clears a bit in a status register of the synergy controller.To clear the status bits, need to write 0 only to the bits to be cleared. Write 1 to the other bits. More... | |
| ULONG | ux_hcd_synergy_register_read (UX_HCD_SYNERGY *hcd_synergy, ULONG synergy_register) |
| This function reads a data from synergy USB register. More... | |
| VOID | ux_hcd_synergy_register_set (UX_HCD_SYNERGY *hcd_synergy, ULONG synergy_register, USHORT value) |
| This function sets flags in a synergy USB register. More... | |
| VOID | ux_hcd_synergy_register_write (UX_HCD_SYNERGY *hcd_synergy, ULONG synergy_register, USHORT value) |
| This function writes a data to a Synergy USB register. More... | |
| UX_SYNERGY_TD * | ux_hcd_synergy_regular_td_obtain (UX_HCD_SYNERGY *hcd_synergy) |
| This function obtains a free TD from the regular TD list. More... | |
| UINT | ux_hcd_synergy_request_bulk_transfer (UX_HCD_SYNERGY *hcd_synergy, UX_TRANSFER *transfer_request) |
| This function performs a bulk transfer request. A bulk transfer can be larger than the size of the Synergy buffer so it may be required to chain multiple tds to accommodate this transfer request. A bulk transfer is non blocking, so we return before the transfer request is completed. More... | |
| UINT | ux_hcd_synergy_request_control_transfer (UX_HCD_SYNERGY *hcd_synergy, UX_TRANSFER *transfer_request) |
| This function performs a control transfer from a transfer request. The USB control transfer is in 3 phases (setup, data, status). This function will chain all phases of the control sequence before setting the Synergy endpoint as a candidate for transfer. More... | |
| UINT | ux_hcd_synergy_request_interrupt_transfer (UX_HCD_SYNERGY *hcd_synergy, UX_TRANSFER *transfer_request) |
| This function performs an interrupt transfer request. An interrupt transfer can only be as large as the MaxpacketField in the endpoint descriptor. This was verified at the USB layer and does not need to be reverified here. More... | |
| UINT | ux_hcd_synergy_request_isochronous_transfer (UX_HCD_SYNERGY *hcd_synergy, UX_TRANSFER *transfer_request) |
| This function performs an isochronous transfer request. More... | |
| UINT | ux_hcd_synergy_request_transfer (UX_HCD_SYNERGY *hcd_synergy, UX_TRANSFER *transfer_request) |
| This function is the handler for all the transactions on the USB. The transfer request passed as parameter contains the endpoint and the device descriptors in addition to the type of transaction de be executed. This function routes the transfer request to according to the type of transfer to be executed. More... | |
| UINT | ux_hcd_synergy_td_add (UX_HCD_SYNERGY *hcd_synergy, UX_SYNERGY_ED *ed) |
| This function add new TD for control, Bulk or Interrupt endpoint. More... | |
| UINT | ux_hcd_synergy_transfer_abort (UX_HCD_SYNERGY *hcd_synergy, UX_TRANSFER *transfer_request) |
| This function will abort transactions attached to a transfer request. More... | |
| UINT | ux_hcd_synergy_disable (ULONG ux_hcd_io) |
| This function disables the Synergy HOST controller. More... | |
| UINT | ux_hcd_synergy_uninitialize (ULONG ux_hcd_io) |
| This function un-initializes the Synergy HOST controller. More... | |
| UINT | ux_hcd_synergy_uninitialize_transfer_support (UX_HCD_SYNERGY *hcd_synergy) |
| This function un-initializes the transfer module associated with the USBX HOST controller. More... | |
RTOS-integrated USBX adaptation framework for Synergy. Implements USB HOST and DEVICE low level device drivers.
USBX Component SYNERGY Controller Driver
| #define UX_DCD_SYNERGY_ED_STATE_IDLE (0U) |
Define USB SYNERGY physical endpoint state machine definition.
| #define UX_DCD_SYNERGY_ED_STATUS_UNUSED (0U) |
Define USB SYNERGY physical endpoint status definition.
| #define UX_DCD_SYNERGY_SLAVE_CONTROLLER (0x80U) |
Define SYNERGY generic equivalences.
| #define UX_SYNERGY_CONTROLLER (0) |
Define Synergy generic definitions.
| #define UX_SYNERGY_DCD_BUSWAIT_CALC_FREQ_PCLK_CYC (17142857U) |
Register access wait cycles for USBHS controller. 7cycles at Peripheral clock 120MHz
| #define UX_SYNERGY_DCD_COMMAND_STATUS_RESET (0) |
Define synergy initialization values.
| #define UX_SYNERGY_DCD_DCP (0) |
Define synergy command/status bitmaps.
| #define UX_SYNERGY_DCD_ED_BRDY (0x00000001U) |
Define synergy physical endpoint definitions.
| #define UX_SYNERGY_DCD_FIFO_READING (2U) |
Define synergy FIFO read completion code.
| #define UX_SYNERGY_DCD_FIFO_WRITING (2U) |
Define synergy FIFO write completion code.
| #define UX_SYNERGY_DCD_MAIN_OSC_24MHz (24000000U) |
Supported USBMCLK frequency for S7G2 and S5D9.
| #define UX_SYNERGY_DCD_PHYSLEW_SLEW_SLEWR00 (1U<<0) |
PHY Cross Point Adjustment, note that Hardware Manual to be updated(0xE->0x5)
| #define UX_SYNERGY_DCD_PIPE0_SIZE (256U) |
Define synergy fifo definition.
| #define UX_SYNERGY_DCD_PIPESEL_NO_PIPE (0x000FU) |
Define synergy PIPE selection definitions.
| #define UX_SYNERGY_DCD_SYSCFG (0x00UL) |
Define SYNERGY HCOR register mapping.
| #define UX_SYNERGY_DCD_SYSCFG_SCKE (1U<<10) |
Define SYNERGY control register values.
| #define UX_SYNERGY_ED_STATIC (0x80000000) |
Define Synergy ED bitmap.
| #define UX_SYNERGY_HC_AVAILABLE_BANDWIDTH (2304UL) |
Define Synergy static definition. This macro is used for checking the available bandwidth for periodic transfers(Isochronous and Interrupt) Maximum bandwidth is calculated as {2048byes(2x ISO PIPEs) + 256bytes(4x INT PIPEs)} for high-speed operation.
| #define UX_SYNERGY_HC_BUSWAIT_CALC_FREQ_PCLK_CYC (17142857U) |
Register access wait cycles for USBHS controller. 7cycles at Peripheral clock 120MHz
| #define UX_SYNERGY_HC_COMMAND_STATUS_RESET (0) |
Define Synergy initialization values.
| #define UX_SYNERGY_HC_DCP (0) |
Define Synergy HCOR command/status bitmaps.
| #define UX_SYNERGY_HC_ED_BRDY (0x00000001U) |
Define Synergy physical endpoint definitions.
| #define UX_SYNERGY_HC_FIFO_READING (2) |
Define Synergy FIFO read completion code.
| #define UX_SYNERGY_HC_FIFO_WRITING (2) |
Define Synergy FIFO write completion code.
| #define UX_SYNERGY_HC_MAIN_OSC_24MHz (24000000U) |
Supported USBMCLK frequency for S7G2 and S5D9.
| #define UX_SYNERGY_HC_PHYSLEW_SLEW_SLEWR00 (1U<<0) |
PHY Cross Point Adjustment, note that Hardware Manual to be updated(0xE->0x5)
| #define UX_SYNERGY_HC_PIPE0_SIZE (256) |
Define Synergy fifo definition.
| #define UX_SYNERGY_HC_PIPESEL_NO_PIPE 0x000f |
Define Synergy PIPE selection definitions.
| #define UX_SYNERGY_HC_PORT_ENABLED (1) |
Define Synergy Root hub states.
| #define UX_SYNERGY_HC_SYSCFG (0x00UL) |
Protection against no definition of Synergy controller.
| #define UX_SYNERGY_HC_SYSCFG_SCKE (1U<<10) |
Define Synergy control register values.
| #define UX_SYNERGY_TD_SETUP_PHASE (0x00010000) |
Define Synergy TD bitmap.
| void usbfs_resume_isr | ( | void | ) |
VBINT (VBUS interrupt), RESM (Resume interrupt), OVRCR (Over current input), BCHG (Change interrupt), and PDDETINT0 (Bus change interrupt) fire this ISR. This is only used for canceling following standby modes.
| VOID ux_dcd_synergy_buffer_empty_interrupt | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| ULONG | flag | ||
| ) |
This function processes the BEMP interrupt for the specific endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to physical Endpoint(ED) control block |
| [in] | flag | Flag to enable or disable the buffer empty interrupt. |
| VOID ux_dcd_synergy_buffer_notready_interrupt | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| ULONG | flag | ||
| ) |
This function processes the NRDY(Not Ready) interrupt for the specific endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to physical Endpoint(ED) control block |
| [in] | flag | Flag for DCD synergy enable or disable. |
| UINT ux_dcd_synergy_buffer_read | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function reads from a specified pipe into a buffer.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| UX_SUCCESS | Read a data from buffer successfully. |
| UX_ERROR | Unable to read a data from buffer. |
| VOID ux_dcd_synergy_buffer_ready_interrupt | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| ULONG | flag | ||
| ) |
This function enable or disable the BRDY(Ready) interrupt for the pipe.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| [in] | flag | Check whether DCD synergy is enable or disable. |
| UINT ux_dcd_synergy_buffer_write | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function writes a data from input buffer to the specified PIPE.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| UX_SUCCESS | Write a data to FIFO(D0, D1 and C) successfully. |
| UX_ERROR | Unable to write a data to FIFO(D0, D1 and C). |
| VOID ux_dcd_synergy_current_endpoint_change | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| ULONG | direction | ||
| ) |
This function configures the FIFO as per the request specified in endpoint descriptor.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| [in] | direction | Endpoint direction |
| ULONG ux_dcd_synergy_data_buffer_size | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function returns the size of the data buffer and selects the specified pipe.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| buffer_size | Maximum packet size. |
| UINT ux_dcd_synergy_endpoint_create | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_ENDPOINT * | endpoint | ||
| ) |
This function creates a physical endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | endpoint | Pointer to a Device Controller Endpoint structure. |
| UX_SUCCESS | Endpoint is created successfully. |
| UX_ERROR | Buffer is not free or endpoint creation is unsuccessful. |
| UX_NO_ED_AVAILABLE | Endpoint is already in use. |
| UINT ux_dcd_synergy_endpoint_destroy | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_ENDPOINT * | endpoint | ||
| ) |
This function will destroy a physical endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | endpoint | Pointer to a Device Controller Endpoint structure. |
| UX_SUCCESS | Endpoint is destroyed successfully. |
| VOID ux_dcd_synergy_endpoint_nak_set | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function sets a NAK(Not Acknowledged) to an endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| UINT ux_dcd_synergy_endpoint_reset | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_ENDPOINT * | endpoint | ||
| ) |
This function will reset a physical endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | endpoint | Pointer to a Device Controller Endpoint structure. |
| UX_SUCCESS | Endpoint is reset successfully. |
| UX_NO_ED_AVAILABLE | Device Controller Endpoint structure pointer is NULL |
Abort the transfer request on this endpoint.
| UINT ux_dcd_synergy_endpoint_stall | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_ENDPOINT * | endpoint | ||
| ) |
This function will stall a physical endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | endpoint | Pointer to a Device Controller Endpoint structure. |
| UX_SUCCESS | Endpoint is stalled successfully. |
| UX_NO_ED_AVAILABLE | Device Controller Endpoint control pointer is Null. |
| UINT ux_dcd_synergy_endpoint_status | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG | endpoint_index | ||
| ) |
This function will retrieve the status of the endpoint.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | endpoint_index | Endpoint number who's status is to be known. |
| UX_ERROR | Endpoint already in use. |
| UX_FALSE | Endpoint is stalled. |
| UX_TRUE | Endpoint is not stalled. |
| VOID ux_dcd_synergy_fifo_dma_start_write | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UCHAR * | p_payload_buffer, | ||
| VOID * | p_fifo_add, | ||
| VOID * | p_fifo_ctrl, | ||
| VOID * | p_fifo_sel | ||
| ) |
USBX DCD DMA FIFO write - DMA start function.
| [in] | dcd_synergy | Pointer to the DCD control block |
| [in,out] | p_payload_buffer | Pointer to a payload buffer |
| [in] | p_fifo_add | FIFO register address |
| [in] | p_fifo_ctrl | FIFO port control register address |
| [in] | p_fifo_sel | FIFO port selection register address |
| ULONG ux_dcd_synergy_fifo_port_change | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| ULONG | direction | ||
| ) |
This function configures the FIFO port.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | ed | Pointer to a physical Endpoint(ED) control block |
| [in] | direction | Direction to switch |
| UX_ERROR | Unable to change fifo port. |
| UINT ux_dcd_synergy_fifo_read | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function reads from the hardware FIFO D0 or D1 and stores in the destination buffer.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | ed | : Pointer to a physical Endpoint(ED) control block |
| UX_ERROR | FIFO is not accessible. |
| UX_SYNERGY_DCD_FIFO_READ_OVER | FIFO read overflow. |
| UX_SYNERGY_DCD_FIFO_READ_SHORT | Short packet is received. |
| UX_SYNERGY_DCD_FIFO_READING | Continue reading FIFO. |
| UINT ux_dcd_synergy_fifo_read_dma | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| UINT | dma_bytes_to_transfer | ||
| ) |
This function reads the data from HW D0/ D1 FIFO using DMA.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | ed | : Pointer to a physical Endpoint(ED) control block |
| [in,out] | dma_bytes_to_transfer | : No of bytes to be transferred using DMA |
| UX_ERROR | FIFO is not accessible. |
| UX_SYNERGY_DCD_FIFO_READ_OVER | FIFO read overflow. |
| UX_SYNERGY_DCD_FIFO_READ_SHORT | Short packet is received. |
| UX_SYNERGY_DCD_FIFO_READING | Continue reading FIFO. |
| VOID ux_dcd_synergy_fifo_write_last_bytes | ( | UX_DCD_SYNERGY_PAYLOAD_TRANSFER * | p_payload, |
| VOID * | p_fifo, | ||
| ULONG | usb_base | ||
| ) |
USBX DCD FIFO write - Copy last bytes to FIFO by software if the rest bytes are less than FIFO access width.
| [in,out] | p_payload | Pointer to a payload transfer structure |
| [in] | p_fifo | FIFO register address |
| [in] | usb_base | USB controller hardware base address |
| VOID ux_dcd_synergy_fifo_write_software_copy | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_PAYLOAD_TRANSFER * | p_payload, | ||
| VOID * | p_fifo, | ||
| ULONG | fifo_sel | ||
| ) |
USBX DCD FIFO write by software copy. Call a subroutine for selected USB controller hardware.
| [in] | dcd_synergy | Pointer to the DCD control block |
| [in,out] | p_payload | Pointer to a payload transfer structure |
| [in] | p_fifo | FIFO register address |
| [in] | fifo_sel | FIFO select register |
| UINT ux_dcd_synergy_fifoc_read | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function reads from the hardware FIFO C and stores in the destination buffer.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | ed | : Pointer to a physical Endpoint(ED) control block |
| UX_ERROR | FIFO is not accessible. |
| UX_SYNERGY_DCD_FIFO_READ_OVER | FIFO read overflow. |
| UX_SYNERGY_DCD_FIFO_READ_SHORT | Short packet is received. |
| UX_SYNERGY_DCD_FIFO_READING | Continue reading FIFO. |
| UINT ux_dcd_synergy_fifoc_write | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function writes a data from a buffer into USB FIFO using CPU.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | ed | : Pointer to a physical Endpoint(ED) control block |
| UX_ERROR | FIFO is not accessible. |
| UX_SYNERGY_DCD_FIFO_WRITE_END | Status for fifo write ends. |
| UX_SYNERGY_DCD_FIFO_WRITING | Status for fifo multiple writes. |
| UINT ux_dcd_synergy_fifod_write | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed | ||
| ) |
This function writes a buffer to FIFOD0 or FIFOD1.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | ed | : Pointer to a physical Endpoint(ED) control block |
| UX_ERROR | FIFO is not accessible. |
| UX_SYNERGY_DCD_FIFO_WRITE_END | Write ends of FIFO. |
| UX_SYNERGY_DCD_FIFO_WRITING | Continue multiple write to FIFO. |
| UINT ux_dcd_synergy_fifod_write_dma | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_ED * | ed, | ||
| UINT | dma_bytes_to_transfer | ||
| ) |
This function writes a buffer to FIFOD0 or FIFOD1 using DMA.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | ed | : Pointer to a physical Endpoint(ED) control block |
| [in,out] | dma_bytes_to_transfer | : No of bytes to be transferred using DMA |
| UX_ERROR | FIFO is not accessible. |
| UX_SYNERGY_DCD_FIFO_WRITE_END | Write ends of FIFO. |
| UX_SYNERGY_DCD_FIFO_WRITING | Continue multiple write to FIFO. |
| UX_SYNERGY_DCD_FIFO_WRITE_ERROR | Return error if timeout occurs or endpoint reset occurs. |
Setup DMA transfer.
Start DMA transfer by software control.
Wait till DMA transfer is done.
Return error, if semaphore timeouts or endpoint reset occurs.
Wait for certain time - if the buffer is not ready return error
Clear the DELSR.n.IR flag by starting the dummy DMA transfer.
| UINT ux_dcd_synergy_frame_number_get | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG * | frame_number | ||
| ) |
This function will return the frame number currently used by the controller. This function is mostly used for isochronous purposes.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | frame_number | : Pointer to a frame number in use |
| UX_SUCCESS | In use frame number is returned successfully. |
| UINT ux_dcd_synergy_function | ( | UX_SLAVE_DCD * | dcd, |
| UINT | function, | ||
| VOID * | parameter | ||
| ) |
This function act as interface between upper layer USBX device stack and synergy controller.
| [in,out] | dcd | : Pointer to a USBX control block. |
| [in,out] | function | : Function requested to be despatched. |
| [in,out] | parameter | : Pointer to requested function parameters. |
| UX_CONTROLLER_UNKNOWN | Desired controller is not specified. |
| UX_FUNCTION_NOT_SUPPORTED | DCD function is not supported by the controller. |
| UX_SUCCESS | DCD function despatched successfully. |
| UINT ux_dcd_synergy_initialize | ( | ULONG | dcd_io | ) |
This function initializes the USB slave controller for Renesas Synergy MCUs.
| [in,out] | dcd_io | Address of DCD |
This function calls:
* ux_dcd_synergy_initialize_common() | UINT ux_dcd_synergy_initialize_complete | ( | VOID | ) |
This function completes the initialization of the USB slave controller for the Renesas Synergy MCUs.
| UX_SUCCESS | USB slave is initialized successfully. |
| UINT ux_dcd_synergy_initialize_transfer_support | ( | ULONG | dcd_io, |
| UX_DCD_SYNERGY_TRANSFER * | p_transfer_instance | ||
| ) |
The function initializes the USB slave controller of the Renesas Synergy MCUs with associated DMA transfer modules.
| [in] | dcd_io | Address of the USB controller. |
| [in] | p_transfer_instance | Pointer to Synergy Transfer module instances. |
| UX_SUCCESS | Completed the USB controller initialization successfully. |
| UX_CONTROLLER_INIT_FAILED | Failed to initialize the USB controller. |
| UX_MEMORY_INSUFFICIENT | Memory was not allocated properly for the Synergy DCD instance. |
Get the pointer to the Synergy DCD instance.
To begin, initialize D0 and D1 FIFO as free.
Initialize Transfer instances.
Setup the Transfer module for transmission.
DTC is not supported in S1 series - so no need of activation source
Clear the DMA transfer end callback flag.
Open Transfer module for transmission.
Setup the Transfer module for reception.
Note address mode in rx is reverst of tx: Destination (which is ram) is incremented and source (which is FIFO_1 buffer)
DTC is not supported in S1 series - so no need of activation source
Clear the DMA transfer end callback flag.
Open Transfer module for reception.
Return successful completion.
| VOID ux_dcd_synergy_interrupt_handler | ( | VOID | ) |
This function is the interrupt handler for the synergy controller.
The controller will trigger an interrupt when something happens on an endpoint whose mask has been set in the interrupt enable register.
Get the pointer to the DCD.
Get the pointer to the synergy DCD.
Get the pointer to the device.
Read the interrupt status register from the controller.
Check if we have an RESUME.
Check the source of the interrupt. Is it VBUS transition?
Check the source of the interrupt. Is it Device State transition (DVST) ?
We enter this state when there is a Bus Reset.
If the device is marked as configured, the device is reset.
Decide what speed is used by the host, read DVSTCTR and isolate speed.
Check if we have a BEMP interrupt.
Check if we have a BRDY interrupt.
Check if we have a NRDY interrupt.
Check if we have a SETUP transaction phase.
| VOID ux_dcd_synergy_register_clear | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function clears a bit in a register of the synergy.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | synergy_register | : Register to clear |
| [in,out] | value | : Value to clear |
| ULONG ux_dcd_synergy_register_read | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG | synergy_register | ||
| ) |
This function reads a synergy USB register.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | synergy_register | : Register to read |
| dcd_reg | Value read from USB register. |
| VOID ux_dcd_synergy_register_set | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function set a bit in synergy USB register.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | synergy_register | : Register to set |
| [in,out] | value | : Value to set |
| VOID ux_dcd_synergy_register_write | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function writes a bit in synergy USB register.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | synergy_register | : Register to write |
| [in,out] | value | : Value to write |
| UINT ux_dcd_synergy_remote_wakeup | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG * | parameter | ||
| ) |
This function is called when the device wants to wake up the host.
| [in] | dcd_synergy | Pointer to a DCD control block |
| [in] | parameter | Pointer to a remote wakeup parameter. |
| UX_SUCCESS | Remote wakeup signaled to the USB HOST successfully. |
| UX_ERROR | Remote wakeup signal failed from DEVICE to the USB HOST. |
| UINT ux_dcd_synergy_transfer_abort | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_TRANSFER * | transfer_request | ||
| ) |
This function will terminate the transfer.
| [in] | dcd_synergy | : Pointer to a DCD control block |
| [in] | transfer_request | : Pointer to transfer request |
| UX_SUCCESS | Transfer Abort is initiated successfully. |
Set the ACLRM bit to 1 and then to 0 for clearing FIFO buffers.
Clear the FIFO buffer memory.
| UINT ux_dcd_synergy_transfer_callback | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_TRANSFER * | transfer_request, | ||
| ULONG | interrupt_status, | ||
| ULONG | ctsq_mask | ||
| ) |
This function is invoked under ISR when an event happens on a specific endpoint.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | transfer_request | : Pointer to USBX Device Transfer Request structure |
| [in,out] | interrupt_status | : Check if we have SETUP condition or BRDY or BEMP interrupt. |
| [in,out] | ctsq_mask | : Mask to isolate the CTSQ field. |
| UX_SUCCESS | Function is invoked under ISR successfully. |
| UINT ux_dcd_synergy_transfer_request | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_SLAVE_TRANSFER * | transfer_request | ||
| ) |
This function will initiate a transfer to a specific endpoint. If the endpoint is IN, the endpoint register will be set to accept the request. If the endpoint is IN, the endpoint FIFO will be filled with the buffer and the endpoint register set.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_SUCCESS | Transfer to a specific endpoint is initiated successfully. |
| ux_slave_transfer_request_completion_code | Pointer to structure UX_SLAVE_TRANSFER(transfer request completion code). |
| UX_TRANSFER_ERROR | Transfer is completed with error. |
Set the ACLRM bit to 1 and then to 0 for clearing FIFO buffers.
Clear the D1 FIFO buffer memory.
Clear the CFIFO buffer memory.
Clean the pending semaphore due to timeout on this transfer request.
Check the completion code, and if it is not successful abort this transfer and return the error to the caller
Check the completion code, and if it is not successful abort this transfer and return the error to the caller
| UINT ux_dcd_synergy_uninitialize | ( | ULONG | dcd_io | ) |
USBX DCD un-initialization the USB controller.
| [in] | dcd_io | Address of the USB controller. |
| UX_SUCCESS | Completed the USB controller Un-initialization successfully. |
| UX_DCD_SYNERGY_UNINIT_FAILED | Failed to Un-initialize the USB controller. |
Disable interrupt requests
uninitialize and disable DMA support
Stop the clock to the USB module. The SCKE clearing is required for USBFS controller but not for USBHS
Reset USB Module.
Clear the Pending IRQ in NVIC
Disable the IRQ in NVIC
Stop the module usage
Free up resource.
| UINT ux_dcd_synergy_uninitialize_transfer_support | ( | ULONG | dcd_io | ) |
The function un-initializes the USB slave controller of the Renesas Synergy MCUs with associated DMA transfer modules.
| [in] | dcd_io | Address of the USB controller. |
| UX_SUCCESS | Completed the USB controller Un-initialization successfully. |
| UX_DCD_SYNERGY_UNINIT_FAILED | Failed to Un-initialize the USB controller. |
| VOID ux_dcd_synergy_usb_status_register_clear | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function clears a bit in a status register of the synergy.To clear the status bits, need to write 0 only to the bits to be cleared. Write 1 to the other bits.
| [in,out] | dcd_synergy | : Pointer to a DCD control block |
| [in,out] | synergy_register | : Register to clear |
| [in,out] | value | : Value to clear |
| VOID ux_dcd_synergy_write_dma_configure | ( | UX_DCD_SYNERGY * | dcd_synergy, |
| UX_DCD_SYNERGY_PAYLOAD_TRANSFER * | p_payload, | ||
| ULONG | fifo_sel, | ||
| ULONG | endpoint_size | ||
| ) |
USBX DCD DMA write setup function. Call a subroutine for selected USB controller hardware.
| [in] | dcd_synergy | Pointer to the DCD control block |
| [in,out] | p_payload | Pointer to a payload transfer structure |
| [in] | fifo_sel | FIFO select register |
| [in] | endpoint_size | Endpoint size |
| VOID ux_hcd_synergy_asynch_queue_process | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function process the asynchronous transactions. The function will identify the USB interrupts occurred associated with an endpoint and will process the interrupts.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| VOID ux_hcd_synergy_asynch_queue_process_bemp | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the BEMP(Buffer Empty) interrupt that occurred on a specific ED.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_asynch_queue_process_brdy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the BRDY(Buffer Ready)interrupt that occurred on a specific ED.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_asynch_queue_process_nrdy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the NRDY(Not Ready) Interrupt that occurred on a specific ED.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_asynch_queue_process_sign | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the Setup transaction Error Interrupt.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_asynch_schedule | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function schedules new transfers from the control or bulk lists.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| UINT ux_hcd_synergy_asynchronous_endpoint_create | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will create an asynchronous endpoint. The control and bulk endpoints fall into this category.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to endpoint |
| UX_NO_ED_AVAILABLE | ED for new endpoint not available. |
| UX_NO_TD_AVAILABLE | Dummy TD not available for terminating the ED transfer chain. |
| UX_SUCCESS | Asynchronous endpoint created successfully. |
| UINT ux_hcd_synergy_asynchronous_endpoint_destroy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will destroy an asynchronous endpoint. The control and bulk endpoints fall into this category.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to endpoint |
| UX_ENDPOINT_HANDLE_UNKNOWN | Physical endpoint has not been initialized properly. |
| UX_SUCCESS | Asynchronous endpoint destroyed successfully. |
| VOID ux_hcd_synergy_buffer_empty_interrupt | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed, | ||
| ULONG | flag | ||
| ) |
This function enable or disable the BEMP(Buffer Empty) interrupt for the pipe.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to physical Endpoint(ED) control block |
| [in] | flag | : Check whether DCD synergy is enable or disable. |
Reset the BEMPE, NRDYE, BRDYE bits.
| VOID ux_hcd_synergy_buffer_notready_interrupt | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed, | ||
| ULONG | flag | ||
| ) |
This function enable or disable the NRDY(Not Ready) interrupt for the pipe.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to physical Endpoint(ED) control block |
| [in] | flag | : Check whether DCD synergy is enable or disable. |
| UINT ux_hcd_synergy_buffer_read | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function reads from a specified pipe into a buffer.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to a physical Endpoint(ED) control block |
| VOID ux_hcd_synergy_buffer_ready_interrupt | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed, | ||
| ULONG | flag | ||
| ) |
This function enable or disable the BRDY(Ready) interrupt for the pipe.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to physical Endpoint(ED) control block |
| [in] | flag | : Check whether DCD synergy is enable or disable. |
| UINT ux_hcd_synergy_buffer_write | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function writes data to the selected FIFO of the endpoint.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to a physical Endpoint(ED) control block |
| UX_SUCCESS | Buffer written to the specified PIPE successfully. |
| UINT ux_hcd_synergy_bulk_endpoint_create | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will create a bulk endpoint.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to a USBX Endpoint Container structure |
| UX_ERROR | PIPE is not available for bulk endpoint creation . |
| UX_SUCCESS | Bulk endpoints created successfully. |
| UX_NO_ED_AVAILABLE | ED for bulk endpoint is not available. |
| UX_NO_TD_AVAILABLE | Dummy TD for terminating the ED transfer chain is not available. |
Limit the max packet size to the size the HW supports.
| UINT ux_hcd_synergy_bulk_int_td_add | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function adds a transfer descriptor to an Bulk or INT ED.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to a Synergy ED structure |
| UX_SUCCESS | Transfer descriptor added successfully. |
Clear the BRDY and BEMP status for this pipe.
| UINT ux_hcd_synergy_control_endpoint_create | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will create a control endpoint.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to an Endpoint control block |
| UX_SUCCESS | Control endpoint created successfully. |
| UX_NO_ED_AVAILABLE | Failed to obtain an ED for control endpoint. |
| UX_NO_TD_AVAILABLE | Failed to obtain a TD for control endpoint. |
| UINT ux_hcd_synergy_control_td_add | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function adds a transfer descriptor to an ED.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to Synergy ED structure |
| UX_SUCCESS | Transfer descriptor added to an ED successfully. |
Get transmit descriptors.
Set TD into response pending state.
Check data, status for setup phase.
We are processing a SETUP phase. Set the device address register if different.
And store it. Note that the device address is not an index.
DEVADDm.USBSPD[1:0] is set by the Software after the speed of the device is obtained and reset after connecting/disconnecting the device every time. To set the TRNENSEL bit, when LS device is connected to FS Hub, we are indirectly examining the speed of the device by examining DEVADDm.USBSPD[1:0].
Check if the speed of the connected HUB is FS
Clear the address field first.
Store the new address but leave the MPS field intact.
Set the buffer address to be accessed.
Copy the payload of the control transfer into each register : Request.
Copy the payload of the control transfer into each register : Value.
Copy the payload of the control transfer into each register : Index.
Copy the payload of the control transfer into each register : Length.
Start transmission.
We are processing data/status stage of control transfer. Check direction now.
This is an IN. Reset the PID mask register.
Set PIPE0 FIFO in in status.
Set DATA0-DATA1 toggle.
We are doing a read. Reset the Direction bit in the DCPCFG register.
Clear the FIFO buffer memory.
Enable the Buffer empty interrupt.
Enable the Ready interrupt.
Start transmission - set PID to NAK then set PID to BUF.
Must be an OUT now.
Clear the FIFO buffer memory.
Set PID to NAK.
Set DATA0-DATA1 toggle.
Write the buffer to the pipe.
Check status.
Return successful completion.
| UINT ux_hcd_synergy_controller_disable | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function will disable the Synergy controller. The controller will release all its resources (memory, IO ...). After this, the controller will not send SOF any longer. All transactions should have been completed, all classes should have been closed.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| UX_SUCCESS | Synergy controller disabled successfully. |
| VOID ux_hcd_synergy_current_endpoint_change | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed, | ||
| ULONG | direction | ||
| ) |
This function change the endpoint in the FIFO.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to Synergy ED structure |
| [in] | direction | : Direction to transfer |
| ULONG ux_hcd_synergy_data_buffer_size | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function returns the size of the buffer data.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to Synergy ED structure |
| buffer_size | buffer size |
| UINT ux_hcd_synergy_disable | ( | ULONG | ux_hcd_io | ) |
This function disables the Synergy HOST controller.
| [in] | ux_hcd_io | : HCD controller base address |
| UX_SUCCESS | HCD controller disabled successfully. |
| UX_SYNERGY_UNINIT_FAILED | HCD controller un-initialization failed. |
| UX_SYNERGY_ED* ux_hcd_synergy_ed_obtain | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function obtains a free ED from the ED list.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| UX_NULL | No available ED in the ED list. |
| VOID ux_hcd_synergy_ed_td_clean | ( | UX_SYNERGY_ED * | ed | ) |
This function process cleans the ED of all tds except the last dummy TD.
| [in,out] | ed | : Pointer to Synergy ED structure |
| VOID ux_hcd_synergy_endpoint_nak_set | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function sets a NAK(Not Acknowledged) to an endpoint.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to Synergy ED structure |
| UINT ux_hcd_synergy_endpoint_reset | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will reset an endpoint.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to an Endpoint control block |
| UX_SUCCESS | Endpoint reset successfully. |
| UINT ux_hcd_synergy_entry | ( | UX_HCD * | hcd, |
| UINT | function, | ||
| VOID * | parameter | ||
| ) |
This function is the entry function to the USB driver from the USB stack.
| [in] | hcd | : Pointer to USBX Host Controller structure. |
| [in] | function | : Function for driver to perform |
| [in] | parameter | : Pointer to function parameter(s) |
| UX_SUCCESS | HCD function is dispatched successfully. |
| UX_CONTROLLER_UNKNOWN | Synergy controller is not known. |
| UX_FUNCTION_NOT_SUPPORTED | Function not supported. |
| ULONG ux_hcd_synergy_fifo_port_change | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed, | ||
| ULONG | direction | ||
| ) |
This function change the port of the FIFO.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to Synergy ED structure |
| [in] | direction | : Direction to transfer |
| synergy_register | Content of FIFO control register. |
| UX_ERROR | Port not changed successfully or unable to access FIFO. |
| UINT ux_hcd_synergy_fifo_read | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function read data from the FIFO configured for the PIPE(FIFO C, D0 or D1).
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to Synergy ED structure |
| UX_ERROR | Unable to access FIFO successfully. |
| UX_SYNERGY_HC_FIFO_READ_OVER | Status set to read overflow. |
| UX_SYNERGY_HC_FIFO_READ_SHORT | Short packet to read. |
| UX_SYNERGY_HC_FIFO_READING | Continue reading buffer. |
| VOID ux_hcd_synergy_fifo_write_software_copy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | payload_length, | ||
| UCHAR * | payload_buffer, | ||
| VOID * | fifo_addr, | ||
| ULONG | fifo_sel | ||
| ) |
USBX HCD CPU FIFO write by software copy. Call a suitable subroutine for selected USB controller hardware.
| [in] | hcd_synergy | Pointer to the HCD control block |
| [in] | payload_length | Payload length |
| [in] | payload_buffer | Payload buffer address |
| [in] | fifo_addr | FIFO register address |
| [in] | fifo_sel | FIFO select register |
| VOID ux_hcd_synergy_fifo_write_software_copy_remaining_bytes | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | payload_length, | ||
| UCHAR * | payload_buffer, | ||
| VOID * | fifo_addr | ||
| ) |
USBX HCD CPU FIFO write - Copy remaining bytes to FIFO by software if the rest bytes are less than FIFO access width.
| [in] | hcd_synergy | Pointer to the HCD control block |
| [in,out] | payload_length | Payload length |
| [in,out] | payload_buffer | Payload buffer address |
| [in,out] | fifo_addr | FIFO register address |
| UINT ux_hcd_synergy_fifoc_write | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function writes a buffer to FIFOC.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to Synergy ED structure |
| UX_ERROR | Unable to access FIFO successfully. |
| UX_SYNERGY_HC_FIFO_WRITE_END | Writing at ends. |
| UX_SYNERGY_HC_FIFO_WRITE_SHORT | Writing short data. |
| UX_SYNERGY_HC_FIFO_WRITING | Doing multiple writes. |
| UINT ux_hcd_synergy_fifod_write | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function writes a buffer data to FIFOD0 or FIFOD1.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to Synergy ED structure |
| UX_ERROR | Unable to access FIFO successfully. |
| UX_SYNERGY_HC_FIFO_WRITE_END | Writing at ends. |
| UX_SYNERGY_HC_FIFO_WRITE_SHORT | Writing short data. |
| UX_SYNERGY_HC_FIFO_WRITING | Doing multiple writes. |
| UINT ux_hcd_synergy_frame_number_get | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG * | frame_number | ||
| ) |
This function will return the frame number currently used by the controller. This function is mostly used for isochronous purposes and for timing.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | frame_number | : Frame number to set |
| UX_SUCCESS | Frame number returned successfully. |
| VOID ux_hcd_synergy_frame_number_set | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | frame_number | ||
| ) |
This function will set the current frame number to the one specified. This function is mostly used for isochronous purpos.es.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | frame_number | : Frame number to set |
| UINT ux_hcd_synergy_initialize | ( | UX_HCD * | hcd | ) |
This function initializes the Synergy controller.
| [in,out] | hcd | : Pointer to USBX host controller structure. |
| UINT ux_hcd_synergy_initialize_transfer_support | ( | UX_HCD * | hcd, |
| const UX_HCD_SYNERGY_TRANSFER * | p_transfer_instance | ||
| ) |
USBX HCD Transfer Support with DMA support.
| [in,out] | hcd | Pointer to the USBX HCD control block. |
| [in] | p_transfer_instance | Pointer to Transfer module instances. |
| UX_SUCCESS | Initialize hcd transfer support successfully. |
| UX_CONTROLLER_INIT_FAILED | Failed in Transfer module setup, or Unsupported USB controller was specified. |
| UX_SEMAPHORE_ERROR | Failed in creating a semaphore used for DMA transfer. |
| UX_MEMORY_INSUFFICIENT | Failed in allocation memory. |
| UINT ux_hcd_synergy_interrupt_endpoint_create | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will create an interrupt endpoint. The interrupt endpoint has an interval of operation from 1 to 255. The Synergy has no hardware scheduler but we still build an interrupt tree similar to the OHCI controller.
This routine will match the best interval for the Synergy hardware. It will also determine the best node to hook the endpoint based on the load that already exists on the horizontal ED chain.
The tricky part is to understand how the interrupt matrix is constructed. We have used eds with the skip bit on to build a frame of anchor eds. Each ED creates a node for an appropriate combination of interval frequency in the list.
After obtaining a pointer to the list with the lowest traffic, we traverse the list from the highest interval until we reach the interval required. At that node, we anchor our real ED to the node and link the ED that was attached to the node to our ED.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to an Endpoint control block |
| UX_SUCCESS | Interrupt endpoint created successfully. |
| UX_ERROR | Available pipe is not found for interrupt endpoint. |
| UX_NO_ED_AVAILABLE | Failed to obtain an ED for new endpoint. |
| UX_NO_TD_AVAILABLE | Failed to obtain a TD for terminating the ED transfer chain. |
| VOID ux_hcd_synergy_interrupt_handler | ( | UINT | hcd_index | ) |
This function is the interrupt handler for the Synergy USB HS controller. Normally an interrupt occurs from the controller when there is either a EOF signal and there has been transfers within the frame or when there is a change on one of the downstream ports.
All we need to do in the ISR is scan the controllers to find out which one has issued a IRQ. If there is work to do for this controller we need to wake up the corresponding thread to take care of the job.
| [in] | hcd_index | : HCD number |
Check if the controller is operational, if not, skip it.
Examine the source of interrupts. Check for SOF signal.
Check for Over Current condition.
Check if we have a BEMP interrupt.
Do we have a BRDY interrupt ?
Do we have a NRDY interrupt ?
Check for attach signal.
Is it a detach signal ?
Check for BCHG signal.
Is it a EOFERR signal.
Did we get a SACK interrupt ?
Did we get a SIGN interrupt ?
| VOID ux_hcd_synergy_iso_queue_process | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function process the isochronous transactions that happened in the last frame.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| VOID ux_hcd_synergy_iso_queue_process_bemp | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the BEMP(Buffer Empty) Interrupt that occurred on a specific ED used for Isochronous transfer.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_iso_queue_process_brdy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the BRDY(Buffer Ready)interrupt that occurred on a specific ED used for isochronous transfer.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_iso_queue_process_nrdy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function process the NRDY(Not Ready) Interrupt that occurred on a specific ED used for Isochronous transfer.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| VOID ux_hcd_synergy_iso_schedule | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function schedules new transfers from isochronous list.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| UINT ux_hcd_synergy_iso_td_add | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function adds a transfer descriptor to an Isochronous Endpoint Descriptor.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | ed | : Pointer to an Endpoint control block |
| UX_SUCCESS | A transfer descriptor was added to an Isochronous Endpoint Descriptor successfully. |
| Others | See Common Error Codes for other possible return codes or causes. This function calls : ux_hcd_synergy_buffer_write() |
| UINT ux_hcd_synergy_isochronous_endpoint_create | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function creates an isochronous endpoint.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to an Endpoint control block |
| UX_SUCCESS | Isochronous endpoint is created successfully. |
| UX_NO_ED_AVAILABLE | Failed to obtain an ED terminating the ED transfer chain. |
| UX_NO_TD_AVAILABLE | Failed to obtain a TD for new endpoint. |
| UX_SYNERGY_ISO_TD* ux_hcd_synergy_isochronous_td_obtain | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function obtains a free TD from the isochronous TD list.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| td | Pointer to Synergy ISO Trasfer Descriptor. |
| UX_NULL | TD not available in the TD list. |
| UX_SYNERGY_ED* ux_hcd_synergy_least_traffic_list_get | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function return a pointer to the first ED in the periodic tree that has the least traffic registered.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| min_bandwidth_ed | End descriptor interrupt Number(ed) |
| UINT ux_hcd_synergy_periodic_endpoint_destroy | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_ENDPOINT * | endpoint | ||
| ) |
This function will destroy an isochronous endpoint.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | endpoint | : Pointer to an Endpoint control block |
| UX_SUCCESS | Isochronous endpoint is destroyed successfully. |
| UX_ENDPOINT_HANDLE_UNKNOWN | Physical endpoint has not been initialized properly. |
| VOID ux_hcd_synergy_periodic_schedule | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function schedules new transfers from the periodic interrupt list.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| UINT ux_hcd_synergy_periodic_tree_create | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function creates the periodic static tree for the interrupt and isochronous eds.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| UX_SUCCESS | Periodic tree created successfully. |
| UX_NO_ED_AVAILABLE | Failed to obtain an ED. |
| UINT ux_hcd_synergy_port_disable | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will disable a specific port attached to the root HUB.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_SUCCESS | Port disabled successfully. |
| UX_PORT_INDEX_UNKNOWN | Invalid port . |
| UINT ux_hcd_synergy_port_enable | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will enable a specific port attached to the root HUB.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_SUCCESS | Port enabled successfully. |
| UX_PORT_INDEX_UNKNOWN | Invalid port. |
| UX_NO_DEVICE_CONNECTED | Device not connected properly. |
| UINT ux_hcd_synergy_port_reset | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will reset a specific port attached to the root HUB.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_SUCCESS | Port reset successfully. |
| UX_PORT_INDEX_UNKNOWN | Invalid port. |
| UX_NO_DEVICE_CONNECTED | Device not connected properly. |
| UINT ux_hcd_synergy_port_resume | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UINT | port_index | ||
| ) |
This function will resume a specific port attached to the root HUB. Present, this function is not supported for resume port.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_FUNCTION_NOT_SUPPORTED | Unsupported function. |
| ULONG ux_hcd_synergy_port_status_get | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will return the status for each port attached to the root HUB.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_PORT_INDEX_UNKNOWN | Invalid port. |
| port_status | Synergy Port status |
Check to see if this port is valid on this controller.
The port is valid, build the status mask for this port. This function returns a controller agnostic bit field.
Provides a delay of 100 ms to stabilize while initial power up
Find the number of enumeration events occurred on another HOST.
Wait for the semaphore to be put by the root hub or a regular hub.
| UINT ux_hcd_synergy_port_suspend | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will suspend a specific port attached to the root HUB. Present, this function is does not supported.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_FUNCTION_NOT_SUPPORTED | Unsupported function. |
| UINT ux_hcd_synergy_power_down_port | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will power down a specific port attached to the root HUB. Present, this function is does not supported.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_FUNCTION_NOT_SUPPORTED | Unsupported function. |
| UINT ux_hcd_synergy_power_on_port | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | port_index | ||
| ) |
This function will power a specific port attached to the root HUB. Present, this function is does not supported.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | port_index | : Port Index |
| UX_FUNCTION_NOT_SUPPORTED | Unsupported function. |
| VOID ux_hcd_synergy_power_root_hubs | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function will power the root HUB. Present, this function is does not supported.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| VOID ux_hcd_synergy_register_clear | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function clears flags in a synergy USB register.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | synergy_register | : Register to write |
| [in] | value | : Value to clear |
| ULONG ux_hcd_synergy_register_read | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | synergy_register | ||
| ) |
This function reads a data from synergy USB register.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | synergy_register | : Register to read |
| hcd_reg | Value read from the specified register(ULONG value). |
| VOID ux_hcd_synergy_register_set | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function sets flags in a synergy USB register.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | synergy_register | : Register to read |
| [in] | value | : Value to be set |
| VOID ux_hcd_synergy_register_status_clear | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function clears a bit in a status register of the synergy controller.To clear the status bits, need to write 0 only to the bits to be cleared. Write 1 to the other bits.
| [in,out] | hcd_synergy | : Pointer to a DCD control block |
| [in,out] | synergy_register | : Register to clear |
| [in,out] | value | : Value to clear |
| VOID ux_hcd_synergy_register_write | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| ULONG | synergy_register, | ||
| USHORT | value | ||
| ) |
This function writes a data to a Synergy USB register.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in] | synergy_register | : Register to write |
| [in] | value | : Value to write |
| UX_SYNERGY_TD* ux_hcd_synergy_regular_td_obtain | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function obtains a free TD from the regular TD list.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| td | A pointer to Synergy TD. |
| UX_NULL | Null pointer. |
| UINT ux_hcd_synergy_request_bulk_transfer | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_TRANSFER * | transfer_request | ||
| ) |
This function performs a bulk transfer request. A bulk transfer can be larger than the size of the Synergy buffer so it may be required to chain multiple tds to accommodate this transfer request. A bulk transfer is non blocking, so we return before the transfer request is completed.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_SUCCESS | Bulk transfer happened successfully. |
| UX_NO_TD_AVAILABLE | Unavailable New TD. |
Perform bulk transfer. If transfer request payload length is zero, transfer it once.
| UINT ux_hcd_synergy_request_control_transfer | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_TRANSFER * | transfer_request | ||
| ) |
This function performs a control transfer from a transfer request. The USB control transfer is in 3 phases (setup, data, status). This function will chain all phases of the control sequence before setting the Synergy endpoint as a candidate for transfer.
| [in,out] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_MEMORY_INSUFFICIENT | Insufficient memory to build the SETUP request. |
| UX_NO_TD_AVAILABLE | Unavailable New TD. |
| ux_transfer_request_completion_code | Pointer to USBX transfer request structure(request completion code). |
| UINT ux_hcd_synergy_request_interrupt_transfer | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_TRANSFER * | transfer_request | ||
| ) |
This function performs an interrupt transfer request. An interrupt transfer can only be as large as the MaxpacketField in the endpoint descriptor. This was verified at the USB layer and does not need to be reverified here.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_SUCCESS | Interrupt transfer request processed successfully. |
| UX_NO_TD_AVAILABLE | Unavailable new TD. |
| UINT ux_hcd_synergy_request_isochronous_transfer | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_TRANSFER * | transfer_request | ||
| ) |
This function performs an isochronous transfer request.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_SUCCESS | Isochronous transfer request processed successfully. |
| UX_NO_TD_AVAILABLE | Unavailable new TD. |
| UINT ux_hcd_synergy_request_transfer | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_TRANSFER * | transfer_request | ||
| ) |
This function is the handler for all the transactions on the USB. The transfer request passed as parameter contains the endpoint and the device descriptors in addition to the type of transaction de be executed. This function routes the transfer request to according to the type of transfer to be executed.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_ERROR | Error while Isolating the endpoint type and routing the transfer request. |
| UX_NO_DEVICE_CONNECTED | No device attached. |
| UINT ux_hcd_synergy_td_add | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_SYNERGY_ED * | ed | ||
| ) |
This function add new TD for control, Bulk or Interrupt endpoint.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in] | ed | : Pointer to Synergy ED structure |
| UX_SUCCESS | Transfer done successfully. |
| UINT ux_hcd_synergy_transfer_abort | ( | UX_HCD_SYNERGY * | hcd_synergy, |
| UX_TRANSFER * | transfer_request | ||
| ) |
This function will abort transactions attached to a transfer request.
| [in] | hcd_synergy | : Pointer to a HCD control block |
| [in,out] | transfer_request | : Pointer to transfer request |
| UX_SUCCESS | Transactions attached to transfer request are aborted successfully. |
| UX_ENDPOINT_HANDLE_UNKNOWN | Endpoint is not initialized properly. |
| UINT ux_hcd_synergy_uninitialize | ( | ULONG | ux_hcd_io | ) |
This function un-initializes the Synergy HOST controller.
| [in] | ux_hcd_io | : HCD controller base address |
| UX_SUCCESS | Completed the USB controller Un-initialization successfully. |
| UX_SYNERGY_UNINIT_FAILED | HCD controller un-initialization failed. |
Reset the BEMPE, NRDYE, BRDYE, SOFE bits.
Clear the INTENB1 bits.
Reset the BRDY, NRDY, BEMPE for all pipes.
Clear USB interrupt status0 register.
Clear USB interrupt status1 register.
Clear all the physical endpoint.
Disable pull-up/pull-down of the D+/D- line.
Disable USB clock operation.
uninitialize and disable DMA support
Stop the module usage
| UINT ux_hcd_synergy_uninitialize_transfer_support | ( | UX_HCD_SYNERGY * | hcd_synergy | ) |
This function un-initializes the transfer module associated with the USBX HOST controller.
| [in] | hcd_synergy | : HCD synergy controller instance. |
| UX_SUCCESS | Completed the transfer Un-initialization successfully. |
| UX_SYNERGY_UNINIT_FAILED | Failed to Un-initialize the USB controller. |