DAC Driver

Table of Contents

• DAC HAL Module Introduction
  • DAC HAL Module Features
  • DAC Hardware support details
• DAC HAL Module APIs Overview
• DAC HAL Module Operational Overview
  • DAC HAL Module Important Operational Notes and Limitations
    • DAC HAL Module Operational Notes
    • DAC HAL Module Limitations
• Including the DAC HAL Module in an Application
• Configuring the DAC HAL Module
  • DAC HAL Module Clock Configuration
  • DAC HAL Module Pin Configuration
• Using the DAC HAL Module in an Application

DAC HAL Module Introduction

The DAC HAL module provides a high-level API for digital-to-analog conversion applications and supports a dual-channel 12-bit D/A converter (DAC12) peripheral on Synergy MCUs.

DAC HAL Module Features

This module configures the dual-channel 12-bit D/A Converter (DAC12) to output one of 4096 voltage levels between the positive and negative reference voltages. The module includes configuration settings to:

• Set either a left-justified or right-justified 12-bit value format for the 16-bit input data registers
• Enable or disable output amplifiers
• Enable or disable charge pump
• Operate in synchronous anti-interference mode with the Analog-to-Digital Converter (ADC) module.

DAC HAL Module Block Diagram

DAC Hardware support details

The following hardware features are, or are not, supported by SSP for the DAC.

Legend:

Symbol	Meaning
✓	Available (Tested)
⌧	Not Available (Not tested/not functional or both)
N/A	Not supported by MCU

MCU Group	12-Bit	2 Channels Output	Module Stop Function	Event link function through ELC HAL driver *
S124	✓	N/A	✓	⌧
S128	N/A	N/A	N/A	⌧
S1JA	✓	N/A	✓	⌧
S3A1	✓	N/A	✓	⌧
S3A3	✓	N/A	✓	⌧
S3A6	✓	N/A	✓	⌧
S3A7	✓	✓	✓	⌧
S5D3	✓	✓	✓	⌧
S5D5	✓	✓	✓	⌧
S5D9	✓	✓	✓	⌧
S7G2	✓	✓	✓	⌧

• Note: The ELC event could be used instead of calling the DAC start() interface. This would have to be programmed by the user by setting up the link rather than using the ELC API. 

DAC HAL Module APIs Overview

The DAC HAL module defines APIs to open, close, start, stop and write to the DAC. A complete list of the available APIs, an example API call and a short description of each can be found in the following table. A table of status return values follows the API summary table.

DAC HAL Module API Summary

Function Name	Example API Call and Description
open	g_dac.p_api->open(g_dac.p_ctrl, g_dac.p_cfg) Initial Configuration.
close	g_dac.p_api->close(g_dac.p_ctrl) Close the D/A Converter.
write	g_dac.p_api->write(g_dac.p_ctrl, val) Write Sample value to the D/A Converter.
start	g_dac.p_api->start(g_dac.p_ctrl) Start the D/A Converter if it has not been started yet.
stop	g_dac.p_api->stop(g_dac.p_ctrl) Stop the D/A Converter if the converter is running.
versionGet	g_dac.p_api->versionGet(&version) Retrieve the API version with the version pointer.

Note

For more complete descriptions of operation and definitions for the function data structures, typedefs, defines, API data, API structures, and function variables, review the SSP User's Manual API References for the associated module.

Status Return Values

Name	Description
SSP_SUCCESS	API Call Successful.
SSP_ERR_NOT_OPEN	Unit is not open.
SSP_ERR_ASSERTION	Wrong parameter.
SSP_ERR_IN_USE	DAC resource is locked.
SSP_ERR_NOT_OPEN	The peripheral is not opened.

Note

Lower-level drivers may return common error codes. Refer to the SSP User's Manual API References for the associated module for a definition of all relevant status return values.

DAC HAL Module Operational Overview

The DAC HAL module configures the dual-channel 12-bit D/A converter (DAC12) to output one of 4096 voltage levels between positive and negative reference voltages. The module can be used to configure the 12-bit output to left‑or‑right‑justified format for 16-bit input data registers. The DAC HAL module can also enable or disable output amplifiers, or operate in synchronous anti-interference mode with the ADC HAL module.

DAC HAL Module Important Operational Notes and Limitations

DAC HAL Module Operational Notes

The DAC HAL module requires the following initialization steps:

• DAC module stop-bit cleared to zero.
• DAC channel output-enable set to one.

The DAC module stop-bit is cleared to zero at the time of an open call when the driver's instance counter is zero. The driver's instance counter is initialized to zero, incremented when a channel open returns successfully, and decremented when a channel close is called. The DAC module stop-bit is set to one when the driver's instance counter is decremented to zero on a close call.

The DAC channel output-enable is set to one when a channel write is called the first time after open was called successfully. The open call writes a zero to the dac_ctrl_t structure element channel_started. When write is called with channel_started cleared to zero, the DAC output-enable bit for that channel is set to one. The DAC output-enable for the channel is cleared to zero on close and stop calls.

DAC HAL Module Limitations

• Pin configuration is not implemented for the DAC HAL module. Currently, DA0 and DA1 outputs are enabled by the reset values in the pin configuration control register's ASEL field.
• Voltage reference selection for the DAC HAL module is not implemented. Currently, no reference is selected by the reset values in the D/A VREF control register (DAVREFCR) which is a valid condition.
• Configuration of DAC input-event triggering for conversion is not currently implemented. The default reset value (zero) of the control register DAE bit allows individual triggering for each channel.
• Event signal input for synchronization of the DAC HAL module conversions is not currently implemented.
• The charge pump feature shall be disabled when DAC12 configured as ACMPHS or OPAMP input.
• Refer to the latest SSP Release Notes for operational limitations related to this module.

Including the DAC HAL Module in an Application

This section describes how to include the DAC HAL Module in an application using the SSP configurator.

Note

This section assumes you are familiar with creating a project, adding threads, adding a stack to a thread and configuring a block within the stack. If you are unfamiliar with any of these items, refer to the first few chapters of the SSP User's Manual to learn how to manage each of these important steps in creating SSP-based applications.

To add the DAC Driver to an application, simply add it to a thread using the stacks selection sequence given in the following table. (The default name for the DAC Driver is g_dac0. This name can be changed in the associated Properties window.)

DAC HAL Module Selection Sequence

Resource	ISDE Tab	Stacks Selection Sequence
g_dac0 DAC Driver on r_dac	Threads	New Stack> Driver> Analog> DAC Driver on r_dac

When the DAC Driver on r_dac is added to the thread stack as shown in the following figure, the configurator automatically adds any needed lower‑level modules. Any modules needing additional configuration information have the box text highlighted in Red. Modules with a Gray band are individual modules that stand alone. Modules with a Blue band are shared or common; they need only be added once and can be used by multiple stacks. Modules with a Pink band can require the selection of lower-level modules; these are either optional or recommended. (This is indicated in the block with the inclusion of this text.) If the addition of lower-level modules is required, the module description include Add in the text. Clicking on any Pink banded modules brings up the New icon and displays possible choices.

DAC HAL Module Stack

Configuring the DAC HAL Module

The DAC HAL Module must be configured by the user for the desired operation. The available configuration settings and defaults for all the user-accessible properties are given in the properties tab within the SSP configurator and are shown in the following tables for easy reference. Only properties that can be changed without causing conflicts are available for modification. Other properties are locked and not available for changes and are identified with a lock icon for the locked property in the Properties window in the ISDE. This approach simplifies the configuration process and makes it much less error-prone than previous manual approaches to configuration. The available configuration settings and defaults for all the user-accessible properties are given in the Properties tab within the SSP Configurator and are shown in the following tables for easy reference.

Note

You may want to open your ISDE, create the module and explore the property settings in parallel with looking over the following configuration table settings. This will help orient you and can be a useful 'hands-on' approach to learning the ins and outs of developing with SSP.

Configuration Settings for the DAC HAL Module on r_dac

ISDE Property	Value	Description
Parameter Checking	BSP, Enabled, Disabled Default: BSP	Enable or disable the parameter error checking.
Name	g_dac0	Module name.
Channel	0	Set to 0 for output DA0 or 1 for output DA1.
Synchronize with ADC	Enabled, Disabled Default: Disabled	Set to true for anti-interference synchronization with the Analog-to-Digital Converter (ADC) Module. Set to false false if power supply interference between the analog modules is not a problem, or if asynchronous conversion by the DAC Module is desired.
Data Format	Right Justified, Left Justified Default: Right Justified	Set to zero, if 12-bit data values are loaded in bits 11 through 0, or right justified. Set to one, if 12-bit data values are loaded in bits 15 through 4, or left justified.
Output Amplifier	Enable, Disable Default: Disable	Set to true, if output amplifier hardware function is desired. Set to false to bypass output amplifier hardware function.
Charge Pump Enabled (Requires MOCO active)	Enable, Disable Default: Disable	Set to true, if charge pump hardware function is desired. Set to false to bypass charge pump hardware function.

Note

The example settings and defaults are for a project using the Synergy S7G2 MCU Group. Other MCUs may have different default values and available configuration settings.

DAC HAL Module Clock Configuration

The DAC HAL module does not require any specific clock configuration.

DAC HAL Module Pin Configuration

To use the DAC HAL module, the port pins for the channels receiving the analog input must be set as analog pins in the pin configurator. The following table lists a method to select pins within the SSP configuration window and the subsequent table illustrates configuration settings for DAC pins:

Pin Selection for the DAC HAL Module on r_dac

Resource	ISDE Tab	Pin selection Sequence
DAC	Pins	Select Peripherals> Analog: DAC12> DAC120.

Pin Configuration Settings for the DAC HAL Module on r_dac

Property	Value	Description
Module Name	DAC120	DAC Peripheral Module.
Operation Mode	Enabled, Disabled Default: Enabled	DAC Peripheral operation mode.
DA0	None, DA0 Default: None	DAC Output Pin.
DA1	None, DA1 Default: None	DAC Output Pin.

Note

The example settings are for a project using the Synergy S7G2 MCU Group and the SK-S7G2 Kit. Other Synergy MCUs and Synergy Kits may have different available pin configuration settings.

Using the DAC HAL Module in an Application

The typical steps in using the DAC HAL module in an application are:

1. Initialize the DAC HAL module using the dac_api_t::open API.
2. Write a data value using the dac_api_t::write API.
3. Start writing data using the dac_api_t::start API.
4. Continue writing data values as needed using the dac_api_t::write API.
5. Stop writing data using the dac_api_t::stop API.
6. Close the DAC HAL module using the dac_api_t::close API.

These common steps are illustrated in a typical operational flow diagram in the following figure:

Flow Diagram of a Typical DAC HAL Module Application