Synergy Software Package User's Manual
SD/MMC Driver and SDIO Driver

SDMMC HAL Module Introduction

The SDMMC (SD/MMC and SDIO) HAL module is used to read/write and control SDMMC media devices and SDIO cards. The SDMMC module can be used as a standalone SD card, eMMC or media driver, or it can be used with FileX and other compatible file systems. The SDMMC HAL module uses the SDMMC peripheral on the Synergy MCU.

SDMMC HAL Module Features

  • Supports the following memory devices: SDSC (SD Standard Capacity), SDHC (SD High Capacity), SDXC (SD Extended Capacity) and eMMC (embedded Multi Media Card)
    • Supports reading, writing and erasing SD and eMMC memory devices
    • Supports 1, 4 or 8-bit data busses (8-bit bus is supported for eMMC only)
    • Supports detection of hardware write protection (SD cards only)
    • Automatically selects between backwards compatible mode and high speed SRD mode (eMMC)
  • Supports SDIO
    • Supports SDIO single register access (CMD52)
    • Supports SDIO multiple register access (CMD53)
    • Supports SDIO interrupts
    • Automatically configures the clock to the maximum clock rate supported by both host (MCU) and device
sdmmc_BD.png
SDMMC HAL Module Block Diagram

SDMMC Hardware Support Details

Legend:

Symbol Meaning
Available (Tested)
Not Available (Not tested/not functional or both)
N/A Not supported by MCU 

 

MCU Group SD 1 bit SD 4 bit SDHC SDXC MMC 1 bit MMC 4 bit
S124 N/A N/A N/A N/A N/A N/A
S128 N/A N/A N/A N/A N/A N/A
S1JA N/A N/A N/A N/A N/A N/A
S3A1
S3A3
S3A6 N/A N/A N/A N/A N/A N/A
S3A7
S5D3
S5D5
S5D9
S7G2
MCU Group MMC 8 bit MMC Backward Compatibility Mode Card Detect: Insertion Card Detect: Removal Write Protect MMC High Speed SDR Mode
S124 N/A N/A N/A N/A N/A N/A
S128 N/A N/A N/A N/A N/A N/A
S1JA N/A N/A N/A N/A N/A N/A
S3A1
S3A3
S3A6 N/A N/A N/A N/A N/A N/A
S3A7
S5D3 See note See note
S5D5 See note See note
S5D9 See note See note
S7G2 See note See note

 Note: Available on some of the MCUs (for the group indicated in the table) based on the pin map.

MCU Group DMA Read DMA Write Single Block Read Single Block Write IO RW Direct IO RW Extended
S124 N/A N/A N/A N/A N/A N/A
S128 N/A N/A N/A N/A N/A N/A
S1JA N/A N/A N/A N/A N/A N/A
S3A1
S3A3
S3A6 N/A N/A N/A N/A N/A N/A
S3A7
S5D3
S5D5
S5D9
S7G2

SDMMC HAL Module APIs Overview

The SDMMC HAL module defines API functions including opening, reading, writing and closing. A complete list of the available API functions, an example API function call and a short description of each can be found in the following table. A table of status return values follows the API summary table.

SDMMC HAL Module API Summary

Function Name Example API Call and Description
open g_sdmmc.p_api->open(g_sdmmc.p_ctrl, g_sdmmc.p_cfg);
Open device channel for read/write and control. Initialize driver and hardware on first call.
read g_sdmmc.p_api->read(g_sdmmc.p_ctrl, &destination, start, count);
Read data from SD/MMC channel.
write g_sdmmc.p_api->write(g_sdmmc.p_ctrl, &source, start, count);
Write data to SDMMC channel.
control g_sdmmc.p_api->control(g_sdmmc.p_ctrl, command, &data);
Send control commands to the SD/MMC port and receive the status of the SD/MMC port.
close g_sdmmc.p_api->close(g_sdmmc.p_ctrl);
Close open SDMMC channel. Turns off hardware if last channel open.
versionGet g_sdmmc.p_api->versionGet(&version);
Get version of Block Media SD/MMC driver.
readIo g_sdmmc.p_api->readIo(g_sdmmc.p_ctrl, &data, function, address);
Read I/O data from an SDMMC channel.
writeIo g_sdmmc.p_api->writeIo(g_sdmmc.p_ctrl, &data, function, address, read_after_write);
Write I/O data to SDMMC channel.
readIoExt g_sdmmc.p_api->readIoExt(g_sdmmc.p_ctrl, &destination, function, address, count, transfer_mode, address_mode);
Read I/O data, extended, from an SDMMC channel.
writeIoExt g_sdmmc.p_api->writeIoExt(g_sdmmc.p_ctrl, &source, function, address, count, transfer_mode, address_mode);
Write I/O data, extended, to SDMMC channel.
IoIntEnable g_sdmmc.p_api->IoIntEnable(g_sdmmc.p_ctrl, enable);
Enables SDIO interrupt for SDMMC channel.
infoGet g_sdmmc.p_api->infoGet(g_sdmmc.p_ctrl, &info);
Get SDMMC channel info.
erase g_sdmmc.p_api->erase(g_sdmmc.p_ctrl, start, count);
Erase SDMMC sectors.
Note
For more complete descriptions of operation and definitions for the function data structures, typedefs, defines, API data, API structures, and function variables, review the SSP User's Manual API References for the associated module.

Status Return Values

Name Description
SSP_SUCCESS API Call Successful.
SSP_ERR_INVALID_ARGUMENT Parameter has invalid value.
SSP_ERR_IN_USE The channel specified has already been opened. No configurations were changed. Call the associated Close function or use associated Control commands to reconfigure the channel.
SSP_ERR_ASSERTION The pointer is NULL.
SSP_ERR_WRITE_PROTECTED SD or MMC card is Write Protected.
SF_INFO_NOT_AVAILABLE Information not available possibly because card has been removed or is defective.
SSP_ERR_NOT_OPEN The channel is not opened.
SSP_ERR_HW_LOCKED The hardware lock has already been acquired.
SSP_ERR_TRANSFER_BUSY The transfer is in progress.
SSP_ERR_CARD_NOT_READY The card is not ready yet.
SSP_ERR_NOT_ENABLED SDIO interrupt enable failed.
SSP_ERR_READ_FAILED Read operation failed.
SSP_ERR_WRITE_FAILED Write operation failed.
Note
Lower-level drivers may return common error codes. Refer to the SSP User's Manual API References for the associated module for a definition of all relevant status return values.

SDMMC HAL Module Operational Overview

The following descriptions cover the operational functions and requirements when using the SDMMC HAL module:

Interrupt Configurations:

Using SD/MMC with DTC:

  • Access Interrupt
  • DTC Interrupt

Using SD/MMC with DMAC:

  • Access Interrupt
  • DMAC Interrupt (in DMAC instance)

Using SDIO with DTC:

  • Access Interrupt
  • SDIO Interrupt
  • DTC Interrupt

Using SDIO with DMAC:

  • Access Interrupt
  • SDIO Interrupt
  • DMAC Interrupt (in DMAC instance)

The Card interrupt is optional and only available on MCU packages that have the SDHIn CD pin (n = channel number) available on the Pins tab of the Synergy Configuration tool.

Block Size Configuration

Block size configuration is provided for use with SDIO cards only.  For SDIO cards, block size may be configured to 1-512 bytes.  Block size must remain at the default 512 bytes for SD cards and e/MMC memory devices.

Card Detection Configuration

See Card Detection Limitations before using card detection in the SDMMC HAL driver.  If card detection is not available or not desired for the application, Card Detection must be set to Not Used in the Properties for the r_sdmmc instance in the Synergy Configuration tool.  To enable card detection, set Card Detection to CD Pin and Media Type to Card in the Properties for the r_sdmmc instance in the Synergy Configuration tool.

Access Interrupt Priority

When data transfers are not 4-byte aligned or not a multiple of 4 bytes, a software copy of the block size (up to 512 bytes) is done in the access interrupt.  This blocks other interrupts that are a lower or equal priority to the access interrupt until the software copy is complete.

General Timing Notes

Several functions in this driver block. sdmmc_api_t::open() and sdmmc_api_t::erase() block until the entire operation is complete.  sdmmc_api_t::read(), sdmmc_api_t::write(), sdmmc_api_t::readIo(), sdmmc_api_t::writeIo(), sdmmc_api_t::readIoExt(), and sdmmc_api_t::writeIoExt() block for a single command response cycle.  In a multithreaded system, care should be taken to use this driver in a lower priority thread if other threads require a response time faster than the time this driver could block for during one of these function calls.

Timing Notes for Open

The sdmmc_api_t::open() API completes the entire device identification and configuration process.  This involves several command-response cycles at a bus width of 1-bit and a bus speed of 400 kHz or less.

Timing Notes for Read, Write, ReadIoExtand WriteIoExt

The read and write media (sdmmc_api_t::read() and sdmmc_api_t::write()) and extended read and write SDIO APIs (sdmmc_api_t::readIoExt() and sdmmc_api_t::writeIoExt()) block until the response is received from the device. The data transfer operation is non-blocking and requires interrupts and a transfer instance, either DMAC or DTC. These APIs return SSP_SUCCESS to indicate that the initial operations have started successfully. The application must wait for a callback with the event SDMMC_EVENT_TRANSFER_COMPLETE or SDMMC_EVENT_TRANSFER_ERROR to indicate completion of the read or write.

Timing Notes for ReadIo and WriteIo

The SDIO sdmmc_api_t::readIo() and sdmmc_api_t::writeIo() APIs block until the response is received from the device.  The read or write operation is complete when these APIs return.

Timing Notes for Erase

The sdmmc_api_t::erase() API blocks until the erase operation is complete.  This may be several seconds or more depending on how many sectors are being erased.

SDIO Interrupts

Many SDIO cards use level interrupts, meaning the interrupt is not de-asserted until the interrupt is cleared on the device.  In order to ensure SDIO interrupts are cleared appropriately, one of the following methods are recommended:

  • Ensure the SDIO interrupt is cleared on the device before exiting the callback function with the event SDMMC_EVENT_SDIO.  If this method is chosen and any SDIO API must be used in the interrupt, the access interrupt must be a higher priority than the SDIO interrupt.
  • Disable the SDIO interrupt in the callback function with the event SDMMC_EVENT_SDIO using sdmmc_api_t::IoIntEnable().  Clear the SDIO interrupt elsewhere in the application, then re-enable SDIO interrupts if desired using sdmmc_api_t::IoIntEnable().

SDMMC HAL Module Important Operational Notes and Limitations

SDMMC HAL Module Operational Notes

SD HALA Compliance

When developing host devices that are compliant with the SD Specifications, the host must comply with the SD Host/Ancillary Product License Agreement (SD HALA).

SDMMC HAL Module Limitations

Data Alignment and Size

Data transfers should be 4-byte aligned and a multiple of 4 bytes in size whenever possible.  This recommendation applies to the read(), write(), readIoExt(), and writeIoExt() APIs.  When data transfers are 4-byte aligned and a multiple of 4-bytes, the r_sdmmc driver is zero copy and takes full advantage of hardware acceleration by the DMAC or DTC.  When data transfers are not 4-byte aligned or not a multiple of 4 bytes an extra CPU interrupt is required for each block transferred (see Access Interrupt Priority).

Card Detection Limitations

Card detection support in the r_sdmmc driver is limited.  Card detection is only available after sdmmc_api_t::open() is complete, and open() cannot be completed unless a card is inserted.  Card detection in the r_sdmmc driver is therefore only useful to detect card removal and reinsertion.  After reinsertion is detected, the driver must be closed and reopened, and card detection will not be available until the reopen is complete.  Card detection is available only on MCU packages that have the SDHIn CD pin (n = channel number) available on the Pins tab of the Synergy Configuration Tool.  If the MCU does not have the SDHIn CD pin, or card detection is not desired for the application, card detection must be disabled in the Properties for the r_sdmmc instance in the Synergy Configuration Tool.  An alternative to using the card detection feature of the r_sdmmc driver is to use an External IRQ instance and handle card detection at the application layer. If card detection is handled at the application layer, the sdmmc_api_t::open() should be called after card insertion is detected, and the sdmmc_api_t::close() should be called after card removal is detected.

Refer to the most recent SSP Release notes for the most up to date limitations for this module.

Including the SDMMC HAL Module in an Application

This section describes how to include the SDMMC HAL Module in an application using the SSP configurator.

Note
This section assumes you are familiar with creating a project, adding threads, adding a stack to a thread and configuring a block within the stack. If you are unfamiliar with any of these items, refer to the first few chapters of the SSP User's Manual to learn how to manage each of these important steps in creating SSP-based applications.

To add the SD/MMC Driver to an application, simply add it to a thread using the stacks selection sequence given in the following table. (The default name for the SD/MMC Driver is g_sdmmc0. This name can be changed in the associated Properties window.)

SDMMC HAL Module Selection Sequence

Resource ISDE Tab Stacks Selection Sequence
g_sdmmc0 SD/MMC driver on r_sdmmc Threads New Stack> Driver> Storage> SD/MMC Driver on r_sdmmc

When the SDMMC HAL module on r_sdmmc is added to the thread stack as shown in the following figure, the configurator automatically adds any needed lower‑level modules. Any modules needing additional configuration information have the box text highlighted in Red. Modules with a Gray band are individual modules that stand alone. Modules with a Blue band are shared or common; they need only be added once and can be used by multiple stacks. Modules with a Pink band can require the selection of lower-level modules; these are either optional or recommended. (This is indicated in the block with the inclusion of this text.) If the addition of lower-level modules is required, the module description include Add in the text. Clicking on any Pink banded modules brings up the New icon and displays possible choices.

sdmmc_MS.png
SDMMC HAL Module Stack

Configuring the SDMMC HAL Module

The SDMMC HAL Module must be configured by the user for the desired operation. The available configuration settings and defaults for all the user-accessible properties are given in the properties tab within the SSP configurator and are shown in the following tables for easy reference. Only properties that can be changed without causing conflicts are available for modification. Other properties are locked and not available for changes and are identified with a lock icon for the locked property in the Properties window in the ISDE. This approach simplifies the configuration process and makes it much less error-prone than previous manual approaches to configuration. The available configuration settings and defaults for all the user-accessible properties are given in the Properties tab within the SSP Configurator and are shown in the following tables for easy reference.

Note
You may want to open your ISDE, create the module and explore the property settings in parallel with looking over the following configuration table settings. This will help orient you and can be a useful 'hands-on' approach to learning the ins and outs of developing with SSP.

ConfigurationSettings for the SDMMC HAL Module on r_sdmmc

ISDE Property Value Description
Parameter Checking BSP, Enabled, Disabled
Default: BSP
Enable or disable parameter error checking.
Name g_sdmmc0 The name to be used for SDMMC module control block instance. This name is also used as the prefix of the other variable instances.
Channel 0 Select the channel.
Media Type Embedded, Card
Default: Embedded
Media is a card or an embedded device. This allows to firmware to know whether to look for card insertion/removal and write protect pins.
Bus Width 1 Bit, 4 Bits, 8 bits
Default: 4 Bits
Data bus with as defined by hardware interface. (8 Bits for eMMC only).
Block Size 512 Select the media block size.
Card Detection Not Used, CD Pin
Default: CD Pin
Select the card detection method.
Write Protection WP Pin, Not Used
Default: WP Pin
Select whether or not to use the write protect pin. Select Not Used if the MCU or device does not have a write protect pin.
Callback NULL (Required if not using FileX) Set to name of user callback function. Provides event that caused interrupt: SDMMC_EVENT_CARD_REMOVED, SDMMC_EVENT_CARD_INSERTED, SDMMC_EVENT_ACCESS, SDMMC_EVENT_SDIO, SDMMC_EVENT_TRANSFER_COMPLETE, SDMMC_EVENT_TRANSFER_ERROR.
Access Interrupt Priority Priority 0 (highest), Priority 1:14 Priority 15 (lowest - not valid if using ThreadX)
Default: Priority 12
Access interrupt priority selection.
Card Interrupt Priority Priority 0 (highest), Priority 1:14 Priority 15 (lowest - not valid if using ThreadX), Disabled
Default: Disabled
Card interrupt priority selection.
DTC Interrupt Priority Priority 0 (highest), Priority 1:14 Priority 15 (lowest - not valid if using ThreadX), Disabled
Default: Disabled
DTC interrupt priority selection.
Note
The example settings and defaults are for a project using the Synergy S7G2 MCU Group. Other MCUs may have different default values and available configuration settings.

Configuration Settings for the SDMMC HAL Module Lower Level Modules

Typically, only a small number of settings must be modified from the default for lower level drivers as indicated via the red text in the thread stack block. Notice that some of the configuration properties must be set to a certain value for proper framework operation and will be locked to prevent user modification. The following tables identify all the settings within the properties section for the module:

Configuration Settings for the Transfer Driver on r_dmac Software Activation

ISDE Property Value Description
Parameter Checking BSP, Enabled, Disabled
Default: BSP
Selects if code for parameter checking is to be included in the build.
Name g_transfer0 Module name.
Channel 0 Channel selection.
Mode Normal Mode selection.
Transfer Size 1 Byte Transfer size selection.
Destination Address Mode Fixed Destination address mode selection.
Source Address Mode Incremented Source address mode selection.
Repeat Area (Unused in Normal Mode Source Repeat area selection.
Destination Pointer NULL Destination pointer selection.
Source Pointer NULL Source pointer selection.
Number of Transfers 0 Number of transfers selection.
Number of Blocks (Valid only in Block Mode) 0 Number of blocks selection.
Activation Source (Must enable IRQ) Software Activation Activation source selection.
Auto Enable False Auto enable selection.
Callback (Only valid with Software start) NULL Callback selection.
Interrupt Priority Priority 0 (highest), Priority 1:14 Priority 15 (lowest - not valid if using ThreadX), Disabled
Default: Disabled
Interrupt priority selection.
Note
The example settings and defaults are for a project using the Synergy S7G2 MCU Group. Other MCUs may have different default values and available configuration settings.

Configuration Settings for the Transfer Driver on r_dtc Software Activation 1

ISDE Property Value Description
Parameter Checking BSP, Enabled, Disabled
Default: BSP
Selects if code for parameter checking is to be included in the build.
Software Start Enabled, Disabled
Default: Disabled
Software start selection.
Linker section to keep DTC vector table .ssp_dtc_vector_table Linker section to keep DTC vector table selection.
Name g_transfer0 Module name.
Mode Normal Mode selection.
Transfer Size 1 Byte Transfer size selection.
Destination Address Mode Fixed Destination address mode selection.
Source Address Mode Incremented Source address mode selection.
Repeat Area (Unused in Normal Mode Source Repeat area selection.
Interrupt Frequency After all transfers have completed Interrupt frequency selection.
Destination Pointer NULL Destination pointer selection.
Source Pointer NULL Source pointer selection.
Number of Transfers 0 Number of transfers selection.
Number of Blocks (Valid only in Block Mode) 0 Number of blocks selection.
Activation Source (Must enable IRQ) Software Activation 1 Activation source selection.
Auto Enable False Auto enable selection.
Callback (Only valid with Software start) NULL Callback selection.
ELC Software Event Interrupt Priority Priority 0 (highest), Priority 1:14 Priority 15 (lowest - not valid if using ThreadX), Disabled
Default: Disabled
ELC Software Event interrupt priority selection.
Note
The example settings and defaults are for a project using the Synergy S7G2 MCU Group. Other MCUs may have different default values and available configuration settings.

SDMMC HAL Module Clock Configuration

The SDMMC MCU peripheral (SDHI) uses the PCLKA for its clock source. There is no need to configure the clock specifically for the SDMMC peripheral unless you need to optimize the data rate. The SDMMC driver selects the appropriate built-in divider based on the PCLKA frequency and the maximum clock rate allowed by the SD, SDIO or eMMC device obtained at media device initialization.

SDMMC HAL Module Pin Configuration

Use the ISDE pin configurator to configure the I/O pins for SDMMC peripheral (SDHI). The drive capacity for each pin should be set to "Medium" or "High" for most boards and high-speed memory and SDIO devices.  The following table illustrates the method for selecting the pins within the SSP configuration window and the subsequent table illustrates an example selection for the pins:

Note
The operation mode selection determines what peripheral signals are available and what MCU pins are required.

Pin Selection Sequence for SDMMC HAL Module on r_riic

Resource ISDE Tab Pin selection Sequence
SDHI Pins Select Peripherals> Storage:SHDI> SDHI0
Note
The selection sequence assumes SCI1 is the desired hardware target for the driver.

Pin Configuration Settings for the SDHI Peripheral

Pin Configuration Property Value Description
Operation Mode Disabled,
Custom,
SD_MMC 1 bit
SD_MMC 4 bit
MMC 8 bit
Default: Custom
Select mode as per application.
CLK None, P413
Default: P413
Clock pin.
CMD None, P412
Default: P412
Command pin.
DAT0-7 None, PXXX
Default: PXXX
Data pin.
CD None, P903
Default: P903
Card detection pin.
WP None, P414
Default: P414
Card write protection pin.
SDA Disabled SDA Pin (when Simple I2C is used).
SCL Disabled SCL Pin (when Simple I2C is used).
Note
The example settings are for a project using the Synergy S7G2 MCU Group and the SK-S7G2 Kit. Other Synergy Kits and other Synergy MCUs may have different available pin configuration settings.

Using the SDMMC HALModule in an Application

The steps for using the SDMMC HAL module in a typical application are:

  1. Open the driver using the sdmmc_api_t::open() API.
  2. Read data from the card using the sdmmc_api_t::read() API or write data to the card using sdmmc_api_t::write() API.
  3. Wait for a callback with the event SDMMC_EVENT_TRANSFER_COMPLETE (meaning the operation completed successfully) or SDMMC_EVENT_TRANSFER_ERROR (meaning the operation did not complete successfully) after each time the sdmmc_api_t::read() API or the sdmmc_api_t::write() API is called.

These common steps are illustrated in a typical operational flow diagram in the following figure:

sdmmc_TA1.png
Flow Diagram of a Typical SDMMC HAL Module Application

The steps for using the SDMMC HAL module with an SDIO card in a typical application are:

  1. Open the driver using the sdmmc_api_t::open() API.
  2. Set or read back single registers using the sdmmc_api_t::readIo() API or the sdmmc_api_t::writeIo() API.  The operation is complete immediately after these calls and there is no need to wait for a callback.
  3. Set or read back multiple registers using the sdmmc_api_t::readIoExt() API or the sdmmc_api_t::writeIoExt() API.  The block size can be changed using the sdmmc_api_t::control() API between calls if necessary.
  4. Wait for a callback with the event SDMMC_EVENT_TRANSFER_COMPLETE (meaning the operation completed successfully) or SDMMC_EVENT_TRANSFER_ERROR (meaning the operation did not complete successfully) after each time the sdmmc_api_t::readIoExt() API or the sdmmc_api_t::writeIoExt() API is called.
  5. If the card requests an interrupt, the callback is called with the event SDMMC_EVENT_SDIO.  Handle the SDIO interrupt as described in the documentation for the card (see the SDIO Interrupts section of this documentation).  SDIO interrupts from the card can be enabled or disabled at any time using the sdmmc_api_t::IoIntEnable() API.

These common steps are illustrated in a typical operational flow diagram in the following figure:

sdmmc_TA2.png
Flow Diagram of a Typical SDMMC HAL Module Application