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Synergy Software Package User's Manual
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#include <bsp_feature.h>
Data Fields | |
| uint32_t | high_speed_freq_hz |
| Frequency above which high speed mode must be used. | |
| uint32_t | middle_speed_max_freq_hz |
| Max frequency for middle speed, 0 indicates not available. | |
| uint32_t | low_speed_max_freq_hz |
| Max frequency for low speed, 0 indicates not available. | |
| uint32_t | low_voltage_max_freq_hz |
| Max frequency for low voltage, 0 indicates not available. | |
| uint32_t | low_speed_pclk_div_min |
| Minimum divisor for peripheral clocks when using oscillator stop detect. | |
| uint32_t | low_voltage_pclk_div_min |
| Minimum divisor for peripheral clocks when using oscillator stop detect. | |
| uint32_t | hoco_freq_hz |
| HOCO frequency. | |
| uint32_t | main_osc_freq_hz |
| Main oscillator frequency. | |
| uint8_t | modrv_mask |
| Mask for MODRV in MOMCR. | |
| uint8_t | modrv_shift |
| Offset of lowest bit of MODRV in MOMCR. | |
| uint8_t | sodrv_mask |
| Mask for SODRV in SOMCR. | |
| uint8_t | sodrv_shift |
| Offset of lowest bit of SODRV in SOMCR. | |
| uint8_t | pll_div_max |
| Maximum PLL divisor. | |
| uint8_t | pll_mul_min |
| Minimum PLL multiplier. | |
| uint8_t | pll_mul_max |
| Maximum PLL multiplier. | |
| uint8_t | mainclock_drive |
| Main clock drive capacity. | |
| uint32_t | iclk_div: 4 |
| ICLK divisor. | |
| uint32_t | pllccr_type: 2 |
| 0: No PLL, 1: PLLCCR, 2: PLLCCR2 | |
| uint32_t | pll_src_configurable: 1 |
| Whether or not PLL clock source is configurable. | |
| uint32_t | has_subosc_speed: 1 |
| Whether or not MCU has subosc speed mode. | |
| uint32_t | has_lcd_clock: 1 |
| Whether or not MCU has LCD clock. | |
| uint32_t | has_sdram_clock: 1 |
| Whether or not MCU has SDRAM clock. | |
| uint32_t | has_usb_clock_div: 1 |
| Whether or not MCU has USB clock divisor. | |
| uint32_t | has_pclka: 1 |
| Whether or not MCU has PCLKA clock. | |
| uint32_t | has_pclkb: 1 |
| Whether or not MCU has PCLKB clock. | |
| uint32_t | has_pclkc: 1 |
| Whether or not MCU has PCLKC clock. | |
| uint32_t | has_pclkd: 1 |
| Whether or not MCU has PCLKD clock. | |
| uint32_t | has_fclk: 1 |
| Whether or not MCU has FCLK clock. | |
| uint32_t | has_bclk: 1 |
| Whether or not MCU has BCLK clock. | |
| uint32_t | has_sdadc_clock: 1 |
| Whether or not MCU has SDADC clock. | |
| uint32_t | set_bck_with_pckb: 1 |
| Whether or not BCK bits should be set with PCKB bits. | |
CGC MCU specific features.