*ISL28194 Macromodel * *Revision History: Rev.3,Nov. 2009 by Jian Wang *Rev.4, March 2010, Added/Correcting Input/Output headroom limits (by Jian Wang) *Intended use: This Pspice Macromodel is intended to give typical DC and AC *performance characteristics under a wide range of external circuit configurations *using compatible simulation platforms ¨C such as iSim PE. * *Device performance features supported by this model: *Typical, room temp., nominal power supply voltages used to produce the following characteristics *Open and closed loop I/O impedances *Open loop gain and phase *Closed loop bandwidth and frequency response peaking under different external conditions *Loading effects on closed loop frequency response *Input noise terms including 1/f effects *Slew rate *Input and Output Headroom limits to I/O voltage swing *Supply current at nominal specified supply voltages *Nominal input DC error terms (1/3 of specified data sheet test or specified limits *¨C intended to give 1¦Ò error term on one polarity) *Load current reflected into the power supply current * *Device performance features NOT supported by this model: *Harmonic distortion effects *Composite video differential gain and phase errors *Output current limiting (if any) *Disable operation (if any) *Thermal effects and/or over temperature parameter variation *Limited performance variation vs. supply voltage is modeled *Part to part performance variation due to normal process parameter spread *Any performance difference arising from different packaging * *LICENSE STATEMENT *The information in this SPICE model is protected under *the United States copyright laws. Intersil Corporation hereby *grants users of this macro-model hereto referred to *as "Licensee", a nonexclusive, nontransferable license to use *this model as long as the Licensee abides by the terms of this agreement. *Before using this macro-model, the Licensee should read this license. *If this Licensee does not accept these terms, *permission to use the model is not granted. *The Licensee may not sell, loan, rent, or license the macro-model, *in whole, in part, or in modified form, to anyone *outside the Licensee's company. The Licensee may *modify the macro-model to suit his/her specific applications, *and the Licensee may make copies of this macro-model for use within *their company only. *This macro-model is provided "AS IS, WHERE IS, AND WITH NO *WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT *NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS *FOR A PARTICULAR PURPOSE." *In no event will Intersil be liable for special, collateral, *incidental, or consequential damages in connection with or arising *out of the use of this macro-model. Intersil reserves the right to *make changes to the product and the macro-model without prior notice. * * connections: +input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | | .subckt ISL28194 Vin+ Vin- V+ V- Vout G_G5 V+ VV2 VV1 16 0.00000004 G_G10 22 V- VV2 VOUT 0.0000001 R_R16 VOUT V+ 100 C_C1 VV1 V+ 8n G_G6 V- VV2 VV1 16 0.00000004 C_Cin2 VIN- 0 1.8p D_DN2 104 103 DN D_D7 V+ 21 DX G_G3 V- VV1 13 12 0.001 E_EN 8 VIN+ 101 103 1 R_R7 V- VV1 10G R_R15 V- VOUT 100 R_R22 0 103 828k D_D4 18 V+ DX D_D3 V- 17 DX R_R10 V- VV2 25meg D_D8 V+ 22 DX G_G4 V+ VV1 13 12 0.001 M_M1 12 8 9 9 pmosisil + L=50u + W=50u V_V6 18 VV1 0.5Vdc R_R18 18 0 1G R_R8 VV1 V+ 10G R_R3 V- 12 100 D_D5 V- 21 DY V_V16 104 0 0.3Vdc V_V5 VV1 17 0.5Vdc R_R17 17 0 1G R_R4 V- 13 100 C_C3 V- VV2 0.001p D_D6 V- 22 DY I_I2 V+ 10 DC 100uA V_V15 102 0 0.3Vdc R_R1 9 10 10 C_Cin1 8 0 1.8p C_C2 V- VV1 8n D_DN1 102 101 DN M_M2 13 VIN- 11 11 pmosisil + L=50u + W=50u C_C4 VV2 V+ 0.001p G_G12 V+ VOUT V+ VV2 -0.01 R_R2 10 11 10 G_G11 VOUT V- VV2 V- -0.01 E_E1 16 V- V+ V- 0.5 R_R9 VV2 V+ 25meg R_R21 0 101 828k G_G9 21 V- VOUT VV2 0.0000001 I_I1 V- V+ DC 100.1uA .model pmosisil pmos (kp=34e-3 vto=10m) .model DN D(KF=3.2E-15 AF=1) .MODEL DX D(IS=1E-14 Rs=1) .MODEL DY D(IS=1E-15 BV=50 Rs=1) .ends ISL28194