Summary Drawing Report
G:/Analog Solutions PL/RH_ADC_Ref_Designs/RH_DAQ_Demo/Tim Lok FPGA Power Board/ISL7X148VMREFEV1ZA/worklib/isl7x148vmrefev1z_sch/physical/ISL7X148VMREFEV1ZA.brd
Mon Mar 18 10:04:32 2024

Drawing Statistics:
    Drawing Extents  XL(-17000.00)  YL(-11000.00)  XU(17000.00)  YU(11000.00)
    Dimensions in mils with 2 decimal places
    Layers:  Total(4)  Routing(4)  Planes(0)
    Design Thickness: 28.800000 mils
    Package Symbols:  Total(187)  Mirrored(40)  Embedded(0)  Pins(856)
    Mechanical Symbols:  Total(11)  Mirrored(0)  Pins(8)
    Format Symbols:  Total(3)
    DRC State: UP TO DATE
    DRC Errors: 0
    Short DRC: 0
    Waived DRC: 14
    Padstack Definitions: 68
    Dynamic shapes:  Total(13)  Out_of_date(0)
    Functions:   Assigned(480)  Unassigned(0)  Total(480)
    Poly Via (pVia) Sites:  0

Drilling Statistics:
    Minimum Drill Size (in):  0.018000
    Drills:  Total(561)  Standard NC(561)  Nonstandard(0)
    Holes:  Plated(549)  Non-Plated(12)
    MultiDrill Padstacks:  0
    Vias:  Thru(474)  BBVias(0)  Microvia(0)  HDI(0)

Connection Statistics:
    Connections:  W/Rats(488)  No/Rats(0)  Total(488)
    Already Connected:  W/Rats(488)  No/Rats(0)  Total(488)
    Missing Connections: W/Rats(0)  No/Rats(0)  Total(0)
    Dangling Connections (See logfile):  1
    Connection Completion:  W/Rats(100.00%)  No/Rats(0.00%)  Total(100.00%)  
    Manh Distance (inches):  176.60
    Trace Length (inches):  W/Rats(142.18)  No/Rats(0.00)  Total(142.18)
    Number of Vias:  W/Rats(474)  No/Rats(0)  Total(474)
    Vias per Connection:  W/Rats(0.97)  No/Rats(0.00)Total(0.97)
    SMD pins with attached clines:  310

Layout Statistics:
    Components:  Placed(187)  Unplaced(0)  Total(187)
    Component Classes:  IC(39)  IO(0)  Discrete(148)  Mechanical(0)  Other(0)
    Nets: W/Rats(116)  No/Rats(0)  Total(116)
    Pins: W/Rats(604)  No/Rats(0)  Unused(248)  Unplaced(0)  Total(852)
    Equivalent ICs (1 pin = 1/14 EIC):  60
    RatTs:  0
    Router Keepin (in):   (0.0000,0.0000) by (0.0000,0.0000)
    Layout area (sq in):  0.00
    Average ratlength (in):   0.4
    Rat density (in/sq in):  0.000
    Double-sided rat density (in/sq in):  0.000

Layout/Pin Density Statistics
Layer,Layout Area<BR>(sq in),Components,Pins,Layout Density<BR>(sq in/EIC),Pin Density<BR>(pins/sq in)
External(Double-Sided),0.00,187,856,0.000,0.000
Embedded(0),0.00,0,0,0.000,0.000
Design,0.00,187,856,0.000,0.000

Trace Layer Statistics:
Layer,Clines/Carcs,Shapes(voids),Rectangles,Lines/Arcs,Text,Components(Pins)
TOP,256,33(89),0,0,1,147(776)
LAYER_1,18,32(130),0,0,0,0(0)
LAYER_2,8,9(136),0,0,0,0(0)
BOTTOM,63,12(110),0,0,1,40(80)

Trace Width By Layer:
Layer,Widths (mils)
TOP,10.00 12.00 15.00 20.00 25.00 
LAYER_1,15.00 
LAYER_2,15.00 
BOTTOM,15.00 25.00 

