(NETLIST)
(FOR DRAWING: C:/PSD_Data/projects/Isl91211BII-ev1z-revA 1+1+1/ISL91211BII- EV1Z_RevA_1+1+1_02-20-2017.brd)
(GENERATED BY: ALLEGRO 16.6 S051 (v16-6-112EA))
(Mon Feb 20 13:13:12 2017)
$PACKAGES
6X9_BALL_ARRAY ! 91302A_6X9_BALL_ARRAY_ISL91211B ! ISL91211BIIZ ; U1 
'BJACK_108-0740-102' ! 'CON1_BJACK_108-0740-102_CON1' ! CON1 ; J6 J7 J35 ,
        J36 J37 J38 J57 J58 J64 J65 
CAP_SANYO_D2 ! 'NIC-ALUM-EL-CASE-T2_CAP_SANYO_D' ! 220uF ; C5 C6 C103 
CONN2 ! CON2_2_CONN2_CON2 ! CON2 ; J52 J55 J59 J67 
'CON_HDR_90147-1X02' ! 'CON2_CON_HDR_90147-1X02_CON2' ! CON2 ; J3 J15 J18 ,
        J56 J60 J61 J62 J63 J66 'J20(DNP)' 'J21(DNP)' 'J22(DNP)' 'J23(DNP)' 
'CON_HDR_90147-2X04' ! 'CON4_CON_HDR_90147-2X04_CON4' ! CON4 ; J14 
'CON_HDR_90151-3X10' ! 'CON10A_CON_HDR_90151-3X10_CON10' ! CON10A ; J24 
DFN10_118X118_197_EP ! 'ISL80101-ADJ_0_DFN10_118X118_19' ! 'ISL80101-ADJ' ; ,
        U4 
GT11SC ! G3T12AP_9_GT11SC_GT11MSCKE ! GT11MSCKE ; SW1 
IND_PIFE25201T ! 'TOKO-1608-SERIES_IND_PIFE25201T' ! 220nH ; L1 L2 L3 L4 
MTP500X ! 'T POINT R_MTP500X_EN' ! EN ; TP18 
MTP500X ! 'T POINT R_MTP500X_GND' ! GND ; TP2 TP4 TP5 TP7 TP9 TP10 TP21 ,
        TP23 TP27 TP28 
MTP500X ! 'T POINT R_MTP500X_I2C_SCL' ! I2C_SCL ; TP11 
MTP500X ! 'T POINT R_MTP500X_I2C_SDA' ! I2C_SDA ; TP12 
MTP500X ! 'T POINT R_MTP500X_INT' ! INT ; TP24 
MTP500X ! 'T POINT R_MTP500X_SPI_MISO' ! SPI_MISO ; TP16 
MTP500X ! 'T POINT R_MTP500X_SPI_MOSI' ! SPI_MOSI ; TP15 
MTP500X ! 'T POINT R_MTP500X_SPI_SCK' ! SPI_SCK ; TP13 
MTP500X ! 'T POINT R_MTP500X_SPI_SS' ! SPI_SS ; TP14 
MTP500X ! 'T POINT R_MTP500X_VCC_6V' ! VCC_6V ; TP1 
MTP500X ! 'T POINT R_MTP500X_WDOG_RST' ! WDOG_RST ; TP17 
'PG-TDSON-8' ! 'BSC011N03LS_PG-TDSON-8_BSC011N0' ! BSC011N03LS ; U5 U6 U7 ,
        U11 
SM0204 ! 0402_SM0204_DNP ! DNP ; C24 C25 C26 C27 C28 C29 C107 C108 C109 ,
        C110 C111 C112 C133 C134 C135 C136 C137 C138 C142 C143 C144 C145 ,
        C146 C147 
SM0402 ! RESISTOR_SM0402_10K ! 10K ; R111 
SM0402_DELTA ! '0402_SM0402_DELTA_0.1UF' ! '0.1uF' ; C126 C127 
SM0402_DELTA ! 0402_SM0402_DELTA_10UF ! 10uF ; C10 
SM0402_DELTA ! 0402_SM0402_DELTA_1UF ! 1uF ; C40 
SM0402_DELTA ! 0402_SM0402_DELTA_DNP ! DNP ; C9 C87 C88 C89 C90 
SM0402_NFM15 ! 'NIC-ALUM-EL-CASE-T2_1_SM0402_NF' ! DNP ; C95 C96 C97 C98 ,
        C99 C100 C101 C102 C113 C117 C119 C120 C149 C153 C154 C155 
SM0402_NFM15 ! 'NIC-ALUM-EL-CASE-T2_1_SM0402__1' ! '4.3uF' ; C41 C42 C43 ,
        C44 C77 C78 C79 C84 C114 C115 C116 C118 C148 C150 C151 C152 
SM0603 ! 0603_SM0603_0 ! 0 ; R73 R74 R100 R125 
SM0603_DELTA ! 0402_SM0603_DELTA_10UF ! 10uF ; C1 C2 C3 C4 C128 C129 
SM0603_DELTA ! '0603_SM0603_DELTA_0 OHM' ! '0 ohm' ; R41 
SM0603_DELTA ! 0603_SM0603_DELTA_0 ! 0 ; R76 R78 R81 R85 R94 R99 R122 R126 
SM0603_DELTA ! 0603_SM0603_DELTA_10UF ! 10uF ; C7 C8 
SM0603_DELTA ! '0603_SM0603_DELTA_1K OHM' ! '1K ohm' ; R31 R32 R39 R40 R42 ,
        R93 R129 
SM0603_DELTA ! 0603_SM0603_DELTA_22UF ! 22uF ; C16 C17 C18 C104 C105 C106 ,
        C130 C131 C132 C139 C140 C141 
SM0603_DELTA ! 0603_SM0603_DELTA_DNP ! DNP ; R75 R77 R79 R80 R82 R83 R84 ,
        R86 R95 R96 R97 R98 R123 R124 R127 R128 
SM0603_DELTA ! 'CAP NP_SM0603_DELTA_1000PF' ! 1000pF ; C92 
SM0603_DELTA ! 'CAP NP_SM0603_DELTA_10UF' ! 10UF ; C94 
SM0603_DELTA ! 'CAP NP_SM0603_DELTA_22UF' ! 22UF ; C60 C61 C62 C64 C91 C123 ,
        C125 C157 C159 
SM0603_DELTA ! 'CAP NP_SM0603_DELTA_82PF' ! 82pF ; C93 
SM0603_DELTA ! 'CAP NP_SM0603_DELTA_DNP' ! DNP ; C59 C63 C85 C86 C122 C124 ,
        C156 C158 
SM0603_DELTA ! RESISTOR_SM0603_DELTA_0 ! 0 ; R53 R62 R91 R92 R103 R108 R114 ,
        R119 
SM0603_DELTA ! RESISTOR_SM0603_DELTA_100 ! 100 ; R52 R54 R61 R63 R104 R105 ,
        R115 R116 
SM0603_DELTA ! RESISTOR_SM0603_DELTA_10K ! 10K ; R70 
SM0603_DELTA ! RESISTOR_SM0603_DELTA_1K ! 1k ; R72 R89 R90 R101 R112 
SM0603_DELTA ! 'RESISTOR_SM0603_DELTA_2.61K' ! '2.61k' ; R71 
SM0603_DELTA ! RESISTOR_SM0603_DELTA_DNP ! DNP ; R68 R69 R102 R113 
SMD2010 ! RESISTOR_SMD2010_0 ! 0 ; R87 
SMD2010 ! 'RESISTOR_SMD2010_0.04' ! '0.04' ; R55 R56 R57 R58 R64 R65 R66 ,
        R67 R106 R107 R109 R110 R117 R118 R120 R121 
SMD2010 ! RESISTOR_SMD2010_DNP ! DNP ; R88 
SOT23 ! 'NPN BCE_2_SOT23_NPN BCE' ! 'NPN BCE' ; Q1 Q4 Q7 Q9 
SOT23 ! 'PNP BCE_1_SOT23_PNP BCE' ! 'PNP BCE' ; Q2 Q5 Q6 Q8 
'SOT23-5A' ! 'OPAMP_SOT23-5A_OPA356' ! OPA356 ; U2 U3 U8 U12 
'TP-150C100P-RTP' ! 'KEYSTONE-PN-1514-150P100H_TP-15' ,
        ! 'KEYSTONE-PN-1514-150p100h' ; TP25 TP26 
'TSSOP14-65' ! 'MAX327_4_TSSOP14-65_MAX3023' ! MAX3023 ; U9 
USB_CONN_20 ! 'USBAPPLE-1_4_USB_CONN_20_I2C' ! I2C ; J42 
UTDFN6_63X63_197_EPA ! MAX327_0_UTDFN6_63X63_197_EPA_I ! isl9008A ; U10 
$NETS
'+3P3V' ; C127.2 C128.2 U9.12 U10.1 
5V_SPI ; J24.4 J24.6 R41.2 R88.2 
AVIN_FILT ; C9.2 C10.2 U1.F2 
B1 ; J15.1 R74.1 R81.2 R82.2 R83.2 
B2 ; J18.1 R94.2 R95.2 R96.2 R100.1 
B3 ; J56.1 R73.1 R75.2 R76.2 R77.2 
B4 ; J63.1 R122.2 R123.2 R124.2 R125.1 
B1RTN ; J15.2 R84.2 R85.2 R86.2 U1.D6 
B1SENSE ; R74.2 U1.E6 
B2RTN ; J18.2 R97.2 R98.2 R99.2 U1.E5 
B2SENSE ; R100.2 U1.E4 
B3RTN ; J56.2 R78.2 R79.2 R80.2 U1.E2 
B3SENSE ; R73.2 U1.E3 
B4RTN ; J63.2 R126.2 R127.2 R128.2 U1.F1 
B4SENSE ; R125.2 U1.E1 
BUCK1VOUT ; C41.1 C41.3 C42.1 C42.3 C43.1 C43.3 C44.1 C44.3 C95.1 C95.3 ,
        C96.1 C96.3 C97.1 C97.3 C98.1 C98.3 C130.2 C131.2 C132.2 C133.2 ,
        C134.2 C135.2 C136.2 C137.2 C138.2 J35.1 L3.2 R81.1 R82.1 R83.1 ,
        U5.5 U5.6 U5.7 U5.8 
BUCK2VOUT ; C77.1 C77.3 C78.1 C78.3 C79.1 C79.3 C84.1 C84.3 C99.1 C99.3 ,
        C100.1 C100.3 C101.1 C101.3 C102.1 C102.3 C104.2 C105.2 C106.2 ,
        C107.2 C108.2 C109.2 C110.2 C111.2 C112.2 J37.1 L2.2 R94.1 R95.1 ,
        R96.1 U6.5 U6.6 U6.7 U6.8 
BUCK3VOUT ; C16.2 C17.2 C18.2 C24.2 C25.2 C26.2 C27.2 C28.2 C29.2 C113.1 ,
        C113.3 C114.1 C114.3 C115.1 C115.3 C116.1 C116.3 C117.1 C117.3 ,
        C118.1 C118.3 C119.1 C119.3 C120.1 C120.3 J57.1 L1.2 R75.1 R76.1 ,
        R77.1 U7.5 U7.6 U7.7 U7.8 
BUCK4VOUT ; C139.2 C140.2 C141.2 C142.2 C143.2 C144.2 C145.2 C146.2 C147.2 ,
        C148.1 C148.3 C149.1 C149.3 C150.1 C150.3 C151.1 C151.3 C152.1 ,
        C152.3 C153.1 C153.3 C154.1 C154.3 C155.1 C155.3 J64.1 L4.2 R122.1 ,
        R123.1 R124.1 U11.5 U11.6 U11.7 U11.8 
EN ; SW1.2 TP18.1 U1.D1 
GND ; C1.1 C2.1 C3.1 C4.1 C5.2 C6.2 C7.1 C8.1 C9.1 C10.1 C16.1 C17.1 C18.1 ,
        C24.1 C25.1 C26.1 C27.1 C28.1 C29.1 C40.1 C41.2 C42.2 C43.2 C44.2 ,
        C59.2 C60.2 C61.2 C62.2 C63.2 C64.2 C77.2 C78.2 C79.2 C84.2 C87.1 ,
        C88.1 C89.1 C90.1 C91.2 C92.2 C94.2 C95.2 C96.2 C97.2 C98.2 C99.2 ,
        C100.2 C101.2 C102.2 C103.2 C104.1 C105.1 C106.1 C107.1 C108.1 ,
        C109.1 C110.1 C111.1 C112.1 C113.2 C114.2 C115.2 C116.2 C117.2 ,
        C118.2 C119.2 C120.2 C122.2 C123.2 C125.2 C126.1 C127.1 C128.1 ,
        C129.1 C130.1 C131.1 C132.1 C133.1 C134.1 C135.1 C136.1 C137.1 ,
        C138.1 C139.1 C140.1 C141.1 C142.1 C143.1 C144.1 C145.1 C146.1 ,
        C147.1 C148.2 C149.2 C150.2 C151.2 C152.2 C153.2 C154.2 C155.2 ,
        C156.2 C157.2 C159.2 J3.2 J7.1 J14.3 J14.4 J24.2 J24.10 J36.1 J38.1 ,
        J42.3 J42.15 J52.2 J55.2 J58.1 J59.2 J60.1 J61.1 J62.1 J65.1 J66.1 ,
        J67.2 'J20(DNP)'.2 'J21(DNP)'.2 'J22(DNP)'.2 'J23(DNP)'.2 Q2.3 Q5.3 ,
        Q6.3 Q8.3 R52.1 R54.1 R55.1 R56.1 R57.1 R58.1 R61.1 R63.1 R64.1 ,
        R65.1 R66.1 R67.1 R72.2 R78.1 R79.1 R80.1 R84.1 R85.1 R86.1 R89.1 ,
        R90.1 R97.1 R98.1 R99.1 R101.1 R104.1 R105.1 R106.1 R107.1 R109.1 ,
        R110.1 R112.1 R115.1 R116.1 R117.1 R118.1 R120.1 R121.1 R126.1 ,
        R127.1 R128.1 R129.2 TP2.1 TP4.1 TP5.1 TP7.1 TP9.1 TP10.1 TP21.1 ,
        TP23.1 TP25.1 TP26.1 TP27.1 TP28.1 U1.A3 U1.A4 U1.B3 U1.B4 U1.C3 ,
        U1.C4 U1.D4 U1.D5 U1.G3 U1.G4 U1.H3 U1.H4 U1.J3 U1.J4 U2.2 U3.2 ,
        U4.4 U4.5 U4.11 U8.2 U9.8 U9.11 U10.2 U12.2 
I2C_SCL ; J42.2 R31.1 TP11.1 U1.C1 
I2C_SDA ; J42.4 R32.1 TP12.1 U1.D2 
INT ; R40.1 TP24.1 U1.D3 
MOSI_MCU ; J24.8 U9.9 
N3978556 ; Q1.2 Q2.2 R53.1 
N3978584 ; R53.2 R54.2 U5.4 
N3978660 ; C85.2 R68.1 R91.1 U2.4 
N3978664 ; C85.1 Q1.1 Q2.1 R52.2 R91.2 U2.1 
N3981707 ; Q4.2 Q5.2 R62.1 
N3981735 ; R62.2 R63.2 U6.4 
N3981811 ; C86.2 R69.1 R92.1 U3.4 
N3981823 ; C86.1 Q4.1 Q5.1 R61.2 R92.2 U3.1 
N4105385 ; C91.1 R70.2 R87.1 R88.1 U4.9 U4.10 
N4105504 ; C92.1 U4.6 
N4105651 ; R70.1 U4.7 
N4106476 ; C93.2 R71.2 R72.1 U4.3 
N4227719 ; C124.2 R102.1 R103.1 U8.4 
N4227723 ; R104.2 R108.2 U7.4 
N4227771 ; Q6.2 Q7.2 R108.1 
N4227799 ; C124.1 Q6.1 Q7.1 R103.2 R105.2 U8.1 
N4266525 ; R111.2 U10.4 
N4305983 ; C158.2 R113.1 R114.1 U12.4 
N4305987 ; R115.2 R119.2 U11.4 
N4306035 ; Q8.2 Q9.2 R119.1 
N4306063 ; C158.1 Q8.1 Q9.1 R114.2 R116.2 U12.1 
N4390218 ; R39.2 SW1.3 
N4390222 ; R129.1 SW1.1 
PHA ; 'J20(DNP)'.1 L1.1 U1.A2 U1.B2 U1.C2 
PHB ; 'J21(DNP)'.1 L2.1 U1.A5 U1.B5 U1.C5 
PHC ; 'J23(DNP)'.1 L4.1 U1.G2 U1.H2 U1.J2 
PHD ; 'J22(DNP)'.1 L3.1 U1.G5 U1.H5 U1.J5 
PVIN ; C1.2 C2.2 C3.2 C4.2 C5.1 C6.1 C7.2 C8.2 C87.2 C88.2 C89.2 C90.2 ,
        C103.1 J3.1 J6.1 J14.1 J14.2 U1.A1 U1.A6 U1.B1 U1.B6 U1.G1 U1.H1 ,
        U1.H6 U1.J1 U1.J6 
SCK_MCU ; J24.7 U9.13 
SIG_IN1 ; J60.2 R89.2 U2.3 
SIG_IN2 ; J61.2 R90.2 U3.3 
SIG_IN3 ; J62.2 R101.2 U8.3 
SIG_IN4 ; J66.2 R112.2 U12.3 
SPI_MISO ; J24.5 TP16.1 U1.G6 
SPI_MOSI ; TP15.1 U1.F6 U9.6 
SPI_SCK ; TP13.1 U1.F4 U9.2 
SPI_SS ; R93.1 TP14.1 U1.F5 U9.1 
SS_B_MCU ; J24.9 U9.14 
VCC_6V ; C59.1 C60.1 C61.1 C62.1 C63.1 C64.1 C122.1 C123.1 C125.1 C129.2 ,
        C156.1 C157.1 C159.1 Q1.3 Q4.3 Q7.3 Q9.3 R87.2 R111.1 TP1.1 U2.5 ,
        U3.5 U8.5 U10.6 U12.5 
VIO ; C40.2 C93.1 C94.1 C126.2 R31.2 R32.2 R39.1 R40.2 R42.2 R71.1 R93.2 ,
        U1.F3 U4.1 U4.2 U9.3 U9.7 
VLOAD1 ; J52.1 R55.2 R56.2 R57.2 R58.2 R68.2 U5.1 U5.2 U5.3 
VLOAD2 ; J55.1 R64.2 R65.2 R66.2 R67.2 R69.2 U6.1 U6.2 U6.3 
VLOAD3 ; J59.1 R102.2 R106.2 R107.2 R109.2 R110.2 U7.1 U7.2 U7.3 
VLOAD4 ; J67.1 R113.2 R117.2 R118.2 R120.2 R121.2 U11.1 U11.2 U11.3 
WDOG_RST ; R41.1 R42.1 TP17.1 U1.C6 
$NETS
$A_PROPERTIES
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4390222'; 'N4390222'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4390218'; 'N4390218'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b4'; 'B4'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b3'; 'B3'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b2'; 'B2'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b1'; 'B1'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):buck4vout'; 'BUCK4VOUT'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):sig_in4'; 'SIG_IN4'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):vload4'; 'VLOAD4'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4305983'; 'N4305983'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4306035'; 'N4306035'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4305987'; 'N4305987'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4306063'; 'N4306063'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b4rtn'; 'B4RTN'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b4sense'; 'B4SENSE'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4266525'; 'N4266525'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):\+3p3v\'; '+3P3V'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b2sense'; 'B2SENSE'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):buck3vout'; 'BUCK3VOUT'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):sig_in3'; 'SIG_IN3'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):vload3'; 'VLOAD3'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4227771'; 'N4227771'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4227719'; 'N4227719'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4227799'; 'N4227799'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4227723'; 'N4227723'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b3sense'; 'B3SENSE'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b3rtn'; 'B3RTN'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b1rtn'; 'B1RTN'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b1sense'; 'B1SENSE'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):b2rtn'; 'B2RTN'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4105385'; 'N4105385'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):\5v_spi\'; '5V_SPI'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4106476'; 'N4106476'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4105651'; 'N4105651'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n4105504'; 'N4105504'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):vload2'; 'VLOAD2'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3981823'; 'N3981823'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3981811'; 'N3981811'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3978664'; 'N3978664'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):vload1'; 'VLOAD1'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3978660'; 'N3978660'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):vcc_6v'; 'VCC_6V'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):sig_in2'; 'SIG_IN2'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3981707'; 'N3981707'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3981735'; 'N3981735'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):sig_in1'; 'SIG_IN1'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3978556'; 'N3978556'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):n3978584'; 'N3978584'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):i2c_scl'; 'I2C_SCL'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):i2c_sda'; 'I2C_SDA'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):en'; 'EN'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):spi_miso'; 'SPI_MISO'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):spi_sck'; 'SPI_SCK'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):avin_filt'; 'AVIN_FILT'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):sck_mcu'; 'SCK_MCU'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):ss_b_mcu'; 'SS_B_MCU'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):spi_ss'; 'SPI_SS'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):int'; 'INT'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):buck2vout'; 'BUCK2VOUT'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):pvin'; 'PVIN'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):buck1vout'; 'BUCK1VOUT'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):phc'; 'PHC'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):phd'; 'PHD'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):phb'; 'PHB'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):pha'; 'PHA'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):spi_mosi'; 'SPI_MOSI'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):mosi_mcu'; 'MOSI_MCU'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):gnd'; 'GND'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):wdog_rst'; 'WDOG_RST'
LOGICAL_PATH '@\isl91211b 1+1+1+1 ev1zb_013117\.schematic1(sch_1):vio'; 'VIO'
$PINS
$A_PROPERTIES
NO_SHAPE_CONNECT; R86.1 R85.1 J3.2 R78.1 R79.1 R80.1
$END
