<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<raSolution version="12">
  <generalSettings>
    <option key="#Board#" value="board.ra8d2ek"/>
    <option key="#TargetName#" value="R7KA8D2KFLCAC"/>
    <option key="#FSPVersion#" value="6.2.0"/>
    <option key="#SELECTED_TOOLCHAIN#" value="clang_arm"/>
    <option key="#ToolchainVersion#" value="18.1.3"/>
  </generalSettings>
  <raBspConfiguration>
    <config id="config.bsp.ra8d2.fsp">
      <property id="config.bsp.fsp.tz.exception_response" value="config.bsp.fsp.tz.exception_response.nmi"/>
      <property id="config.bsp.fsp.tz.cmsis.bfhfnmins" value="config.bsp.fsp.tz.cmsis.bfhfnmins.secure"/>
      <property id="config.bsp.fsp.tz.cmsis.sysresetreqs" value="config.bsp.fsp.tz.cmsis.sysresetreqs.secure_only"/>
      <property id="config.bsp.fsp.tz.cmsis.s_priority_boost" value="config.bsp.fsp.tz.cmsis.s_priority_boost.disabled"/>
      <property id="config.bsp.fsp.tz.cachesar" value="config.bsp.fsp.tz.cachesar.secure"/>
      <property id="config.bsp.fsp.tz.rstsar" value="config.bsp.fsp.tz.rstsar.both"/>
      <property id="config.bsp.fsp.tz.sramsar.sramsa0" value="config.bsp.fsp.tz.sramsar.sramsa0.both"/>
      <property id="config.bsp.fsp.tz.sramsar.sramsa1" value="config.bsp.fsp.tz.sramsar.sramsa1.both"/>
      <property id="config.bsp.fsp.tz.sramsar.sramsa2" value="config.bsp.fsp.tz.sramsar.sramsa2.both"/>
      <property id="config.bsp.fsp.tz.sramsar.sramsa3" value="config.bsp.fsp.tz.sramsar.sramsa3.both"/>
      <property id="config.bsp.fsp.tz.bussara" value="config.bsp.fsp.tz.bussara.both"/>
      <property id="config.bsp.fsp.tz.bussarb" value="config.bsp.fsp.tz.bussarb.both"/>
      <property id="config.bsp.fsp.tz.bussarc" value="config.bsp.fsp.tz.bussarc.both"/>
      <property id="config.bsp.fsp.tz.saipcsem0" value="config.bsp.fsp.tz.saipcsem0.secure_only"/>
      <property id="config.bsp.fsp.tz.saipcsem1" value="config.bsp.fsp.tz.saipcsem1.secure_only"/>
      <property id="config.bsp.fsp.tz.saipcnmi0" value="config.bsp.fsp.tz.saipcnmi0.secure_only"/>
      <property id="config.bsp.fsp.tz.saipcnmi1" value="config.bsp.fsp.tz.saipcnmi1.secure_only"/>
      <property id="config.bsp.fsp.tz.pgcsar" value="config.bsp.fsp.tz.pgcsar.secure_only"/>
      <property id="config.bsp.fsp.tz.uninitialized_ns_application_fallback" value="config.bsp.fsp.tz.uninitialized_ns_application_fallback.enabled"/>
      <property id="config.bsp.fsp.hoco_fll" value="config.bsp.fsp.hoco_fll.disabled"/>
      <property id="config.bsp.fsp.clock_settling_delay" value="config.bsp.fsp.clock_settling_delay.enabled"/>
      <property id="config.bsp.fsp.sleep_mode_delays" value="config.bsp.fsp.sleep_mode_delays.enabled"/>
      <property id="config.bsp.fsp.rtos_sleep_delay" value="config.bsp.fsp.rtos_sleep_delay.enabled"/>
      <property id="config.bsp.fsp.mstp_change_delays" value="config.bsp.fsp.mstp_change_delays.enabled"/>
      <property id="config.bsp.fsp.settling_delay_us" value="30"/>
      <property id="config.bsp.common.main_osc_wait" value="config.bsp.common.main_osc_wait.wait_8163"/>
    </config>
  </raBspConfiguration>
  <raClockConfiguration>
    <node id="board.clock.xtal.freq" mul="24000000" option="_edit"/>
    <node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
    <node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
    <node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
    <node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
    <node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
    <node id="board.clock.pll.div" option="board.clock.pll.div.3"/>
    <node id="board.clock.pll.mul" option="board.clock.pll.mul.250_00"/>
    <node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
    <node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
    <node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
    <node id="board.clock.pll1q.div" option="board.clock.pll1q.div.6"/>
    <node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
    <node id="board.clock.pll1r.div" option="board.clock.pll1r.div.5"/>
    <node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
    <node id="board.clock.pll2.source" option="board.clock.pll2.source.xtal"/>
    <node id="board.clock.pll2.div" option="board.clock.pll2.div.3"/>
    <node id="board.clock.pll2.mul" option="board.clock.pll2.mul.133_00"/>
    <node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
    <node id="board.clock.pll2p.div" option="board.clock.pll2p.div.4"/>
    <node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
    <node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
    <node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
    <node id="board.clock.pll2r.div" option="board.clock.pll2r.div.8"/>
    <node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
    <node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
    <node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
    <node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
    <node id="board.clock.cpuclk1.div" option="board.clock.cpuclk1.div.4"/>
    <node id="board.clock.cpuclk1.display" option="board.clock.cpuclk1.display.value"/>
    <node id="board.clock.mriclk.div" option="board.clock.mriclk.div.4"/>
    <node id="board.clock.mriclk.display" option="board.clock.mriclk.display.value"/>
    <node id="board.clock.mrpclk.div" option="board.clock.mrpclk.div.8"/>
    <node id="board.clock.mrpclk.display" option="board.clock.mrpclk.display.value"/>
    <node id="board.clock.iclk.div" option="board.clock.iclk.div.4"/>
    <node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
    <node id="board.clock.pclka.div" option="board.clock.pclka.div.8"/>
    <node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
    <node id="board.clock.pclkb.div" option="board.clock.pclkb.div.16"/>
    <node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
    <node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
    <node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
    <node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
    <node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
    <node id="board.clock.pclke.div" option="board.clock.pclke.div.4"/>
    <node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
    <node id="board.clock.bclk.div" option="board.clock.bclk.div.8"/>
    <node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
    <node id="board.clock.bclka.source" option="board.clock.bclka.source.disabled"/>
    <node id="board.clock.bclka.div" option="board.clock.bclka.div.6"/>
    <node id="board.clock.bclka.display" option="board.clock.bclka.display.value"/>
    <node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
    <node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
    <node id="board.clock.ebclk.source" option="board.clock.ebclk.source.bclk"/>
    <node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
    <node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
    <node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
    <node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
    <node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
    <node id="board.clock.sciclk.source" option="board.clock.sciclk.source.pll1r"/>
    <node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
    <node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
    <node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
    <node id="board.clock.spiclk.div" option="board.clock.spiclk.div.1"/>
    <node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
    <node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
    <node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
    <node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
    <node id="board.clock.gptclk.source" option="board.clock.gptclk.source.pll1r"/>
    <node id="board.clock.gptclk.div" option="board.clock.gptclk.div.2"/>
    <node id="board.clock.gptclk.display" option="board.clock.gptclk.display.value"/>
    <node id="board.clock.gtclk.source" option="board.clock.gtclk.source.pclkd"/>
    <node id="board.clock.gtclk.display" option="board.clock.gtclk.display.value"/>
    <node id="board.clock.lcdclk.source" option="board.clock.lcdclk.source.pll1r"/>
    <node id="board.clock.lcdclk.div" option="board.clock.lcdclk.div.2"/>
    <node id="board.clock.lcdclk.display" option="board.clock.lcdclk.display.value"/>
    <node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
    <node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.4"/>
    <node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
    <node id="board.clock.uck.source" option="board.clock.uck.source.disabled"/>
    <node id="board.clock.uck.div" option="board.clock.uck.div.10"/>
    <node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
    <node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
    <node id="board.clock.u60ck.div" option="board.clock.u60ck.div.8"/>
    <node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
    <node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.pll2p"/>
    <node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.3"/>
    <node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
    <node id="board.clock.octaspiclk.om_sclk.display" option="board.clock.octaspiclk.om_sclk.display.value"/>
    <node id="board.clock.adcclk.source" option="board.clock.adcclk.source.disabled"/>
    <node id="board.clock.adcclk.div" option="board.clock.adcclk.div.4"/>
    <node id="board.clock.adcclk.display" option="board.clock.adcclk.display.value"/>
    <node id="board.clock.eswclk.source" option="board.clock.eswclk.source.disabled"/>
    <node id="board.clock.eswclk.div" option="board.clock.eswclk.div.4"/>
    <node id="board.clock.eswclk.display" option="board.clock.eswclk.display.value"/>
    <node id="board.clock.eswphyclk.source" option="board.clock.eswphyclk.source.disabled"/>
    <node id="board.clock.eswphyclk.div" option="board.clock.eswphyclk.div.2"/>
    <node id="board.clock.eswphyclk.display" option="board.clock.eswphyclk.display.value"/>
    <node id="board.clock.ethphyclk.source" option="board.clock.ethphyclk.source.disabled"/>
    <node id="board.clock.ethphyclk.div" option="board.clock.ethphyclk.div.32"/>
    <node id="board.clock.ethphyclk.display" option="board.clock.ethphyclk.display.value"/>
  </raClockConfiguration>
  <raPinConfiguration>
    <pincfg active="true" name="" symbol="">
      <configSetting altId="jtag_fslash_swd.tck.p211" configurationId="jtag_fslash_swd.tck" peripheral="JTAG/SWD"/>
      <configSetting altId="jtag_fslash_swd.tdi.p208" configurationId="jtag_fslash_swd.tdi" peripheral="JTAG/SWD"/>
      <configSetting altId="jtag_fslash_swd.tdo.p209" configurationId="jtag_fslash_swd.tdo" peripheral="JTAG/SWD"/>
      <configSetting altId="jtag_fslash_swd.tms.p210" configurationId="jtag_fslash_swd.tms" peripheral="JTAG/SWD"/>
    </pincfg>
  </raPinConfiguration>
  <raSmartBundles>
    <bundle>${workspace_loc:/EK_RA8D2_Graphic_Dual_core_cpu0}/Debug/EK_RA8D2_Graphic_Dual_core_cpu0.sbd</bundle>
    <bundle>${workspace_loc:/EK_RA8D2_Graphic_Dual_core_cpu1}/Debug/EK_RA8D2_Graphic_Dual_core_cpu1.sbd</bundle>
  </raSmartBundles>
</raSolution>
