/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2018 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/******************************************************************************
* System Name : RZ/A1H R7S72100 Example Program for GENMAI - JCU, PFV
* $FileName: readme_j.txt $
* $Module: JCU $ $PublicVersion: 2.01 $ (=JCU_VERSION)
* $Module: PFV $ $PublicVersion: 1.03 $ (=PFV_VERSION)
* $Rev: $
* $Date: 2018-02-02T18:29:57+09:00 $
******************************************************************************/
/**********************************************************************************
*
* History     : 2013-10-08 : 0.80 : x[XEvWFNg VDC5 XV
*               2014-03-20 : 0.90 : OSPLAsync\̂g悤ɉ
*               2014-06-24 : 1.00 : RpC[ɑΉ
*               2014-07-24 : 1.01 : {t@C̃TvR[h̐ꕔ
*               2014-09-03 : 1.01 : PFVTvɑJCU^Tv悤ɏC
*               2014-09-05 : 1.01 : JCU^TṽoCgI[_[C
*               2016-02-29 : 1.02 : JCU 1.03, PFV 1.01ɍXV
*               2018-02-02 : 2.01 : JCU 2.01, PFV 1.03ɍXV
***********************************************************************************/

1. ͂߂

  {TvR[h́ARZ/A1HO[v R7S72100𓋍ڂ
  CPU{[h RTK772100BC00000BRɂēmFĂ܂B
  ql̃\tgEGAJɋZpQlƂĂpB

  ******************************    ******************************
   {TvR[hׂ͂ĎQlłA̓ۏ؂
   ł͂܂Bۂ̃VXeɑgݍޏꍇ̓VXeŜ
   \ɕ]Aql̐ӔCɂēKpۂ𔻒fĂB
  ******************************    ******************************


2. fBNge
  {TvR[hŎgpt@ĆARZ/A1HfBNgуt@C\
  t@C(filecomposition.txt)ɎĂ܂B

  ȃfBNgȉɎ܂B

  OSXF
    workspace\RZ_A1H_JCU_PFV_Example    : vWFNg fBNg (Arm DS-5, IAR EWARM)
    workspace\RZ_A1H_JCU_PFV_Example_e2 : vWFNg fBNg (GNU e2studio)

  RTX-BSPiOSjF
    workspace\RZ_A1H_BSP_JCU_PFV_Arm_patch : BSPppb` (Arm DS-5)


3. 
  TvR[h̓ȉɎ܂B

    CPU          : RZ/A1H
    ]{[h   : RTK772100BC00000BR(CPU{[h)
                 : RTK7721000B00000BR(OPT{[h)
    ARMJ      : ARM J ARM Development Studio 5(DS-5(TM)) Ver.5.16
    ARMRpC        : ARM C/C++ Compiler/Linker/Assembler Ver.5.03 [Build 102]
    IARJ      : IAR Embedded Workbench EWARM 7.40.1
    Renesas J : e2 studio (Version: 5.3.0.023)
    Renesas gcc          : GNUARM-NONE-EABI v16.01

    G~[^ɂẮARZ/A1HɑΉG~[^qlɂď
    B܂ANOR^tbVւ̃vOݕ@́A
    G~[^Ɉˑ܂B
    vO݊ɂĂAgp̃G~[^ɑΉA
    qlɂďĂB


4. TvR[h̓e

  {TvR[h́A_E[h NOR tbVɔzuAȉ̏s܂B

  (1) R_JCU_SampleDecode ֐ - JCU g JPEG f[^̐L
      decode_sample.c

      [ RAM  JCUL  RAM ]

      \[X摜́Aworkspace\RZ_A1H_JCU_PFV_Example\armcc\common\src\samples\
      jcu\Image\image01.jpg
      ɑO[oϐłB 摜TCY 800x480 łB
      eʓRAMɔzu ARGB8888 `̃t[ [ɐL܂B
      LÕf[^̃AhX́Abuffer.source.address ϐɐݒ肵Ă܂B
      L̃f[^̃AhX́Abuffer.destination.address ϐɐݒ肵Ă܂B

  (2) R_JCU_SampleDecodeEncode ֐ - JCU g JPEG Lƈk
      decode_encode_sample.c

      [ RAM  JCUL  RAM  JCUk  RAM ]

      R_JCU_SampleDecode ֐ɁAJPEG kǉĂ܂B
      kf[^́AϐieʓRAMjɊi[܂B
      LO/kÕf[^̃AhX́Abuffer.source.address ϐɐݒ肵Ă܂B
      L/k̃f[^̃AhX́Abuffer.destination.address ϐɐݒ肵Ă܂B
      kf[^̂܂܃oCiۑ΁AJPEG t@CɂȂ܂B
      kύXɂ́AQuantizationTable_Generator.html t@Cɕi(%)
      ēꂽʎqe[uiTvjݒ肵ĂB

  (3) R_JCU_SampleDecodeAndShow ֐ - JCU g Mothion JPEG ̍ĐƉʕ\
      decode_show_sample.c

      [ RAM  JCUL  RAM  VDC5(OUT)  \ ]

      ff[^́At MotionJPEG.avi t@C̓e
      g_MotionJPEG_Sample ϐłB Tv vOŁAAVI`Rei
      ꂼ̃t[ɂ JPEG f[^oĂ܂B
      eʓRAMɔzu YCbCr422 `̃t[ [ɐLA
      D-subiRCA RlN^ƔΑjɏo͂܂B
      ʃTCY 800x600łB fTCY 800x480łB
      VDC ̉fo͂̂ݎgĂāAf͎͂gĂ܂B

  (4) R_JCU_SampleVideoEncodeAndShowI ֐ - Of JCU ňkLĕ\
      video_encode_decode_i_sample.c

      [ J  VDC5(IN)  RAM  JCUk  RAM
         JCUL  RAM  VDC5(OUT)  \ ]

      RCA RlN^ijɐڑJ̉fC^[[Xœ͂āA
      ToptB[h Bottom tB[hꂼ JPEG ɈkAɐL
      s\܂(60fps)B L摜́AD-subiRCA RlN^ƔΑj
      RlN^\܂B
      C[v̒ R_OSPL_EVENT_Wait ֐Ŋ݃nh[甭M
      CxgMÂ悤ɉ܂B 
        1. OfrfIobt@[Ɋi[AJPEG kJn
        2. kAJPEGf[^obNobt@[ɐLJn
        3. LAobNobt@[ƃtgobt@[؂ւĕ\
      JPEG f[^i[obt@́APt[łB
      JPEGkƐLƕ\̏̂߁APt[̒x܂B
      JPEG f[^̂܂܃oCiۑ΁AJPEG t@CɂȂ܂B

  (5) R_JCU_SampleVideoEncodeAndShowP ֐ - Of JCU ňkLĕ\
      video_encode_decode_p_sample.c

      [ J  VDC5(IN)  RAM  JCUk  RAM
         JCUL  RAM  VDC5(OUT)  \ ]

      RCA RlN^ijɐڑJ̉fvObVuœ͂āA
      JPEG ɈkAɐLs\܂(60fps)B ̑́A
      R_JCU_SampleVideoEncodeAndShowI ֐ƓłB

  (6) Sample_PFV_PIO ֐ - PFV gsNZtH[}bgϊ
      pfv_sample.c

      [ RAM  PFVϊ  RAM ]

      [ɓsNZf[^̃sNZtH[}bgϊāA
      [Ɋi[܂B
      CPU APFV փsNZf[^o͂܂B
      uŏIÃTvɐi݂܂B

  (7) Sample_PFV_DMAC ֐ - DMAC oR PFV gp
      pfv_sample.c

      [ RAM  DMAC  PFVϊ  DMAC  RAM ]

      [ɓsNZf[^̃sNZtH[}bgϊāA
      [Ɋi[܂B
      2 DMAC APFV փsNZf[^o͂܂B
      uŏIÃTvɐi݂܂B

  (8) Sample_PFV_DMAC_Image ֐ - DMAC oR PFV gpAo͉摜\
      pfv_sample.c

      [ RAM  DMAC  PFVϊ  DMAC  RAM  VDC5(OUT)  \ ]

      PFV găQCXɕύXA_ł悤ɕ\܂B
       ARGB8888  YCbCr422 ɕϊĂ܂B
      \[X摜́Aworkspace\RZ_A1H_JCU_PFV_Example\armcc\common\src\samples\
      pfv\Image\PFV_Sample.bmp ɑO[oϐłB
      D-subiRCA RlN^ƔΑjɏo͂܂B
      bs玩IɏIÃTvɐi݂܂B

  JCU,PFV͒P̂ŋ@\邱Ƃ\łA@\邽߂ɕ\(VDC5)K{
  킯ł͂܂B Ƃ΁ASample_PFV_DMAC ֐ R_JCU_SampleDecode
  ֐́AVDC5 gpĂ܂B

  TvR[h̏ڍדeɂẮAeAvP[Vm[g
  QƂĂB


5. TvR[h̓mF

  (1) u[g[h
    - u[g[h0 - RAM, NOR u[g̏ꍇ
      (CS0Ԃɐڑꂽ(oX16rbg)u[g)
    - u[g[h3 - VA tbVu[gꍇ
      (SPI}`I/OoX1ɐڑꂽVAtbV1u[g)
      LȊÕu[g[hݒ肵ꍇAvO͓삵܂B

  (2) g
    CPU{[hRTK772100BC00000BRRZ/A1H̊eNbN
    ȉ̎gƂȂ悤ɁARZ/A1H̃NbNpXU
    ݒ肵Ă܂B
    (RZ/A1H̃NbN[h0ŁAEXTAL[q13.33MHz̃NbN
    ͂ĂԂł̎głB)
      - CPUNbN(I)     : 400MHz
      - 摜NbN(G): 266.67MHz
      - oXNbN(B): 133.33MHz
      - ӃNbN1(P1)  : 66.67MHz
      - ӃNbN0(P0)  : 33.33MHz

  (3) ʐM̐ݒ
    - rbg[g  : 115200 bps
    - f[^rbg  : 8 bit
    - peBrbg: Ȃ
    - Xgbvrbg: 1 bit

  (4) LbV̐ݒ

    (4-a) OSX̃vWFNg̏ꍇ
      L1LbV̏ݒMMUݒ肷邱ƂɂsĂ܂BL1LbV
      ̗L܂͖̗̈ɂẮARZ/A1Hݒ̃AvP[Vm[g
      uMMU̐ݒvQƂĂB
      RAM̔~[̈ɑ鉼zAhX́ARAM̃~[̈
      AhXMMU}bsOĂ邱Ƃz肵Ă܂B
      ȊOł̃{[hł́Ar_ospl_memory.c ύXĂB
      L2LbVɂẮA{TvR[hŐݒ肵Ă܂B

    (4-b) RTX-RTOS ̃vWFNg̏ꍇ
      scatter.sct t@CɎw肵悤ɁA
      RAM̈ꕔLbVɂȂ悤ɍĂ邱Ƃz肵Ă܂B
      ǂ̗̈łAhXƉzAhX͓łB
      ȊOł̃{[hł́Ar_ospl_memory.c ύXĂB

  (5) ^C}[̑I
    OSXłł́ARZ/A1H  OSTM1 gpĂ܂B
    RTXłł́ARZ/A1H  MUT2 gpĂ܂B
    #define R_OSPL_FTIMER_IS ̒lύX邱ƂŁA^C}[ύXł܂B


6. TvR[h̓菇

  {TvR[h𓮍삳ꍇ́Aȉ̎菇ɏ]ĂB
  \(VDC5)ȂƂ́AOPT{[hȂĂ\܂B
  {͂́Aȉ̏ꍇɂĐĂ܂B
    EJFoArm DS-5ARenesas e2 studioAIAR Embedded Workbenchp
    Eu[gF  oRAMANOR tbVAVA tbVp
    EOSF      oOSXARTX-BSPp
  u[ǧ݂̐ݒ́Au7. _E[hEu[g̕ύX菇vQƁB


  (1) fBbvXCb`уWp̐ݒ
    (1-1) CPU{[h - RAM u[g or NOR tbV u[g̏ꍇ
      RTK772100BC00000BR̃fBbvXCb`уWpȉ̂Ƃɐݒ肵܂B

      - SW1-1: ON, SW1-2: ON, SW1-3: ON, SW1-4: ON, SW1-5: ON, SW1-6: ON
        (MD_BOOT0, MD_BOOT1, MD_BOOT2, MD_CLK, MD_CLKS"L"xɌŒ)
        (NORtbVA܂́ARAM u[g)
      - SW2-1: OFF, SW2-2: ON, SW2-3: ON, SW2-4: ON
        (SW2-1:IvV{[hɐڑLCD1_DATA10gp)
        (SW2-3:BSCANP"L"xɌŒ)
      - SW3-1:OFF, SW3-2:OFF, SW3-3:OFF, SW3-4:OFF,
        SW3-5:OFF, SW3-6:OFF, SW3-7:OFF, SW3-8:OFF
      - JP1 : Open (RASo͒[qƂSDRAM1A2(U4AU5)ɐڑ)
      - JP2 : 1-2 (A16o͒[qƂNOR-flash1A2(U2AU3)ɐڑ)
      - JP3 : 1-2 (IRQ6͒[qƂIRQ6XCb`(SW6)ɐڑ)
      - JP4 : 2-3 (ET_MDCo͒[qƂEthernet PHY(U20)ɐڑ)
      - JP5 : 2-3 (CS0o͒[qƂNOR-flash1(U2)ɐڑ)
      - JP6 : 2-3 (CS1o͒[qƂNOR-flash2(U3)ɐڑ)
      - JP7 : 1-2 (SPBSSL_0o͒[qƂSerial-flash1A2(U6AU7)ɐڑ)
      - JP8 : Open (A21o͒[qƂNOR-flash1A2(U2AU3)ɐڑ)
      - JP9 : 1-2 (USB ch0zXg[hŎgp(VBUS0d))
      - JP10: 1-2 (SSL40o͒[qƂăI[fBICODEC(U19)ɐڑ)
      - JP11: 1-2 (USB ch1zXg[hŎgp(VBUS1d))
      - JP12: 1-2 (RxD2͒[qƂRS-232CgV[o(U27)ɐڑ)
      - JP13: 1-2 (TxD2o͒[qƂRS-232CgV[o(U27)ɐڑ)
      - JP14: 2-3 (VXedJ25狟(ACA_v^gp))
      - JP15: 1-2 (5VdU30狟(d))
      - JP16: 1-2
      - JP17: 1-2
      - JP18: 1-2 (R7S72100pfW^3.3VdU32狟(d))
      - JP19: 1-2 (R7S72100pAiO3.3VdU32狟(d))
      - JP20: 1-2
      - JP21: 1-2 (R7S72100p1.18VdU34狟(d))
      - JP22: 1-2

      fBbvXCb`уWpݒ̏ڍׂ́ACPU{[hRTK772100BC00000BR
      [U[Y}jAQƂĂB

    (1-2) CPU{[h - VA tbVu[gꍇ
      RAM u[g or NOR tbV u[g̏ꍇƂ̈Ⴂ́Aȉ̃fBbvXCb`уWpłB

      - SW1-1: OFF, SW1-2: ON, SW1-3: OFF, SW1-4: ON, SW1-5: ON, SW1-6: ON
        (MD_BOOT1, MD_CLK, MD_CLKS "L"xAMD_BOOT0, MD_BOOT2 "H"xɌŒ)
      - JP5 : 1-2 (u[g[h͂ƂDIPSWɐڑ)
      - JP8 : 1-2 (VAtbV3ɐڑ)

    (1-3) OPT{[h
      RTK7721000B00000BR̃fBbvXCb`уWpȉ̂Ƃɐݒ肵܂B

      - SW14-1: OFF, SW14-2: ON,  SW14-3: OFF, SW14-4: OFF,
        SW14-5: ON,  SW14-6: OFF, SW14-7: OFF, SW14-8: OFF
      - J1  : Open
      - JP1 : Open (VAR~jP[VC^tF[X[hƂāASCI_TXD0
                    SCI_RXD0ڑ)
      - JP2 : Open (LCD1_DATA16o͒[qƂLCDo̓RlN^2(J12`J14)
                   rfIDAC2(U10)ɐڑ)
      - JP3 : Open (LCD1_DATA9o͒[qƂLCDo̓RlN^2(J12`J14)
                   rfIDAC2(U10)ɐڑ)
      - JP4 : 2-3 (P10_3[qCMOSJRlN^(J17)̃ZbgMɐڑ)
      - JP5 : Open (SCI_RXD0͒[qƂSIMJ[hXbg(J2)ɐڑ /
                    RxD3͒[qƂUARTRlN^(J3)ɐڑ)
      - JP6(*): Open (P3_7CS1 o͒[qƂĎgp)
      - JP7(*): 1-2 (P5_9LCD1_DATA16o͒[qƂĎgp)

      fBbvXCb`уWpݒ̏ڍׂ́AOPT{[hRTK7721000B00000BR
      [U[Y}jAQƂĂB
      (*) rWLڂ̃{[hɂ͎ĂȂׁA1-2V[gɂȂ܂B

  (2) G~[^Ƃ̐ڑ
    G~[^CPU{[hRTK772100BC00000BRڑ܂B
    G~[^ƃfobK̐ڑɂāARtBM[VKvȏꍇ́A
    gp̃fobOVXeɑΉRtBM[V̐ݒĂB

      (2-a) Renesas e2 studio ̏ꍇ
          ȌAJ-Link LITE ƐڑĂ̂ƂĐ܂B

      (2-b) IAR Embedded Workbench ̏ꍇ
          ȌAI-jet ƐڑĂ̂ƂĐ܂B

  (3) fBXvC̐ڑ
    IvV{[h J15 D-sub RlN^[(VDC5 ch0)ɁAfBXvCP[uڑ܂B

  (4) TvR[h̃rh

      (4-a) OSX, Arm DS-5 ̏ꍇ
          workspace\RZ_A1H_JCU_PFV_Example
          fBNgzXgPC̔Cӂ̃fBNgAႦ
              C:\Workspace
          ̒ɃRs[܂B
          J DS-5 NA
              C:\Workspace\RZ_A1H_JCU_PFV_Example\armcc_Workspace
          J܂B
          DS-5 [ t@C >> C|[g >>  >> vWFNg[NXy[X ]
              C:\Workspace\RZ_A1H_JCU_PFV_Example
          ׂ̒̂ẴvWFNgC|[g܂B
          RZ_A1H_JCU_PFV_Sample_armcc ENbNărhA
          RZ_A1H_JCU_PFV_Sample_armcc.axf st@C𐶐܂B

      (4-b) OSX, IAR Embedded Workbench (EWARM) ̏ꍇ
          workspace\\RZ_A1H_JCU_PFV_Example
          fBNgzXgPC̔Cӂ̃fBNgAႦ
              C:\Workspace
          ̒ɃRs[܂B
          L common fBNgړ܂B
          ړF
              C:\Workspace\RZ_A1H_JCU_PFV_Example\armcc\common
          ړF
              C:\Workspace\RZ_A1H_JCU_PFV_Example\iccarm\common
          RZ_A1H_JCU_PFV_Sample-7.1.eww _uNbN EWARM N܂B
          RZ_A1H_JCU_PFV_Sample-7.1 ENbNăCNA
          RZ_A1H_JCU_PFV_Sample-7.1.out st@C𐶐܂B

      (4-c) OSX, Renesas e2 studio ̏ꍇ
          workspace\\RZ_A1H_JCU_PFV_Example_e2
          fBNgzXgPC̔Cӂ̃fBNgAႦ
              C:\Workspace
          ̒ɃRs[܂B
          J e2 studio NA
              C:\Workspace\RZ_A1H_JCU_PFV_Example_e2\Workspace
          J܂B
          e2 studio [ t@C >> C|[g >>  >> vWFNg[NXy[X ]A
          Search for nested projects Ƀ`FbNA
              C:\Workspace\RZ_A1H_JCU_PFV_Example_e2
          ׂ̒̂ẴvWFNgC|[g܂B
          RZA1_JCU_PFV_gcc ENbNărhA
          RZA1_JCU_PFV_gcc.x st@C𐶐܂B

      (4-d) RTX-BSP, Arm DS-5 ̏ꍇ
          RZ/A1H RTX BSP V2.03 (an_r01an2200jj0203_rza1h_other.zip)  CMSIS_RTOS_RTX 
          fBNgzXgPC̔Cӂ̃fBNgiFC:\Workspace\RZ_A1H_RTX_JCU_PFV_Armj
          ̒ɃRs[܂B
              C:\Workspace\RZ_A1H_RTX_JCU_PFV_Arm_patch\AttachPatch.vbs
          _uNbNāA
              C:\Workspace\RZ_A1H_RTX_JCU_PFV_Arm
          Ƀpb`Ă܂B
          J DS-5 NA
              C:\Workspace\RZ_A1H_RTX_JCU_PFV_Arm\Workspace
          J܂B
          DS-5 [ t@C >> C|[g >>  >> vWFNg[NXy[X ]
              C:\Workspace\RZ_A1H_RTX_JCU_PFV_Arm
          ׂ̒̂ẴvWFNg
              C:\Workspace\RZ_A1H_RTX_JCU_PFV_Arm\CMSIS_RTOS_RTX\RTOS
          ׂ̒̂ẴvWFNgC|[g܂B
          Display_smp1 ENbNărhA
          Display_smp1.axf st@C𐶐܂B
          ijDisplay\sample1\ARM\setup_Renesas_RZ_A1.s  SVC_Stack_Size 
            r_ospl.c  GS_INTERRUPT_STACK_SIZE ̒lɕύXĂ܂B

  (5) u[gvÕ_E[h - VA tbVu[gꍇ̂
    u[gvO RZ_A1H_sflash_boot_init_armcc.axf AG~[^
    _E[h@\gpāAVA tbV ɏ݂܂B
    ̃u[gvÕ\[X́AlTX̃z[y[W R01AN1960JJ0101 
    ΃_E[hł܂B

  (6) TvR[h̃_E[h
    TvR[h̃[hW[(*.axf, *.x, *.out)AG~[^
    _E[h@\gpāAɏ݂܂B

      (6-a) Renesas e2 studio ̏ꍇ
          [ s >> fobO̍\ >> iRenesas GDB Hardware Debugging ̎qm[hj]
          [ fobO ]B
          płł́A
          [ Run >> Debug Configurations >> (child node of Renesas GDB Hardware Debugging) ]
          [ Debug ]B
          itbVɃ_E[hƂ́A_E[hɃZbg܂Bj
          AConfirm Perspective Switch \ꂽ Yes ĉB

      (6-b) IAR Embedded Workbench ̏ꍇ
          [ vWFNg >> _E[hăfobO ]
          płł́A
          [ Project >> Download and Debug ]
          itbVɃ_E[hƂ́A_E[hɃZbg܂Bj

      (6-c) ̑̏ꍇ
          g̃G~[^̃_E[h@\gpB

  (7) TvR[h̎s

      (7-a) Renesas e2 studio ̏ꍇ
          uĊJvuResumev{^iΐF̉EOpj܂B
          fobK[IƂ́AuؒfvuTerminatev{^iԐF́j܂B

      (7-b) IAR Embedded Workbench ̏ꍇ
          usvuGov{^܂B
          fobK[IƂ́AufobO̒~vuStop Debuggingv{^
          iԐF́~j܂B

      (7-c) ̑̏ꍇ
          g̃G~[^̎s@\gpB


7. _E[hEu[g̕ύX菇

  a. OSX, Arm DS-5 ̏ꍇ

    u[g             LOAD_START(*1)
    --------------------------------------------------------------------
    RAM              (UNCACHED_LRAM_END - RAM_DOWNLOAD_MAX_SIZE)
    NOR tbV       (NOR_START)
    VA tbV  (SERIAL_FLASH_START)

    (*1) scatter_file\scatter.scat t@C̒ɂ LOAD_START }N̒`


  b. OSX, Renesas e2 studio ̏ꍇ

    u[g             Comment out for RAM_only(*1)  For RAM_only(*2)
    --------------------------------------------------------------------
    RAM              RgAEg                L
    NOR tbV       L                          RgAEg
    VA tbV  Ή

    (*1) linker_script_file\NOR_or_RAM.ld t@C̒ɂ
         /* Comment out for RAM_only */ ꂽs
    (*2) linker_script_file\NOR_or_RAM.ld t@C̒ɂ
         /* For RAM_only */ ꂽs


  c. OSX, IAR Embedded Workbench ̏ꍇ

    u[g             ΉEΉ
    --------------------------------------------------------------------
    RAM              Ή
    NOR tbV       Ή
    VA tbV  Ή


  d. RTX-BSP, Arm DS-5 ̏ꍇ

    u[g             XLb^[t@C(*1)
    --------------------------------------------------------------------
    RAM              scatter.scat
    NOR tbV       scatter_nflashboot.scat
    VA tbV  scatter_sflashboot.scat

    (*1) J[IvVɐݒ肷XLb^[t@C
        DS-5 ̃vWFNgENbN [ vpeB >> C/C++rh >> ݒ
        >> ARM Linker 5 >> C[WCAEg >> XLb^t@C ] 
        .scat t@Cݒ肵܂B
        ݒύXAvWFNgēxN܂B

ȏ
