FSP Configuration
  Board "RA8|RA8M1|VK-RA8M1"
  R7FA8M1AHECFP
    part_number: R7FA8M1AHECFP
    rom_size_bytes: 2064384
    ram_size_bytes: 917504
    data_flash_size_bytes: 12288
    package_style: QFP
    package_pins: 100
    ospi0_cs0_start_address: 2147483648
    ospi0_cs0_size_bytes: 268435456
    ospi0_cs1_start_address: 2415919104
    ospi0_cs1_size_bytes: 268435456
    number of cores: 1
    
  R7FA8M1AHECFP
  RA8M1
    series: 8
    
  RA8M1 Family
    Enable inline BSP IRQ functions: Enabled
    SDRAM: SDRAM Support: Disabled
    SDRAM: Timings: tRAS (cycles): 6 cycles
    SDRAM: Timings: tRCD (cycles): 3 cycles
    SDRAM: Timings: tRP (cycles): 3 cycles
    SDRAM: Timings: tWR (cycles): 2 cycles
    SDRAM: Timings: tCL (cycles): 3 cycles
    SDRAM: Timings: tRFC (cycles): 937
    SDRAM: Timings: tREFW (cycles): 8 cycles
    SDRAM: Initialization: Auto-Refresh Interval (ARFI): 10 cycles
    SDRAM: Initialization: Auto-Refresh Count (ARFC): 8 times
    SDRAM: Initialization: Precharge Cycle Count (PRC): 3 cycles
    SDRAM: Address Multiplex Shift: 9-bit shift
    SDRAM: Endian Mode: Little Endian
    SDRAM: Continuous Access Mode: Enabled
    SDRAM: Bus Width: 16-bit
    OSPI_B: Startup Support: Disabled
    Security: Exceptions: Exception Response: Non-Maskable Interrupt
    Security: Exceptions: BusFault, HardFault, and NMI Target: Secure State
    Security: System Reset Request Accessibility: Secure State
    Security: Exceptions: Prioritize Secure Exceptions: Disabled
    Security: System Reset Status Accessibility: Both Secure and Non-Secure State
    Security: Battery Backup Accessibility: Both Secure and Non-Secure State
    Security: SRAM Accessibility: SRAM0 Protection: Both Secure and Non-Secure State
    Security: SRAM Accessibility: SRAM1 Protection: Both Secure and Non-Secure State
    Security: SRAM Accessibility: Standby SRAM Protection: Both Secure and Non-Secure State
    Security: BUS Accessibility: Bus Security Attribution Register A: Both Secure and Non-Secure State
    Security: BUS Accessibility: Bus Security Attribution Register B: Both Secure and Non-Secure State
    Security: BUS Accessibility: Bus Security Attribution Register C: Both Secure and Non-Secure State
    Security: Uninitialized Non-Secure Application Fallback: Enable Uninitialized Non-Secure Application Fallback
    Clocks: HOCO FLL Function: Disabled
    Clocks: Clock Settling Delay: Enabled
    Clocks: Sleep Mode Entry and Exit Delays: Enabled
    Clocks: RTOS Sleep on Idle: Disabled
    Clocks: MSTP Change Delays: Enabled
    Clocks: Settling Delay (us): 150
    Main Oscillator Wait Time: 8163 cycles
    Cache settings: Data cache: Disabled
    I/O Ports: Voltage Mode: VCC: High (VCC >= 2.7 V)
    I/O Ports: Voltage Mode: VCC2: High (VCC2 >= 2.7 V)
    
  RA8M1 Device Options
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Enabled
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Start Mode: IWDT is stopped after a reset (Register-start mode)
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Timeout Period: 2048 cycles
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Dedicated Clock Frequency Divisor: 128
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Window End Position:  0% (no window end position)
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Window Start Position: 100% (no window start position)
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Reset Interrupt Request Select: Reset is enabled
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: Independent WDT: Stop Control: Stop counting when in Sleep,Deep SleepSnooze modec, or Software Standby
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Start Mode Select: Stop WDT after a reset (register-start mode)
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Timeout Period: 16384 cycles
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Clock Frequency Division Ratio: 128
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Window End Position:  0% (no window end position)
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Window Start Position: 100% (no window start position)
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Reset Interrupt Request: Reset
    OFS Registers: OFS0 (Option Function Select Register 0) Settings: WDT0: Stop Control: Stop counting when entering Sleep mode
    OFS Registers: OFS2 (Option Function Select Register 2) Settings: Enabled
    OFS Registers: OFS2 (Option Function Select Register 2) Settings: DCDC: Enabled
    OFS Registers: DUALSEL (Dual Mode Select Register) Settings: Disabled
    OFS Registers: DUALSEL (Dual Mode Select Register) Settings: Bank Mode: Linear
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: Disabled
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: Voltage Detection 0 Circuit Start: Voltage monitor 0 reset is disabled after reset
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: Voltage Detection 0 Level: 1.60 V
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: HOCO Oscillation Enable: HOCO oscillation is disabled after reset
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: Voltage Detection 0 Low Power Consumption: Voltage monitor 0 Low Power Consumption Disabled
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: WDT/IWDT Software Debug Control: Disabled (WDT and IWDT continue operating while the CPU is in the debug state)
    OFS Registers: OFS1 (Option Function Select Register 1) Settings: Tightly Coupled Memory (TCM)/Cache ECC: Disable ECC function for TCM and Cache
    OFS Registers: BANKSEL (Bank Select Register) Settings: Disabled
    OFS Registers: BANKSEL (Bank Select Register) Settings: Startup Bank Switch: Disabled
    OFS Registers: BANKSEL (Bank Select Register) Settings: Block Swap Select: Disabled
    OFS Registers: BPS (Block Protect Setting Register) Settings: Disabled
    OFS Registers: BPS (Block Protect Setting Register) Settings: BPS0: 
    OFS Registers: BPS (Block Protect Setting Register) Settings: BPS1: 
    OFS Registers: BPS (Block Protect Setting Register) Settings: BPS2: 
    OFS Registers: BPS (Block Protect Setting Register) Settings: BPS3: 
    OFS Registers: PBPS (Permanent Block Protect Setting Register) Settings: Disabled
    OFS Registers: PBPS (Permanent Block Protect Setting Register) Settings: PBPS0: 
    OFS Registers: PBPS (Permanent Block Protect Setting Register) Settings: PBPS1: 
    OFS Registers: PBPS (Permanent Block Protect Setting Register) Settings: PBPS2: 
    OFS Registers: PBPS (Permanent Block Protect Setting Register) Settings: PBPS3: 
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: Enabled
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: Voltage Detection 0 Circuit Start: Voltage monitor 0 reset is disabled after reset
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: Voltage Detection 0 Level: 1.60 V
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: HOCO Oscillation Enable: HOCO oscillation is disabled after reset
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: Voltage Detection 0 Low Power Consumption: Voltage monitor 0 Low Power Consumption Disabled
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: WDT/IWDT Software Debug Control: Disabled (WDT and IWDT continue operating while the CPU is in the debug state)
    OFS Registers: OFS1_SEC (Option Function Select Register 1 Secure) Settings: Tightly Coupled Memory (TCM)/Cache ECC: Disable ECC function for TCM and Cache
    OFS Registers: BANKSEL_SEC (Bank Select Register Secure) Settings: Disabled
    OFS Registers: BANKSEL_SEC (Bank Select Register Secure) Settings: Startup Bank Switch: Disabled
    OFS Registers: BANKSEL_SEC (Bank Select Register Secure) Settings: Block Swap Select: Disabled
    OFS Registers: BPS_SEC (Block Protect Setting Register Secure) Settings: Disabled
    OFS Registers: BPS_SEC (Block Protect Setting Register Secure) Settings: BPS_SEC0: 
    OFS Registers: BPS_SEC (Block Protect Setting Register Secure) Settings: BPS_SEC1: 
    OFS Registers: BPS_SEC (Block Protect Setting Register Secure) Settings: BPS_SEC2: 
    OFS Registers: BPS_SEC (Block Protect Setting Register Secure) Settings: BPS_SEC3: 
    OFS Registers: PBPS_SEC (Permanent Block Protect Setting Register Secure) Settings: Disabled
    OFS Registers: PBPS_SEC (Permanent Block Protect Setting Register Secure) Settings: PBPS_SEC0: 
    OFS Registers: PBPS_SEC (Permanent Block Protect Setting Register Secure) Settings: PBPS_SEC1: 
    OFS Registers: PBPS_SEC (Permanent Block Protect Setting Register Secure) Settings: PBPS_SEC2: 
    OFS Registers: PBPS_SEC (Permanent Block Protect Setting Register Secure) Settings: PBPS_SEC3: 
    OFS Registers: OFS1_SEL (OFS1 Security Attribution) Settings: Enabled
    OFS Registers: OFS1_SEL (OFS1 Security Attribution) Settings: Voltage Detection 0 Level Security Attribution: VDSEL setting loads from OFS1_SEC
    OFS Registers: OFS1_SEL (OFS1 Security Attribution) Settings: Voltage Detection 0 Circuit Start Security Attribution: PVDAS setting loads from OFS1_SEC
    OFS Registers: OFS1_SEL (OFS1 Security Attribution) Settings: Voltage Detection 0 Low Power Consumption Security Attribution: PVDLPSEL setting loads from OFS1_SEC
    OFS Registers: OFS1_SEL (OFS1 Security Attribution) Settings: WDT/IWDT Software Debug Control Security Attribution: SWDBG setting loads from OFS1_SEC
    OFS Registers: OFS1_SEL (OFS1 Security Attribution) Settings: Tightly Coupled Memory (TCM)/Cache ECC Security Attribution: INITECCEN setting loads from OFS1_SEC
    OFS Registers: BANKSEL_SEL (Banksel Security Attribution) Settings: Disabled
    OFS Registers: BANKSEL_SEL (Banksel Security Attribution) Settings: Flash Bank Select Accessibility: Non-Secure State
    OFS Registers: BPS_SEL (BPS Security Attribution) Settings: Disabled
    OFS Registers: BPS_SEL (BPS Security Attribution) Settings: BPS_SEL0: 
    OFS Registers: BPS_SEL (BPS Security Attribution) Settings: BPS_SEL1: 
    OFS Registers: BPS_SEL (BPS Security Attribution) Settings: BPS_SEL2: 
    OFS Registers: BPS_SEL (BPS Security Attribution) Settings: BPS_SEL3: 
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL0 (FSBL Control Register 0) Settings: Disabled
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL0 (FSBL Control Register 0) Settings: FSBLEN: Disabled
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL0 (FSBL Control Register 0) Settings: FSBLSKIPSW: Disabled
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL0 (FSBL Control Register 0) Settings: FSBLSKIPDS: Disabled
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL0 (FSBL Control Register 0) Settings: FSBLCLK: 240 MHz
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL1 (FSBL Control Register 1) Settings: Disabled
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL1 (FSBL Control Register 1) Settings: FSBLEXMDFSBLEN: Secure boot with report measurement
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL2 (FSBL Control Register 2) Settings: Disabled
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL2 (FSBL Control Register 2) Settings: PORTPN: PORTn15
    OFS Registers: First Stage Bootloader (FSBL): FSBLCTRL2 (FSBL Control Register 2) Settings: PORTGN: None
    OFS Registers: First Stage Bootloader (FSBL): Code Certificate: SACC0 (Start Address of Code Certificate 0) Settings: Disabled
    OFS Registers: First Stage Bootloader (FSBL): Code Certificate: SACC0 (Start Address of Code Certificate 0) Settings: Address: 0xFFFFFFFF
    OFS Registers: First Stage Bootloader (FSBL): Code Certificate: SACC1 (Start Address of Code Certificate 1) Settings: Disabled
    OFS Registers: First Stage Bootloader (FSBL): Code Certificate: SACC1 (Start Address of Code Certificate 1) Settings: Address: 0xFFFFFFFF
    OFS Registers: First Stage Bootloader (FSBL): SAMR (Start Address of Measurement Report) Settings: Disabled
    OFS Registers: First Stage Bootloader (FSBL): SAMR (Start Address of Measurement Report) Settings: Address: 0xFFFFFFFF
    
  RA8M1 event data
  RA Common
    Main stack size (bytes): 0x10000
    Heap size (bytes): 0x6000
    Bootloader Secondary XIP: Disabled
    MCU Vcc (mV): 3300
    Parameter checking: Disabled
    Assert Failures: Return FSP_ERR_ASSERTION
    Clock Registers not Reset Values during Startup: Disabled
    Main Oscillator Populated: Populated
    PFS Protect: Enabled
    C Runtime Initialization : Enabled
    Early BSP Initialization : Disabled
    Main Oscillator Clock Source: Crystal or Resonator
    Subclock Populated: Not Populated
    Subclock Drive (Drive capacitance availability varies by MCU): Standard/Normal mode
    Subclock Stabilization Time (ms): 1000
    
  Clocks
    XTAL 24000000Hz
    HOCO 48MHz
    PLL Src: XTAL
    PLL Div /2
    PLL Mul x80-99|Mul x80|PLL Mul x80.00
    PLL1P Div /2
    PLL1Q Div /2
    PLL1R Div /2
    PLL2 Disabled
    PLL2 Div /2
    PLL2 Mul x80-99|Mul x96|PLL2 Mul x96.00
    PLL2P Div /2
    PLL2Q Div /2
    PLL2R Div /2
    Clock Src: PLL1P
    CLKOUT Disabled
    SCICLK Src: PLL1P
    SPICLK Src: PLL1P
    CANFDCLK Disabled
    I3CCLK Disabled
    USBCLK Disabled
    USB60CLK Disabled
    OCTACLK Src: PLL1P
    CPUCLK Div /2
    ICLK Div /2
    PCLKA Div /4
    PCLKB Div /8
    PCLKC Div /8
    PCLKD Div /4
    PCLKE Div /2
    SDCLK Enabled
    BCLK Div /4
    EBCLK Div /2
    FCLK Div /8
    CLKOUT Div /1
    SCICLK Div /4
    SPICLK Div /4
    CANFDCLK Div /8
    I3CCLK Div /3
    USBCLK Div /5
    USB60CLK Div /5
    OCTACLK Div /4
    
  Pin Configurations
    R7FA8M1AHECFP.pincfg -> g_bsp_pin_cfg
      AVCC0 88 SYSTEM_AVCC0 - - - - - - - - IO "Read only" - 
      AVSS0 89 SYSTEM_AVSS0 - - - - - - - - IO "Read only" - 
      P000 100 - - - - Disabled - - "ACMPHS1: IVCMP1_2; ADC1: AN100; IRQ6: IRQ6-DS" - None - - 
      P001 99 - - - - Disabled - - "ACMPHS0: IVREF_0; ADC1: AN101; IRQ7: IRQ7-DS" - None - - 
      P002 98 - - - - Disabled - - "ACMPHS1: IVCMP1_3; ADC1: AN102; IRQ8: IRQ8-DS" - None - - 
      P003 97 - - - - Disabled - - "ACMPHS1: IVREF_1; ADC1: AN104" - None - - 
      P004 96 - - - - Disabled - - "ACMPHS0: IVCMP0_2; ADC0: AN000; IRQ9: IRQ9-DS" "Right AMIC" I - - 
      P005 95 - - - - Disabled - - "ADC0: AN001; IRQ10: IRQ10-DS" "Left AMIC" I - - 
      P006 94 - - - - Disabled - - "ACMPHS0: IVCMP0_3; ADC0: AN002; IRQ11: IRQ11-DS" - None - - 
      P007 93 - - - - Disabled - - "ADC0: AN004" - None - - 
      P008 92 - - - - Disabled - - "ADC0: AN008; IRQ12: IRQ12-DS" - None - - 
      P014 85 - - - - Disabled - - "ADC0: AN007; DAC120: DA0" DA0 O - - 
      P015 84 - - - - Disabled - - "ADC1: AN105; DAC121: DA1; IRQ13: IRQ13" - None - - 
      P100 75 - - L None Disabled - - "AGT0: AGTIO0; GPT8: GTIOC8B; GPT_POEGA: GTETRGA; IRQ2: IRQ2; OSPI: OM_SIO0; SCI9: DE9; SCI9: SCK9; SPI1: MISO1" - O - - 
      P101 72 - - L None Disabled - - "AGT0: AGTEE0; GPT8: GTIOC8A; GPT_POEGB: GTETRGB; IRQ1: IRQ1; OSPI: OM_SIO3; SCI9: RXD9; SPI1: MOSI1" - O - - 
      P102 71 - - L - Disabled - - "ADC(Digital): ADTRG0; AGT0: AGTO0; CANFD0: CRX0; GPT2: GTIOC2B; GPT_OPS: GTOWLO; OSPI: OM_SIO4; SCI9: TXD9; SPI1: RSPCK1" - O - - 
      P103 70 - - L - Disabled - - "CANFD0: CTX0; GPT2: GTIOC2A; GPT_OPS: GTOWUP; OSPI: OM_SIO2; SCI9: CTS_RTS9; SCI9: DE9; SPI1: SSLB0" - O - - 
      P104 69 - - - - Disabled - - "GPT1: GTIOC1B; GPT_POEGB: GTETRGB; IRQ1: IRQ1; OSPI: OM_CS1; SCI9: CTS9; SPI1: SSLB1" - None - - 
      P105 68 - - L None Disabled - - "GPT1: GTIOC1A; IRQ0: IRQ0; OSPI: OM_ECSINT1; SPI1: SSLB2; ULPT1: ULPTO1_A-DS" - IO - - 
      P106 67 - - L - Disabled - - "AGT0: AGTOB0; GPT8: GTIOC8B; GPT_OPS: GTOWLO; OSPI: OM_RESET; SPI1: SSLB3; ULPT1: ULPTEE1_A-DS" - IO - - 
      P107 66 - - L - Disabled - - "AGT0: AGTOA0; GPT8: GTIOC8A; GPT_OPS: GTOWUP; OSPI: OM_CS0" - O - - 
      P112 51 - - L - Disabled - - "BUS: A0; BUS: BC0; ETHER_MII: ET0_CRS; ETHER_RMII: RMII0_CRS_DV; GPT3: GTIOC3B; SCI0: TXD0; SDRAM: A0; SDRAM: DQM1; SPI0: SSLA2; SSIE: SSIBLK0; ULPT0: ULPTOB0_A-DS" - IO - - 
      P113 52 - - L - Disabled - - "BUS: CS1#; ETHER_MII: ET0_EXOUT; ETHER_RMII: ET0_EXOUT; GPT2: GTIOC2A; SCI0: RXD0; SDRAM: CKE; SPI0: SSLA1; SSIE: SSIFS0; SSIE: SSILRCK0; ULPT0: ULPTOA0_A-DS" - IO - - 
      P114 53 - - L - Disabled - - "BUS: CS0#; ETHER_MII: ET0_LINKSTA; ETHER_RMII: ET0_LINKSTA; GPT2: GTIOC2B; SCI0: CTS_RTS0; SCI0: DE0; SDRAM: WE; SPI0: SSLA0; SSIE0: SSIRXD0" - IO - - 
      P115 54 - - L - Disabled - - "ETHER_MII: ET0_WOL; ETHER_RMII: ET0_WOL; GPT5: GTIOC5A; SCI0: CTS0; SDRAM: SDCS; SPI0: MOSI0; SSIE0: SSITXD0" - IO - - 
      P200 39 - - - - Disabled - - "IRQ: NMI" - None - - 
      P201 38 - - - - Disabled - - "SYSTEM: MD" - None - - 
      P205 31 - - L None Disabled - - "AGT1: AGTO1; CLKOUT: CLKOUT; GPT4: GTIOC4A; GPT_OPS: GTIV; IIC1: SCL1; IRQ1: IRQ1-DS; SCI4: TXD4; SDHI0: SD0DAT3; SPI0: SSLA1; SSIE: SSIFS1; SSIE: SSILRCK1; USB FS: USB_OVRCURA" "Audio Codec SCL" IO - - 
      P206 30 - - L None Disabled - - "BUS: CS7#; GPT_OPS: GTIU; IIC1: SDA1; IRQ0: IRQ0-DS; SCI4: RXD4; SDHI0: SD0DAT2; SPI0: SSLA2; SSIE1: SSIDATA1; USB FS: USB_VBUSEN" "Audio Codec SDA" IO - - 
      P208 36 JTAG/SWD_TDI - L None "Peripheral mode" - - "CANFD1: CRX1; CLKOUT: VCOUT; GPT1: GTIOC1B; GPT_OPS: GTOVLO; IRQ3: IRQ3; JTAG/SWD: TDI; SCI9: RXD9" - IO - - 
      P209 35 JTAG/SWD_TDO - L - "Peripheral mode" - - "CANFD1: CTX1; CLKOUT: CLKOUT; GPT1: GTIOC1A; GPT_OPS: GTOVUP; JTAG/SWD: TDO; SCI9: TXD9; TRACE: TRACESWO" - IO - - 
      P210 34 JTAG/SWD_TMS - L - "Peripheral mode" - - "GPT0: GTIOC0B; GPT_OPS: GTOULO; JTAG/SWD: SWDIO; JTAG/SWD: TMS; SCI9: CTS_RTS9; SCI9: DE9" - IO - - 
      P211 33 JTAG/SWD_TCK - L - "Peripheral mode" - - "GPT0: GTIOC0A; GPT_OPS: GTOUUP; JTAG/SWD: SWCLK; JTAG/SWD: TCK; SCI9: DE9; SCI9: SCK9" - IO - - 
      P212 14 - - - - Disabled - - "AGT1: AGTEE1; CGC: EXTAL; GPT0: GTIOC0B; GPT_POEGD: GTETRGD; IRQ3: IRQ3; SCI1: RXD1" - None - - 
      P213 13 - - - - Disabled - - "ADC(Digital): ADTRG1; CGC: XTAL; GPT0: GTIOC0A; GPT_POEGC: GTETRGC; IRQ2: IRQ2; SCI1: TXD1; ULPT0: ULPTEE0" - None - - 
      P300 50 - - - - Disabled - - "BUS: A1; ETHER_MII: ET0_RX_CLK; ETHER_RMII: RMII0_RX_ER; GPT3: GTIOC3A; IRQ4: IRQ4; SCI0: DE0; SCI0: SCK0; SDRAM: A1; SDRAM: DQM3; SPI0: SSLA3; ULPT0: ULPTEVI0_A-DS" - None - - 
      P301 49 - - - - Disabled - - "AGT0: AGTIO0; BUS: A2; ETHER_MII: ET0_ERXD0; ETHER_RMII: RMII0_RXD1; GPT4: GTIOC4B; GPT_OPS: GTOULO; IRQ6: IRQ6; SDHI0: SD0DAT3; SDRAM: A2; ULPT0: ULPTEE0_A-DS" - None - - 
      P302 48 - - - - Disabled - - "BUS: A3; ETHER_MII: ET0_ERXD1; ETHER_RMII: RMII0_RXD0; GPT4: GTIOC4A; GPT_OPS: GTOUUP; IRQ5: IRQ5; SDHI0: SD0DAT2; SDRAM: A3; ULPT0: ULPTO0_A-DS" - None - - 
      P303 47 - - - - Disabled - - "BUS: A4; ETHER_MII: ET0_ETXD0; ETHER_RMII: REF50CK0; GPT7: GTIOC7B; SDHI0: SD0DAT1; SDRAM: A4" - None - - 
      P304 44 - - - - Disabled - - "BUS: A5; ETHER_MII: ET0_ETXD1; ETHER_RMII: RMII0_TXD0; GPT7: GTIOC7A; GPT_OPS: GTOVLO; IRQ9: IRQ9; SDHI0: SD0DAT0; SDRAM: A5; TRACE: TDATA3; ULPT1: ULPTO1" - None - - 
      P305 43 - - - - Disabled - - "BUS: A6; ETHER_MII: ET0_RX_ER; ETHER_RMII: RMII0_TXD1; GPT_OPS: GTOVUP; IRQ8: IRQ8; SDHI0: SD0WP; SDRAM: A6; TRACE: TDATA2; ULPT1: ULPTEE1" - None - - 
      P306 42 - - - - Disabled - - "BUS: A7; ETHER_MII: ET0_TX_EN; ETHER_RMII: RMII0_TXD_EN; GPT_OPS: GTIW; SDHI0: SD0CD; SDRAM: A7; TRACE: TDATA1; ULPT1: ULPTEVI1" - None - - 
      P307 41 - - - - Disabled - - "BUS: A8; ETHER_MII: ET0_MDIO; ETHER_RMII: ET0_MDIO; GPT_OPS: GTIV; SDHI0: SD0CMD; SDRAM: A8; TRACE: TDATA0; ULPT1: ULPTOA1" - None - - 
      P308 40 - - - - Disabled - - "BUS: A9; ETHER_MII: ET0_MDC; ETHER_RMII: ET0_MDC; GPT_OPS: GTIU; SCI9: CTS9; SDHI0: SD0CLK; SDRAM: A9; TRACE: TCLK; ULPT1: ULPTOB1" - None - - 
      P400 1 - - - None Disabled - - "ADC(Digital): ADTRG1; AGT1: AGTIO1; CEU: VIO_D0; ETHER_MII: ET0_WOL; ETHER_RMII: ET0_WOL; GPT6: GTIOC6A; I3C0: I3C_SCL0; IRQ0: IRQ0; SCI1: TXD1; SDHI1: SD1CLK; SSIE: AUDIO_CLK" "USER SW1" IO - - 
      P401 2 - - - - Disabled - - "CANFD0: CTX0; CEU: VIO_D1; ETHER_MII: ET0_MDC; ETHER_RMII: ET0_MDC; GPT6: GTIOC6B; GPT_POEGA: GTETRGA; I3C0: I3C_SDA0; IRQ5: IRQ5-DS; SCI1: RXD1; SDHI1: SD1CMD" - None - - 
      P402 3 - - - - Disabled - - "CAC: CACREF; CANFD0: CRX0; ETHER_MII: ET0_MDIO; ETHER_RMII: ET0_MDIO; IRQ4: IRQ4-DS; RTC: RTCIC0; SCI1: DE1; SCI1: SCK1; SDHI1: SD1DAT0; SSIE: AUDIO_CLK" - None - - 
      P403 4 - - - - Disabled - - "ETHER_MII: ET0_LINKSTA; ETHER_RMII: ET0_LINKSTA; GPT3: GTIOC3A; IRQ14: IRQ14-DS; RTC: RTCIC1; SCI1: CTS_RTS1; SCI1: DE1; SDHI1: SD1DAT1; SSIE: SSIBLK0" - None - - 
      P404 5 - LED_RED L - Disabled - - "CEU: VIO_D3; ETHER_MII: ET0_EXOUT; ETHER_RMII: ET0_EXOUT; GPT3: GTIOC3B; IRQ15: IRQ15-DS; RTC: RTCIC2; SCI1: CTS1; SDHI1: SD1DAT2; SSIE: SSIFS0; SSIE: SSILRCK0" - IO - - 
      P405 6 - LED_GREEN L - Disabled - - "AGT1: AGTIO1; CEU: VIO_D2; ETHER_MII: ET0_TX_EN; ETHER_RMII: RMII0_TXD_EN; GPT1: GTIOC1A; SCI2: DE2; SCI2: SCK2; SDHI1: SD1DAT3; SSIE0: SSITXD0" - IO - - 
      P406 7 - LED_BLUE L - Disabled - - "CEU: VIO_D3; CGC: EXCIN; ETHER_MII: ET0_RX_ER; ETHER_RMII: RMII0_TXD1; GPT1: GTIOC1B; SCI2: TXD2; SDHI1: SD1CD; SPI0: SSLA3; SSIE0: SSIRXD0" - IO - - 
      P407 25 - - L - Disabled - - "ADC(Digital): ADTRG0; AGT0: AGTIO0; BUS: CS6#; GPT10: GTIOC10B; IIC0: SDA0; RTC: RTCOUT; SCI4: CTS_RTS4; SCI4: DE4; SPI0: SSLA3; USB FS: USB_VBUS" - IO - - 
      P408 24 - - L None Disabled - - "BUS: A17; GPT10: GTIOC10A; GPT_OPS: GTOWLO; IIC0: SCL0; IRQ7: IRQ7; SCI3: RXD3; SCI4: CTS4; ULPT0: ULPTOB0; USB FS: USB_VBUSEN; USB HS: USBHS_VBUSEN" "PMOD MISO/RXD" I - - 
      P409 23 - - L None Disabled - - "BUS: A18; GPT_OPS: GTOWUP; IIC0: SDA0; IRQ6: IRQ6; SCI3: TXD3; ULPT0: ULPTOA0; USB FS: USB_OVRCURA_A-DS; USB HS: USBHS_OVRCURA" "PMOD MOSI/TXD" O - - 
      P410 22 - - L None Disabled - - "AGT1: AGTOB1; BUS: A19; GPT9: GTIOC9B; GPT_OPS: GTOVLO; IIC0: SCL0; IRQ5: IRQ5; SCI3: DE3; SCI3: SCK3; SDHI0: SD0DAT1; SPI1: MISO1; USB FS: USB_OVRCURB_A-DS; USB HS: USBHS_OVRCURB" "PMOD SCK" IO - - 
      P411 21 - - L None Disabled - - "AGT1: AGTOA1; BUS: A20; GPT9: GTIOC9A; GPT_OPS: GTOVUP; IRQ4: IRQ4; SCI3: CTS_RTS3; SCI3: DE3; SDHI0: SD0DAT0; SPI1: MOSI1; USB FS: USB_ID; USB HS: USBHS_ID" "PMOD SS" IO - - 
      P412 20 - - L - Disabled - - "AGT1: AGTEE1; BUS: A21; GPT_OPS: GTOULO; SCI3: CTS3; SDHI0: SD0CMD; SPI1: RSPCK1; USB FS: USB_EXICEN; USB HS: USBHS_EXICEN" "PMOD GPIO3" IO - - 
      P413 19 - - L - Disabled - - "BUS: A22; GPT_OPS: GTOUUP; SDHI0: SD0CLK; SPI1: SSLB0; ULPT1: ULPTEE1" "PMOD GPIO2" IO - - 
      P414 18 - - L - Disabled - - "BUS: A23; CANFD1: CRX1; CEU: VIO_D13; GPT0: GTIOC0B; GPT_OPS: GTADSM1; IRQ9: IRQ9; SCI4: RXD4; SDHI0: SD0WP; SPI1: SSLB1" "PMOD GPIO1" IO - - 
      P415 17 - - - None Disabled - - "BUS: WAIT; CANFD1: CTX1; CEU: VIO_D12; GPT0: GTIOC0A; GPT_OPS: GTADSM0; IRQ8: IRQ8; SCI4: TXD4; SDHI0: SD0CD; SPI1: SSLB2" "PMOD IRQ8" IO - - 
      P600 65 - DA7218_EN - - Disabled - - "CAC: CACREF; GPT6: GTIOC6B; OSPI: OM_RSTO1; ULPT1: ULPTEVI1_A-DS" DA7218# IO - - 
      P609 55 - - L - Disabled - - "BUS: D8; CANFD1: CTX1; ETHER_MII: ET0_RX_DV; GPT5: GTIOC5B; SCI0: TXD0; SDRAM: DQ8; SPI0: MISO0; ULPT1: ULPTOA1_A-DS" "VCOM RXD" O - - 
      P610 56 - - L - Disabled - - "BUS: D9; CANFD1: CRX1; ETHER_MII: ET0_COL; GPT4: GTIOC4A; SCI0: RXD0; SDRAM: DQ9; SPI0: RSPCK0; ULPT1: ULPTOB1_A-DS" "VCOM TXD" I - - 
      P708 16 - - - - Disabled - - "BUS: BC1; BUS: WR1; CAC: CACREF; CEU: VIO_CLK; IRQ11: IRQ11; SCI4: DE4; SCI4: SCK4; SPI1: SSLB3; SSIE: AUDIO_CLK" - None - - 
      P800 76 - - L None Disabled - - "AGT0: AGTOA0; GPT11: GTIOC11A; GPT_OPS: GTIU; IRQ11: IRQ11; OSPI: OM_SIO5; SCI2: CTS2" - O - - 
      P801 77 - - L None Disabled - - "AGT0: AGTOB0; GPT11: GTIOC11B; GPT_OPS: GTIV; IRQ12: IRQ12; OSPI: OM_DQS; SCI2: TXD2" - IO - - 
      P802 78 - - L - Disabled - - "GPT12: GTIOC12A; GPT_OPS: GTIW; OSPI: OM_SIO6; SCI2: RXD2" - O - - 
      P803 79 - - L - Disabled - - "GPT12: GTIOC12B; GPT_POEGC: GTETRGC; OSPI: OM_SIO1; SCI2: DE2; SCI2: SCK2" - O - - 
      P804 80 - - L None Disabled - - "GPT13: GTIOC13A; GPT_POEGD: GTETRGD; IRQ14: IRQ14; OSPI: OM_SIO7; SCI2: CTS_RTS2; SCI2: DE2" - O - - 
      P808 81 - - L None Disabled - - "GPT13: GTIOC13B; IRQ15: IRQ15; OSPI: OM_SCLK" - O - - 
      P809 82 - - - - Disabled - - "OSPI: OM_SCLKN" - None - - 
      P814 28 - - L - Disabled - - "CANFD0: CRX0; GPT8: GTIOC8B; USB FS: USB_DP" - IO - - 
      P815 27 - - L - Disabled - - "CANFD0: CTX0; GPT8: GTIOC8A; USB FS: USB_DM" - IO - - 
      RES 37 SYSTEM_RES - - - - - - - - IO "Read only" - 
      VBATT 8 SYSTEM_VBATT - - - - - - - - IO "Read only" - 
      VCC 15 SYSTEM_VCC - - - - - - - - IO "Read only" - 
      VCC 46 SYSTEM_VCC - - - - - - - - IO "Read only" - 
      VCC 58 SYSTEM_VCC - - - - - - - - IO "Read only" - 
      VCC2 73 SYSTEM_VCC2 - - - - - - - - IO "Read only" - 
      VCC_DCDC 60 SYSTEM_VCC_DCDC - - - - - - - - IO "Read only" - 
      VCC_DCDC 61 SYSTEM_VCC_DCDC - - - - - - - - IO "Read only" - 
      VCC_USB 29 SYSTEM_VCC_USB - - - - - - - - IO "Read only" - 
      VCL 9 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VCL 32 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VCL 59 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VCL 83 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VLO 62 SYSTEM_VLO - - - - - - - - IO "Read only" - 
      VLO 63 SYSTEM_VLO - - - - - - - - IO "Read only" - 
      VREFH 87 SYSTEM_VREFH - - - - - - - - IO "Read only" - 
      VREFH0 91 SYSTEM_VREFH0 - - - - - - - - IO "Read only" - 
      VREFL 86 SYSTEM_VREFL - - - - - - - - IO "Read only" - 
      VREFL0 90 SYSTEM_VREFL0 - - - - - - - - IO "Read only" - 
      VSS 12 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS 45 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS 57 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS 74 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS_DCDC 64 SYSTEM_VSS_DCDC - - - - - - - - IO "Read only" - 
      VSS_USB 26 SYSTEM_VSS_USB - - - - - - - - IO "Read only" - 
      XCIN 10 CGC_XCIN - - - - - - - - IO "Read only" - 
      XCOUT 11 CGC_XCOUT - - - - - - - - IO "Read only" - 
    RA8M1 VUI -> g_bsp_pin_cfg
      AVCC0 88 SYSTEM_AVCC0 - - - - - - - - IO "Read only" - 
      AVSS0 89 SYSTEM_AVSS0 - - - - - - - - IO "Read only" - 
      P000 100 - - - - Disabled - - "ACMPHS1: IVCMP1_2; ADC1: AN100; IRQ6: IRQ6-DS" - None - - 
      P001 99 - - - - Disabled - - "ACMPHS0: IVREF_0; ADC1: AN101; IRQ7: IRQ7-DS" - None - - 
      P002 98 - - - - Disabled - - "ACMPHS1: IVCMP1_3; ADC1: AN102; IRQ8: IRQ8-DS" - None - - 
      P003 97 - - - - Disabled - - "ACMPHS1: IVREF_1; ADC1: AN104" - None - - 
      P004 96 ADC0_AN000 - - - "Analog mode" - - "ACMPHS0: IVCMP0_2; ADC0: AN000; IRQ9: IRQ9-DS" "Right AMIC" I - - 
      P005 95 ADC0_AN001 - - - "Analog mode" - - "ADC0: AN001; IRQ10: IRQ10-DS" "Left AMIC" I - - 
      P006 94 - - - - Disabled - - "ACMPHS0: IVCMP0_3; ADC0: AN002; IRQ11: IRQ11-DS" - None - - 
      P007 93 - - - - Disabled - - "ADC0: AN004" - None - - 
      P008 92 - - - - Disabled - - "ADC0: AN008; IRQ12: IRQ12-DS" - None - - 
      P014 85 DAC120_DA0 - - - "Analog mode" - - "ADC0: AN007; DAC120: DA0" DA0 O - - 
      P015 84 - - - - Disabled - - "ADC1: AN105; DAC121: DA1; IRQ13: IRQ13" - None - - 
      P100 75 OSPI_OM_SIO0 - L None "Peripheral mode" - - "AGT0: AGTIO0; GPT8: GTIOC8B; GPT_POEGA: GTETRGA; IRQ2: IRQ2; OSPI: OM_SIO0; SCI9: DE9; SCI9: SCK9; SPI1: MISO1" - O - - 
      P101 72 OSPI_OM_SIO3 - L None "Peripheral mode" - - "AGT0: AGTEE0; GPT8: GTIOC8A; GPT_POEGB: GTETRGB; IRQ1: IRQ1; OSPI: OM_SIO3; SCI9: RXD9; SPI1: MOSI1" - O - - 
      P102 71 OSPI_OM_SIO4 - L - "Peripheral mode" - - "ADC(Digital): ADTRG0; AGT0: AGTO0; CANFD0: CRX0; GPT2: GTIOC2B; GPT_OPS: GTOWLO; OSPI: OM_SIO4; SCI9: TXD9; SPI1: RSPCK1" - O - - 
      P103 70 OSPI_OM_SIO2 - L - "Peripheral mode" - - "CANFD0: CTX0; GPT2: GTIOC2A; GPT_OPS: GTOWUP; OSPI: OM_SIO2; SCI9: CTS_RTS9; SCI9: DE9; SPI1: SSLB0" - O - - 
      P104 69 - - - - Disabled - - "GPT1: GTIOC1B; GPT_POEGB: GTETRGB; IRQ1: IRQ1; OSPI: OM_CS1; SCI9: CTS9; SPI1: SSLB1" - None - - 
      P105 68 OSPI_OM_ECSINT1 - L None "Peripheral mode" - - "GPT1: GTIOC1A; IRQ0: IRQ0; OSPI: OM_ECSINT1; SPI1: SSLB2; ULPT1: ULPTO1_A-DS" - IO - - 
      P106 67 OSPI_OM_RESET - L - "Peripheral mode" - - "AGT0: AGTOB0; GPT8: GTIOC8B; GPT_OPS: GTOWLO; OSPI: OM_RESET; SPI1: SSLB3; ULPT1: ULPTEE1_A-DS" - IO - - 
      P107 66 OSPI_OM_CS0 - L - "Peripheral mode" - - "AGT0: AGTOA0; GPT8: GTIOC8A; GPT_OPS: GTOWUP; OSPI: OM_CS0" - O - - 
      P112 51 SSIE_SSIBLK0 - L - "Peripheral mode" - - "BUS: A0; BUS: BC0; ETHER_MII: ET0_CRS; ETHER_RMII: RMII0_CRS_DV; GPT3: GTIOC3B; SCI0: TXD0; SDRAM: A0; SDRAM: DQM1; SPI0: SSLA2; SSIE: SSIBLK0; ULPT0: ULPTOB0_A-DS" - IO - - 
      P113 52 SSIE_SSILRCK0 - L - "Peripheral mode" - - "BUS: CS1#; ETHER_MII: ET0_EXOUT; ETHER_RMII: ET0_EXOUT; GPT2: GTIOC2A; SCI0: RXD0; SDRAM: CKE; SPI0: SSLA1; SSIE: SSIFS0; SSIE: SSILRCK0; ULPT0: ULPTOA0_A-DS" - IO - - 
      P114 53 SSIE0_SSIRXD0 - L - "Peripheral mode" - - "BUS: CS0#; ETHER_MII: ET0_LINKSTA; ETHER_RMII: ET0_LINKSTA; GPT2: GTIOC2B; SCI0: CTS_RTS0; SCI0: DE0; SDRAM: WE; SPI0: SSLA0; SSIE0: SSIRXD0" - IO - - 
      P115 54 SSIE0_SSITXD0 - L - "Peripheral mode" - - "ETHER_MII: ET0_WOL; ETHER_RMII: ET0_WOL; GPT5: GTIOC5A; SCI0: CTS0; SDRAM: SDCS; SPI0: MOSI0; SSIE0: SSITXD0" - IO - - 
      P200 39 - - - - Disabled - - "IRQ: NMI" - None - - 
      P201 38 - - - - Disabled - - "SYSTEM: MD" - None - - 
      P205 31 IIC1_SCL1 - M None "Peripheral mode" - - "AGT1: AGTO1; CLKOUT: CLKOUT; GPT4: GTIOC4A; GPT_OPS: GTIV; IIC1: SCL1; IRQ1: IRQ1-DS; SCI4: TXD4; SDHI0: SD0DAT3; SPI0: SSLA1; SSIE: SSIFS1; SSIE: SSILRCK1; USB FS: USB_OVRCURA" "Audio Codec SCL" IO - - 
      P206 30 IIC1_SDA1 - M None "Peripheral mode" - - "BUS: CS7#; GPT_OPS: GTIU; IIC1: SDA1; IRQ0: IRQ0-DS; SCI4: RXD4; SDHI0: SD0DAT2; SPI0: SSLA2; SSIE1: SSIDATA1; USB FS: USB_VBUSEN" "Audio Codec SDA" IO - - 
      P208 36 JTAG/SWD_TDI - L None "Peripheral mode" - - "CANFD1: CRX1; CLKOUT: VCOUT; GPT1: GTIOC1B; GPT_OPS: GTOVLO; IRQ3: IRQ3; JTAG/SWD: TDI; SCI9: RXD9" - IO - - 
      P209 35 JTAG/SWD_TDO - L - "Peripheral mode" - - "CANFD1: CTX1; CLKOUT: CLKOUT; GPT1: GTIOC1A; GPT_OPS: GTOVUP; JTAG/SWD: TDO; SCI9: TXD9; TRACE: TRACESWO" - IO - - 
      P210 34 JTAG/SWD_TMS - L - "Peripheral mode" - - "GPT0: GTIOC0B; GPT_OPS: GTOULO; JTAG/SWD: SWDIO; JTAG/SWD: TMS; SCI9: CTS_RTS9; SCI9: DE9" - IO - - 
      P211 33 JTAG/SWD_TCK - L - "Peripheral mode" - - "GPT0: GTIOC0A; GPT_OPS: GTOUUP; JTAG/SWD: SWCLK; JTAG/SWD: TCK; SCI9: DE9; SCI9: SCK9" - IO - - 
      P212 14 - - - - Disabled - - "AGT1: AGTEE1; CGC: EXTAL; GPT0: GTIOC0B; GPT_POEGD: GTETRGD; IRQ3: IRQ3; SCI1: RXD1" - None - - 
      P213 13 - - - - Disabled - - "ADC(Digital): ADTRG1; CGC: XTAL; GPT0: GTIOC0A; GPT_POEGC: GTETRGC; IRQ2: IRQ2; SCI1: TXD1; ULPT0: ULPTEE0" - None - - 
      P300 50 - - - - Disabled - - "BUS: A1; ETHER_MII: ET0_RX_CLK; ETHER_RMII: RMII0_RX_ER; GPT3: GTIOC3A; IRQ4: IRQ4; SCI0: DE0; SCI0: SCK0; SDRAM: A1; SDRAM: DQM3; SPI0: SSLA3; ULPT0: ULPTEVI0_A-DS" - None - - 
      P301 49 - - - - Disabled - - "AGT0: AGTIO0; BUS: A2; ETHER_MII: ET0_ERXD0; ETHER_RMII: RMII0_RXD1; GPT4: GTIOC4B; GPT_OPS: GTOULO; IRQ6: IRQ6; SDHI0: SD0DAT3; SDRAM: A2; ULPT0: ULPTEE0_A-DS" - None - - 
      P302 48 - - - - Disabled - - "BUS: A3; ETHER_MII: ET0_ERXD1; ETHER_RMII: RMII0_RXD0; GPT4: GTIOC4A; GPT_OPS: GTOUUP; IRQ5: IRQ5; SDHI0: SD0DAT2; SDRAM: A3; ULPT0: ULPTO0_A-DS" - None - - 
      P303 47 - - - - Disabled - - "BUS: A4; ETHER_MII: ET0_ETXD0; ETHER_RMII: REF50CK0; GPT7: GTIOC7B; SDHI0: SD0DAT1; SDRAM: A4" - None - - 
      P304 44 - - - - Disabled - - "BUS: A5; ETHER_MII: ET0_ETXD1; ETHER_RMII: RMII0_TXD0; GPT7: GTIOC7A; GPT_OPS: GTOVLO; IRQ9: IRQ9; SDHI0: SD0DAT0; SDRAM: A5; TRACE: TDATA3; ULPT1: ULPTO1" - None - - 
      P305 43 - - - - Disabled - - "BUS: A6; ETHER_MII: ET0_RX_ER; ETHER_RMII: RMII0_TXD1; GPT_OPS: GTOVUP; IRQ8: IRQ8; SDHI0: SD0WP; SDRAM: A6; TRACE: TDATA2; ULPT1: ULPTEE1" - None - - 
      P306 42 - - - - Disabled - - "BUS: A7; ETHER_MII: ET0_TX_EN; ETHER_RMII: RMII0_TXD_EN; GPT_OPS: GTIW; SDHI0: SD0CD; SDRAM: A7; TRACE: TDATA1; ULPT1: ULPTEVI1" - None - - 
      P307 41 - - - - Disabled - - "BUS: A8; ETHER_MII: ET0_MDIO; ETHER_RMII: ET0_MDIO; GPT_OPS: GTIV; SDHI0: SD0CMD; SDRAM: A8; TRACE: TDATA0; ULPT1: ULPTOA1" - None - - 
      P308 40 - - - - Disabled - - "BUS: A9; ETHER_MII: ET0_MDC; ETHER_RMII: ET0_MDC; GPT_OPS: GTIU; SCI9: CTS9; SDHI0: SD0CLK; SDRAM: A9; TRACE: TCLK; ULPT1: ULPTOB1" - None - - 
      P400 1 IRQ0_IRQ0 - - IRQ0 "IRQ mode" - - "ADC(Digital): ADTRG1; AGT1: AGTIO1; CEU: VIO_D0; ETHER_MII: ET0_WOL; ETHER_RMII: ET0_WOL; GPT6: GTIOC6A; I3C0: I3C_SCL0; IRQ0: IRQ0; SCI1: TXD1; SDHI1: SD1CLK; SSIE: AUDIO_CLK" "USER SW1" IO - - 
      P401 2 - - - - Disabled - - "CANFD0: CTX0; CEU: VIO_D1; ETHER_MII: ET0_MDC; ETHER_RMII: ET0_MDC; GPT6: GTIOC6B; GPT_POEGA: GTETRGA; I3C0: I3C_SDA0; IRQ5: IRQ5-DS; SCI1: RXD1; SDHI1: SD1CMD" - None - - 
      P402 3 - - - - Disabled - - "CAC: CACREF; CANFD0: CRX0; ETHER_MII: ET0_MDIO; ETHER_RMII: ET0_MDIO; IRQ4: IRQ4-DS; RTC: RTCIC0; SCI1: DE1; SCI1: SCK1; SDHI1: SD1DAT0; SSIE: AUDIO_CLK" - None - - 
      P403 4 - - - - Disabled - - "ETHER_MII: ET0_LINKSTA; ETHER_RMII: ET0_LINKSTA; GPT3: GTIOC3A; IRQ14: IRQ14-DS; RTC: RTCIC1; SCI1: CTS_RTS1; SCI1: DE1; SDHI1: SD1DAT1; SSIE: SSIBLK0" - None - - 
      P404 5 GPIO LED_RED L - "Output mode (Initial High)" - - "CEU: VIO_D3; ETHER_MII: ET0_EXOUT; ETHER_RMII: ET0_EXOUT; GPT3: GTIOC3B; IRQ15: IRQ15-DS; RTC: RTCIC2; SCI1: CTS1; SDHI1: SD1DAT2; SSIE: SSIFS0; SSIE: SSILRCK0" - IO - - 
      P405 6 GPIO LED_GREEN L - "Output mode (Initial High)" - - "AGT1: AGTIO1; CEU: VIO_D2; ETHER_MII: ET0_TX_EN; ETHER_RMII: RMII0_TXD_EN; GPT1: GTIOC1A; SCI2: DE2; SCI2: SCK2; SDHI1: SD1DAT3; SSIE0: SSITXD0" - IO - - 
      P406 7 GPIO LED_BLUE L - "Output mode (Initial High)" - - "CEU: VIO_D3; CGC: EXCIN; ETHER_MII: ET0_RX_ER; ETHER_RMII: RMII0_TXD1; GPT1: GTIOC1B; SCI2: TXD2; SDHI1: SD1CD; SPI0: SSLA3; SSIE0: SSIRXD0" - IO - - 
      P407 25 "USB FS_USB_VBUS" - L - "Peripheral mode" - - "ADC(Digital): ADTRG0; AGT0: AGTIO0; BUS: CS6#; GPT10: GTIOC10B; IIC0: SDA0; RTC: RTCOUT; SCI4: CTS_RTS4; SCI4: DE4; SPI0: SSLA3; USB FS: USB_VBUS" - IO - - 
      P408 24 SCI3_RXD3 - L None "Peripheral mode" - - "BUS: A17; GPT10: GTIOC10A; GPT_OPS: GTOWLO; IIC0: SCL0; IRQ7: IRQ7; SCI3: RXD3; SCI4: CTS4; ULPT0: ULPTOB0; USB FS: USB_VBUSEN; USB HS: USBHS_VBUSEN" "PMOD MISO/RXD" I - - 
      P409 23 SCI3_TXD3 - L None "Peripheral mode" - - "BUS: A18; GPT_OPS: GTOWUP; IIC0: SDA0; IRQ6: IRQ6; SCI3: TXD3; ULPT0: ULPTOA0; USB FS: USB_OVRCURA_A-DS; USB HS: USBHS_OVRCURA" "PMOD MOSI/TXD" O - - 
      P410 22 SCI3_SCK3 - L None "Peripheral mode" - - "AGT1: AGTOB1; BUS: A19; GPT9: GTIOC9B; GPT_OPS: GTOVLO; IIC0: SCL0; IRQ5: IRQ5; SCI3: DE3; SCI3: SCK3; SDHI0: SD0DAT1; SPI1: MISO1; USB FS: USB_OVRCURB_A-DS; USB HS: USBHS_OVRCURB" "PMOD SCK" IO - - 
      P411 21 SCI3_CTS_RTS3 - L None "Peripheral mode" - - "AGT1: AGTOA1; BUS: A20; GPT9: GTIOC9A; GPT_OPS: GTOVUP; IRQ4: IRQ4; SCI3: CTS_RTS3; SCI3: DE3; SDHI0: SD0DAT0; SPI1: MOSI1; USB FS: USB_ID; USB HS: USBHS_ID" "PMOD SS" IO - - 
      P412 20 GPIO - L - "Output mode (Initial Low)" - - "AGT1: AGTEE1; BUS: A21; GPT_OPS: GTOULO; SCI3: CTS3; SDHI0: SD0CMD; SPI1: RSPCK1; USB FS: USB_EXICEN; USB HS: USBHS_EXICEN" "PMOD GPIO3" IO - - 
      P413 19 GPIO - L - "Output mode (Initial Low)" - - "BUS: A22; GPT_OPS: GTOUUP; SDHI0: SD0CLK; SPI1: SSLB0; ULPT1: ULPTEE1" "PMOD GPIO2" IO - - 
      P414 18 GPIO - L - "Output mode (Initial Low)" - - "BUS: A23; CANFD1: CRX1; CEU: VIO_D13; GPT0: GTIOC0B; GPT_OPS: GTADSM1; IRQ9: IRQ9; SCI4: RXD4; SDHI0: SD0WP; SPI1: SSLB1" "PMOD GPIO1" IO - - 
      P415 17 IRQ8_IRQ8 - - IRQ8 "IRQ mode" - - "BUS: WAIT; CANFD1: CTX1; CEU: VIO_D12; GPT0: GTIOC0A; GPT_OPS: GTADSM0; IRQ8: IRQ8; SCI4: TXD4; SDHI0: SD0CD; SPI1: SSLB2" "PMOD IRQ8" IO - - 
      P600 65 GPIO DA7218_EN - - "Input mode" - - "CAC: CACREF; GPT6: GTIOC6B; OSPI: OM_RSTO1; ULPT1: ULPTEVI1_A-DS" DA7218# IO - - 
      P609 55 SCI0_TXD0 - L - "Peripheral mode" - - "BUS: D8; CANFD1: CTX1; ETHER_MII: ET0_RX_DV; GPT5: GTIOC5B; SCI0: TXD0; SDRAM: DQ8; SPI0: MISO0; ULPT1: ULPTOA1_A-DS" "VCOM RXD" O - - 
      P610 56 SCI0_RXD0 - L - "Peripheral mode" - - "BUS: D9; CANFD1: CRX1; ETHER_MII: ET0_COL; GPT4: GTIOC4A; SCI0: RXD0; SDRAM: DQ9; SPI0: RSPCK0; ULPT1: ULPTOB1_A-DS" "VCOM TXD" I - - 
      P708 16 - - - - Disabled - - "BUS: BC1; BUS: WR1; CAC: CACREF; CEU: VIO_CLK; IRQ11: IRQ11; SCI4: DE4; SCI4: SCK4; SPI1: SSLB3; SSIE: AUDIO_CLK" - None - - 
      P800 76 OSPI_OM_SIO5 - L None "Peripheral mode" - - "AGT0: AGTOA0; GPT11: GTIOC11A; GPT_OPS: GTIU; IRQ11: IRQ11; OSPI: OM_SIO5; SCI2: CTS2" - O - - 
      P801 77 OSPI_OM_DQS - L None "Peripheral mode" - - "AGT0: AGTOB0; GPT11: GTIOC11B; GPT_OPS: GTIV; IRQ12: IRQ12; OSPI: OM_DQS; SCI2: TXD2" - IO - - 
      P802 78 OSPI_OM_SIO6 - L - "Peripheral mode" - - "GPT12: GTIOC12A; GPT_OPS: GTIW; OSPI: OM_SIO6; SCI2: RXD2" - O - - 
      P803 79 OSPI_OM_SIO1 - L - "Peripheral mode" - - "GPT12: GTIOC12B; GPT_POEGC: GTETRGC; OSPI: OM_SIO1; SCI2: DE2; SCI2: SCK2" - O - - 
      P804 80 OSPI_OM_SIO7 - L None "Peripheral mode" - - "GPT13: GTIOC13A; GPT_POEGD: GTETRGD; IRQ14: IRQ14; OSPI: OM_SIO7; SCI2: CTS_RTS2; SCI2: DE2" - O - - 
      P808 81 OSPI_OM_SCLK - L None "Peripheral mode" - - "GPT13: GTIOC13B; IRQ15: IRQ15; OSPI: OM_SCLK" - O - - 
      P809 82 - - - - Disabled - - "OSPI: OM_SCLKN" - None - - 
      P814 28 "USB FS_USB_DP" - L - "Peripheral mode" - - "CANFD0: CRX0; GPT8: GTIOC8B; USB FS: USB_DP" - IO - - 
      P815 27 "USB FS_USB_DM" - L - "Peripheral mode" - - "CANFD0: CTX0; GPT8: GTIOC8A; USB FS: USB_DM" - IO - - 
      RES 37 SYSTEM_RES - - - - - - - - IO "Read only" - 
      VBATT 8 SYSTEM_VBATT - - - - - - - - IO "Read only" - 
      VCC 15 SYSTEM_VCC - - - - - - - - IO "Read only" - 
      VCC 46 SYSTEM_VCC - - - - - - - - IO "Read only" - 
      VCC 58 SYSTEM_VCC - - - - - - - - IO "Read only" - 
      VCC2 73 SYSTEM_VCC2 - - - - - - - - IO "Read only" - 
      VCC_DCDC 60 SYSTEM_VCC_DCDC - - - - - - - - IO "Read only" - 
      VCC_DCDC 61 SYSTEM_VCC_DCDC - - - - - - - - IO "Read only" - 
      VCC_USB 29 SYSTEM_VCC_USB - - - - - - - - IO "Read only" - 
      VCL 9 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VCL 32 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VCL 59 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VCL 83 SYSTEM_VCL - - - - - - - - IO "Read only" - 
      VLO 62 SYSTEM_VLO - - - - - - - - IO "Read only" - 
      VLO 63 SYSTEM_VLO - - - - - - - - IO "Read only" - 
      VREFH 87 SYSTEM_VREFH - - - - - - - - IO "Read only" - 
      VREFH0 91 SYSTEM_VREFH0 - - - - - - - - IO "Read only" - 
      VREFL 86 SYSTEM_VREFL - - - - - - - - IO "Read only" - 
      VREFL0 90 SYSTEM_VREFL0 - - - - - - - - IO "Read only" - 
      VSS 12 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS 45 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS 57 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS 74 SYSTEM_VSS - - - - - - - - IO "Read only" - 
      VSS_DCDC 64 SYSTEM_VSS_DCDC - - - - - - - - IO "Read only" - 
      VSS_USB 26 SYSTEM_VSS_USB - - - - - - - - IO "Read only" - 
      XCIN 10 CGC_XCIN - - - - - - - - IO "Read only" - 
      XCOUT 11 CGC_XCOUT - - - - - - - - IO "Read only" - 
    
  User Events
    
  User Event Links
    
  Linker Section Mappings
    *(.bss.g_heap): RAM Uninitialized
    *(.bss.g_main_stack): RAM Uninitialized
    
  Module "I/O Port (r_ioport)"
    Parameter Checking: Default (BSP)
    CCD Support: Not Supported
    
  Module "UART (r_sci_b_uart)"
    Parameter Checking: Default (BSP)
    FIFO Support: Disable
    DTC Support: Disable
    Flow Control Support: Disable
    
  Module "I2S (r_ssi)"
    Parameter Checking: Default (BSP)
    DTC Support: Enabled
    
  Module "Timer, General PWM (r_gpt)"
    Parameter Checking: Default (BSP)
    Pin Output Support: Enabled
    Write Protect Enable: Disabled
    
  Module "Flash (r_flash_hp)"
    Parameter Checking: Default (BSP)
    Code Flash Programming Enable: Disabled
    Data Flash Programming Enable: Enabled
    
  Module "External IRQ (r_icu)"
    Parameter Checking: Default (BSP)
    
  Module "DAC (r_dac)"
    Parameter Checking: Default (BSP)
    
  Module "Timer, Low-Power (r_agt)"
    Parameter Checking: Default (BSP)
    Pin Output Support: Disabled
    Pin Input Support: Disabled
    
  Module "ADC (r_adc)"
    Parameter Checking: Default (BSP)
    
  Module "Event Link Controller (r_elc)"
    Parameter Checking: Default (BSP)
    
  Module "Transfer (r_dtc)"
    Parameter Checking: Default (BSP)
    Linker section to keep DTC vector table: .fsp_dtc_vector_table
    
  Module "I2C Master (r_iic_master)"
    Parameter Checking: Default (BSP)
    DTC on Transmission and Reception: Disabled
    10-bit slave addressing: Disabled
    
  HAL
    Instance "g_ioport I/O Port (r_ioport)"
      Name: g_ioport
      1st Port ELC Trigger Source: Disabled
      2nd Port ELC Trigger Source: Disabled
      3rd Port ELC Trigger Source: Disabled
      4th Port ELC Trigger Source: Disabled
      Pin Configuration Name: g_bsp_pin_cfg
      
    Instance "g_uart_ds UART (r_sci_b_uart)"
      General: Name: g_uart_ds
      General: Channel: 0
      General: Data Bits: 8bits
      General: Parity: None
      General: Stop Bits: 1bit
      Baud: Baud Rate: 460800
      Baud: Baud Rate Modulation: Enabled
      Baud: Max Error (%): 5
      Flow Control: CTS/RTS Selection: Hardware RTS
      Flow Control: Software RTS Port: Disabled
      Flow Control: Software RTS Pin: Disabled
      Extra: Clock Source: Internal Clock
      Extra: Start bit detection: Falling Edge
      Extra: Noise Filter: Disable
      Extra: Receive FIFO Trigger Level: Max
      Extra: RS-485: DE Pin: Disable
      Extra: RS-485: DE Pin Polarity: Active High
      Extra: RS-485: DE Pin Assertion Time: 1
      Extra: RS-485: DE Pin Negation Time: 1
      Interrupts: Callback: user_uart_callback
      Interrupts: Receive Interrupt Priority: Priority 12
      Interrupts: Transmit Data Empty Interrupt Priority: Priority 12
      Interrupts: Transmit End Interrupt Priority: Priority 12
      Interrupts: Error Interrupt Priority: Priority 12
      
    Instance "g_i2s0 I2S (r_ssi)"
      Name: g_i2s0
      Channel: 0
      Operating Mode (Master/Slave): Master Mode
      Bit Depth: 16 Bits
      Word Length: 32 Bits
      WS Continue Mode: Disabled
      Bit Clock Source(available only in Master mode): Internal AUDIO_CLK
      Bit Clock Divider(available only in Master mode): Audio Clock / 1
      Callback: g_audio_cb
      Transmit Interrupt Priority: Disabled
      Receive Interrupt Priority: Priority 2
      Idle/Error Interrupt Priority: Priority 2
      
      Instance "g_transfer0 Transfer (r_dtc) SSI0 RXI (Receive data full)"
        Name: g_transfer0
        Mode: Block
        Transfer Size: 4 Bytes
        Destination Address Mode: Incremented
        Source Address Mode: Fixed
        Repeat Area (Unused in Normal Mode): Destination
        Interrupt Frequency: After all transfers have completed
        Number of Transfers: 0
        Number of Blocks (Valid only in Block Mode): 0
        Number of Transfer Descriptors: 1
        Activation Source: SSI0 RXI (Receive data full)
        
    Instance "g_i2s_clock Timer, General PWM (r_gpt)"
      General: Name: g_i2s_clock
      General: Channel: 2
      General: Mode: Periodic
      General: Period: 1024000
      General: Compare Match: Compare Match A: Status: Disabled
      General: Compare Match: Compare Match A: Compare match value: 0
      General: Compare Match: Compare Match B: Status: Disabled
      General: Compare Match: Compare Match B: Compare match value: 0
      General: Compare Match: Compare Match C: Status: Disabled
      General: Compare Match: Compare Match C: Compare match value: 0x10000
      General: Compare Match: Compare Match D: Status: Disabled
      General: Compare Match: Compare Match D: Compare match value: 0x10000
      General: Compare Match: Compare Match E: Status: Disabled
      General: Compare Match: Compare Match E: Compare match value: 0x10000
      General: Compare Match: Compare Match F: Status: Disabled
      General: Compare Match: Compare Match F: Compare match value: 0x10000
      General: Period Unit: Hertz
      Output: Custom Waveform: GTIOA: Initial Output Level: Pin Level Low
      Output: Custom Waveform: GTIOA: Cycle End Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOA: Compare Match Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOA: Retain Output Level at Count Stop: Disabled
      Output: Custom Waveform: GTIOB: Initial Output Level: Pin Level Low
      Output: Custom Waveform: GTIOB: Cycle End Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOB: Compare Match Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOB: Retain Output Level at Count Stop: Disabled
      Output: Custom Waveform: Custom Waveform Enable: Disabled
      Output: Duty Cycle Percent (only applicable in PWM mode): 50
      Output: GTIOCA Output Enabled: True
      Output: GTIOCA Stop Level: Pin Level Low
      Output: GTIOCB Output Enabled: False
      Output: GTIOCB Stop Level: Pin Level Low
      Input: Count Up Source: 
      Input: Count Down Source: 
      Input: Start Source: 
      Input: Stop Source: 
      Input: Clear Source: 
      Input: Capture A Source: 
      Input: Capture B Source: 
      Input: Noise Filter A Sampling Clock Select: No Filter
      Input: Noise Filter B Sampling Clock Select: No Filter
      Pin Polarity: GTIOCnA Polarity: Normal
      Pin Polarity: GTIOCnB Polarity: Normal
      Interrupts: Callback: NULL
      Interrupts: Overflow/Crest Interrupt Priority: Disabled
      Interrupts: Capture/Compare match A Interrupt Priority: Disabled
      Interrupts: Capture/Compare match B Interrupt Priority: Disabled
      Interrupts: Compare Match C Interrupt Priority: Disabled
      Interrupts: Compare Match D Interrupt Priority: Disabled
      Interrupts: Compare Match E Interrupt Priority: Disabled
      Interrupts: Compare Match F Interrupt Priority: Disabled
      Interrupts: Underflow/Trough Interrupt Priority: Disabled
      Extra Features: Extra Features: Disabled
      Extra Features: Output Disable: POEG Link: POEG Channel 0
      Extra Features: Output Disable: Output Disable POEG Trigger: 
      Extra Features: ADC Trigger: Start Event Trigger (Channels with GTINTAD only): 
      Extra Features: ADC Trigger: ADC A Compare Match (Raw Counts): 0
      Extra Features: ADC Trigger: ADC B Compare Match (Raw Counts): 0
      Extra Features: Dead Time (Value range varies with Channel): Dead Time Count Up (Raw Counts): 0
      Extra Features: Dead Time (Value range varies with Channel): Dead Time Count Down (Raw Counts) (Channels with GTDVD only): 0
      Extra Features: Interrupt Skipping (Channels with GTITC only): Interrupt to Count: None
      Extra Features: Interrupt Skipping (Channels with GTITC only): Interrupt Skip Count: 0
      Extra Features: Interrupt Skipping (Channels with GTITC only): Skip ADC Events: None
      Extra Features: Output Disable: GTIOCA Disable Setting: Disable Prohibited
      Extra Features: Output Disable: GTIOCB Disable Setting: Disable Prohibited
      
    Instance "g_flash0 Flash (r_flash_hp)"
      Name: g_flash0
      Data Flash Background Operation: Enabled
      Callback: flash0_bgo_callback
      Flash Ready Interrupt Priority: Priority 8
      Flash Error Interrupt Priority: Priority 8
      
    Instance "g_irq_button_voice_tag External IRQ (r_icu)"
      Name: g_irq_button_voice_tag
      Channel: 0
      Trigger: Rising
      Digital Filtering: Enabled
      Filter Source: PCLK filter
      Digital Filtering Sample Clock (Only valid when Digital Filtering is Enabled): PCLK / 64
      Callback: g_irq_button_voice_tag_cb
      Pin Interrupt Priority: Priority 12
      
    Instance "g_dac_playback DAC (r_dac)"
      Name: g_dac_playback
      Channel: 0
      Synchronize with ADC: Disabled
      Data Format: Right Justified
      Output Amplifier: Disabled
      Charge Pump (Requires MOCO active): Not Supported
      Internal Output: Disabled
      ELC Trigger Source: Disabled
      Reference Voltage: Not supported
      
    Instance "g_timer_playback Timer, General PWM (r_gpt)"
      General: Name: g_timer_playback
      General: Channel: 0
      General: Mode: Periodic
      General: Period: 16000
      General: Compare Match: Compare Match A: Status: Disabled
      General: Compare Match: Compare Match A: Compare match value: 0
      General: Compare Match: Compare Match B: Status: Disabled
      General: Compare Match: Compare Match B: Compare match value: 0
      General: Compare Match: Compare Match C: Status: Disabled
      General: Compare Match: Compare Match C: Compare match value: 0x10000
      General: Compare Match: Compare Match D: Status: Disabled
      General: Compare Match: Compare Match D: Compare match value: 0x10000
      General: Compare Match: Compare Match E: Status: Disabled
      General: Compare Match: Compare Match E: Compare match value: 0x10000
      General: Compare Match: Compare Match F: Status: Disabled
      General: Compare Match: Compare Match F: Compare match value: 0x10000
      General: Period Unit: Hertz
      Output: Custom Waveform: GTIOA: Initial Output Level: Pin Level Low
      Output: Custom Waveform: GTIOA: Cycle End Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOA: Compare Match Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOA: Retain Output Level at Count Stop: Disabled
      Output: Custom Waveform: GTIOB: Initial Output Level: Pin Level Low
      Output: Custom Waveform: GTIOB: Cycle End Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOB: Compare Match Output Level: Pin Level Retain
      Output: Custom Waveform: GTIOB: Retain Output Level at Count Stop: Disabled
      Output: Custom Waveform: Custom Waveform Enable: Disabled
      Output: Duty Cycle Percent (only applicable in PWM mode): 50
      Output: GTIOCA Output Enabled: False
      Output: GTIOCA Stop Level: Pin Level Low
      Output: GTIOCB Output Enabled: False
      Output: GTIOCB Stop Level: Pin Level Low
      Input: Count Up Source: 
      Input: Count Down Source: 
      Input: Start Source: 
      Input: Stop Source: 
      Input: Clear Source: 
      Input: Capture A Source: 
      Input: Capture B Source: 
      Input: Noise Filter A Sampling Clock Select: No Filter
      Input: Noise Filter B Sampling Clock Select: No Filter
      Pin Polarity: GTIOCnA Polarity: Normal
      Pin Polarity: GTIOCnB Polarity: Normal
      Interrupts: Callback: g_timer_playback_callback
      Interrupts: Overflow/Crest Interrupt Priority: Priority 12
      Interrupts: Capture/Compare match A Interrupt Priority: Disabled
      Interrupts: Capture/Compare match B Interrupt Priority: Disabled
      Interrupts: Compare Match C Interrupt Priority: Disabled
      Interrupts: Compare Match D Interrupt Priority: Disabled
      Interrupts: Compare Match E Interrupt Priority: Disabled
      Interrupts: Compare Match F Interrupt Priority: Disabled
      Interrupts: Underflow/Trough Interrupt Priority: Disabled
      Extra Features: Extra Features: Disabled
      Extra Features: Output Disable: POEG Link: POEG Channel 0
      Extra Features: Output Disable: Output Disable POEG Trigger: 
      Extra Features: ADC Trigger: Start Event Trigger (Channels with GTINTAD only): 
      Extra Features: ADC Trigger: ADC A Compare Match (Raw Counts): 0
      Extra Features: ADC Trigger: ADC B Compare Match (Raw Counts): 0
      Extra Features: Dead Time (Value range varies with Channel): Dead Time Count Up (Raw Counts): 0
      Extra Features: Dead Time (Value range varies with Channel): Dead Time Count Down (Raw Counts) (Channels with GTDVD only): 0
      Extra Features: Interrupt Skipping (Channels with GTITC only): Interrupt to Count: None
      Extra Features: Interrupt Skipping (Channels with GTITC only): Interrupt Skip Count: 0
      Extra Features: Interrupt Skipping (Channels with GTITC only): Skip ADC Events: None
      Extra Features: Output Disable: GTIOCA Disable Setting: Disable Prohibited
      Extra Features: Output Disable: GTIOCB Disable Setting: Disable Prohibited
      
    Instance "g_timer_amic Timer, Low-Power (r_agt)"
      General: Name: g_timer_amic
      General: Counter Bit Width: AGT 16-bit
      General: Channel: 0
      General: Mode: Periodic
      General: Period: 16000
      General: Period Unit: Hertz
      Output: Duty Cycle Percent (only applicable in PWM mode): 50
      General: Count Source: PCLKB
      Output: AGTOA Output: Disabled
      Output: AGTOB Output: Disabled
      Output: AGTO Output: Disabled
      Input: Measurement Mode: Measure Disabled
      Input: Input Filter: No Filter
      Input: Enable Pin: Enable Pin Not Used
      Input: Trigger Edge: Trigger Edge Rising
      Interrupts: Callback: NULL
      Interrupts: Underflow Interrupt Priority: Disabled
      
    Instance "g_adc_amic ADC (r_adc)"
      General: Name: g_adc_amic
      General: Unit: 0
      General: Resolution: 12-Bit
      General: Alignment: Right
      General: Clear after read: On
      General: Mode: Single Scan
      General: Double-trigger: Disabled
      Input: Channel Scan Mask (channel availability varies by MCU): Channel 0
      Input: Group B Scan Mask (channel availability varies by MCU): 
      Interrupts: Normal/Group A Trigger: AGT0 INT (AGT interrupt)
      Interrupts: Group B Trigger: Disabled
      Interrupts: Group Priority (Valid only in Group Scan Mode): Group A cannot interrupt Group B
      Input: Add/Average Count: Disabled
      Input: Reference Voltage control: VREFH0/VREFH
      Input: Addition/Averaging Mask (channel availability varies by MCU and unit): 
      Input: Sample and Hold: Sample and Hold Channels (Available only on selected MCUs): 
      Input: Sample and Hold: Sample Hold States (Applies only to channels 0, 1, 2): 24
      Input: Window Compare: Window Mode: Disabled
      Input: Window Compare: Event Output: OR
      Input: Window Compare: Window A: Enable: Disabled
      Input: Window Compare: Window A: Channels to compare (channel availability varies by MCU and unit): 
      Input: Window Compare: Window A: Channel comparison mode (channel availability varies by MCU and unit): 
      Input: Window Compare: Window A: Lower Reference: 0
      Input: Window Compare: Window A: Upper Reference: 0
      Input: Window Compare: Window B: Enable: Disabled
      Input: Window Compare: Window B: Channel to compare (channel availability varies by MCU and unit): Channel 0
      Input: Window Compare: Window B: Comparison mode: Less Than or Outside Window
      Input: Window Compare: Window B: Lower Reference: 0
      Input: Window Compare: Window B: Upper Reference: 0
      Interrupts: Callback: adc_cb
      Interrupts: Scan End Interrupt Priority: Priority 2
      Interrupts: Scan End Group B Interrupt Priority: Disabled
      Interrupts: Window Compare A Interrupt Priority: Disabled
      Interrupts: Window Compare B Interrupt Priority: Disabled
      Extra: ADC Ring Buffer: Disabled
      
    Instance "g_elc Event Link Controller (r_elc)"
      Name: g_elc
      
    Instance "g_transfer_unused_instance Transfer (r_dtc) ADC0 SCAN END (End of A/D scanning operation)"
      Name: g_transfer_unused_instance
      Mode: Normal
      Transfer Size: 2 Bytes
      Destination Address Mode: Fixed
      Source Address Mode: Fixed
      Repeat Area (Unused in Normal Mode): Source
      Interrupt Frequency: After all transfers have completed
      Number of Transfers: 0
      Number of Blocks (Valid only in Block Mode): 0
      Number of Transfer Descriptors: 1
      Activation Source: ADC0 SCAN END (End of A/D scanning operation)
      
    Instance "g_i2c_da7218 I2C Master (r_iic_master)"
      Name: g_i2c_da7218
      Channel: 1
      Rate: Standard
      Custom Rate (bps): 0
      Rise Time (ns): 120
      Fall Time (ns): 120
      Duty Cycle (%): 50
      Slave Address: 0x1A
      Address Mode: 7-Bit
      Timeout Mode: Short Mode
      Timeout during SCL Low: Disabled
      Callback: i2c_master_callback
      Interrupt Priority Level: Priority 12
      
