BSP I/O access

Functions
__STATIC_INLINE uint32_t	R_BSP_PinRead (bsp_io_port_pin_t pin)
__STATIC_INLINE void	R_BSP_PinWrite (bsp_io_port_pin_t pin, bsp_io_level_t level)
__STATIC_INLINE void	R_BSP_PinCfg (bsp_io_port_pin_t pin, uint32_t cfg)
__STATIC_INLINE void	R_BSP_PinAccessEnable (void)
__STATIC_INLINE void	R_BSP_PinAccessDisable (void)

Detailed Description

This module provides basic read/write access to port pins.

Enumerations
enum	bsp_io_level_t
enum	bsp_io_direction_t
enum	bsp_io_port_t
enum	bsp_io_port_pin_t
enum	bsp_io_clk_output_t
enum	bsp_io_clk_func_t

Enumeration Type Documentation

bsp_io_level_t

enum bsp_io_level_t

Levels that can be set and read for individual pins

Enumerator
BSP_IO_LEVEL_LOW	Low.
BSP_IO_LEVEL_HIGH	High.

bsp_io_direction_t

enum bsp_io_direction_t

Direction of individual pins

Enumerator
BSP_IO_DIRECTION_INPUT	Input.
BSP_IO_DIRECTION_OUTPUT	Output.

bsp_io_port_t

enum bsp_io_port_t

Superset list of all possible IO ports.

Enumerator
BSP_IO_PORT_00	IO port 0.
BSP_IO_PORT_01	IO port 1.
BSP_IO_PORT_02	IO port 2.
BSP_IO_PORT_MAX	Marks end of enum

bsp_io_port_pin_t

enum bsp_io_port_pin_t

Superset list of all possible IO port pins.

Enumerator
BSP_IO_PORT_00_PIN_00	IO port 0 pin 0.
BSP_IO_PORT_00_PIN_01	IO port 0 pin 1.
BSP_IO_PORT_00_PIN_02	IO port 0 pin 2.
BSP_IO_PORT_00_PIN_03	IO port 0 pin 3.
BSP_IO_PORT_00_PIN_04	IO port 0 pin 4.
BSP_IO_PORT_00_PIN_05	IO port 0 pin 5.
BSP_IO_PORT_00_PIN_06	IO port 0 pin 6.
BSP_IO_PORT_00_PIN_07	IO port 0 pin 7.
BSP_IO_PORT_00_PIN_08	IO port 0 pin 8.
BSP_IO_PORT_00_PIN_09	IO port 0 pin 9.
BSP_IO_PORT_00_PIN_10	IO port 0 pin 10.
BSP_IO_PORT_00_PIN_11	IO port 0 pin 11.
BSP_IO_PORT_00_PIN_12	IO port 0 pin 12.
BSP_IO_PORT_00_PIN_13	IO port 0 pin 13.
BSP_IO_PORT_00_PIN_14	IO port 0 pin 14.
BSP_IO_PORT_00_PIN_15	IO port 0 pin 15.
BSP_IO_PORT_00_PIN_16	IO port 0 pin 16.
BSP_IO_PORT_00_PIN_17	IO port 0 pin 17.
BSP_IO_PORT_00_PIN_18	IO port 0 pin 18.
BSP_IO_PORT_00_PIN_19	IO port 0 pin 19.
BSP_IO_PORT_00_PIN_20	IO port 0 pin 20.
BSP_IO_PORT_00_PIN_21	IO port 0 pin 21.
BSP_IO_PORT_00_PIN_22	IO port 0 pin 22.
BSP_IO_PORT_00_PIN_23	IO port 0 pin 23.
BSP_IO_PORT_00_PIN_24	IO port 0 pin 24.
BSP_IO_PORT_00_PIN_25	IO port 0 pin 25.
BSP_IO_PORT_00_PIN_26	IO port 0 pin 26.
BSP_IO_PORT_00_PIN_27	IO port 0 pin 27.
BSP_IO_PORT_00_PIN_28	IO port 0 pin 28.
BSP_IO_PORT_00_PIN_29	IO port 0 pin 29.
BSP_IO_PORT_00_PIN_30	IO port 0 pin 30.
BSP_IO_PORT_00_PIN_31	IO port 0 pin 31.
BSP_IO_PORT_01_PIN_00	IO port 1 pin 0.
BSP_IO_PORT_01_PIN_01	IO port 1 pin 1.
BSP_IO_PORT_01_PIN_02	IO port 1 pin 2.
BSP_IO_PORT_01_PIN_03	IO port 1 pin 3.
BSP_IO_PORT_01_PIN_04	IO port 1 pin 4.
BSP_IO_PORT_01_PIN_05	IO port 1 pin 5.
BSP_IO_PORT_01_PIN_06	IO port 1 pin 6.
BSP_IO_PORT_01_PIN_07	IO port 1 pin 7.
BSP_IO_PORT_01_PIN_08	IO port 1 pin 8.
BSP_IO_PORT_01_PIN_09	IO port 1 pin 9.
BSP_IO_PORT_01_PIN_10	IO port 1 pin 10.
BSP_IO_PORT_01_PIN_11	IO port 1 pin 11.
BSP_IO_PORT_01_PIN_12	IO port 1 pin 12.
BSP_IO_PORT_01_PIN_13	IO port 1 pin 13.
BSP_IO_PORT_01_PIN_14	IO port 1 pin 14.
BSP_IO_PORT_01_PIN_15	IO port 1 pin 15.
BSP_IO_PORT_01_PIN_16	IO port 1 pin 16.
BSP_IO_PORT_01_PIN_17	IO port 1 pin 17.
BSP_IO_PORT_02_PIN_00	IO port 2 pin 0.
BSP_IO_PORT_02_PIN_01	IO port 2 pin 1.
BSP_IO_PORT_02_PIN_02	IO port 2 pin 2.
BSP_IO_PORT_02_PIN_03	IO port 2 pin 3.
BSP_IO_PORT_02_PIN_04	IO port 2 pin 4.
BSP_IO_PORT_02_PIN_05	IO port 2 pin 5.
BSP_IO_PORT_02_PIN_06	IO port 2 pin 6.
BSP_IO_PORT_02_PIN_07	IO port 2 pin 7.
BSP_IO_PORT_02_PIN_08	IO port 2 pin 8.
BSP_IO_PORT_02_PIN_09	IO port 2 pin 9.
BSP_IO_PORT_02_PIN_10	IO port 2 pin 10.
BSP_IO_PORT_02_PIN_11	IO port 2 pin 11.
BSP_IO_PORT_02_PIN_12	IO port 2 pin 12.
BSP_IO_PORT_FF_PIN_FF	Invalid IO port.

bsp_io_clk_output_t

enum bsp_io_clk_output_t

Clocks that can be mapped to dedicated BSP_IO

Enumerator
BSP_IO_CLK_XTAL40M_OUT	Map clock XTAL40M to dedicated GPIO
BSP_IO_CLK_RC10M_OUT	Map clock RC10M to dedicated GPIO
BSP_IO_CLK_XTAL32K_OUT	Map clock XTAL32K to dedicated GPIO
BSP_IO_CLK_OSC32K_OUT	Map clock OSC32K to dedicated GPIO
BSP_IO_CLK_FPLL98M_OUT	Map clock FPLL98M to dedicated GPIO
BSP_IO_CLK_DPLL480M_OUT	Map clock FPLL98M to dedicated GPIO
BSP_IO_CLK_MCLK_OUT	Map clock MCLK to dedicated GPIO

bsp_io_clk_func_t

enum bsp_io_clk_func_t

Clocks that can be mapped to GPIO function FUNC_CLOCK

Enumerator
BSP_IO_CLK_XTAL40M_FUNC	Map clock XTAL40M to GPIO function FUNC_CLOCK
BSP_IO_CLK_RC10M_FUNC	Map clock RC10M to GPIO function FUNC_CLOCK
BSP_IO_CLK_XTAL32K_FUNC	Map clock XTAL32K to GPIO function FUNC_CLOCK
BSP_IO_CLK_OSC32K_FUNC	Map clock OSC32K to GPIO function FUNC_CLOCK
BSP_IO_CLK_FPLL98M_FUNC	Map clock FPLL98M to GPIO function FUNC_CLOCK
BSP_IO_CLK_DPLL480M_FUNC	Map clock DPLL480M to GPIO function FUNC_CLOCK
BSP_IO_CLK_DIVN_FUNC	Map clock DIVn to GPIO function FUNC_CLOCK

Function Documentation

R_BSP_PinRead()

__STATIC_INLINE uint32_t R_BSP_PinRead

(

bsp_io_port_pin_t

pin

)

Read the current input level of the pin.

Parameters

[in]

pin

The pin

Return values

Current

input level

R_BSP_PinWrite()

__STATIC_INLINE void R_BSP_PinWrite	(	bsp_io_port_pin_t	pin,
		bsp_io_level_t	level
	)

Set a pin to output and set the output level to the level provided.

Parameters

[in]	pin	The pin
[in]	level	The level

R_BSP_PinCfg()

__STATIC_INLINE void R_BSP_PinCfg	(	bsp_io_port_pin_t	pin,
		uint32_t	cfg
	)

Configure a pin.

Parameters

[in]	pin	The pin
[in]	cfg	Configuration for the pin

R_BSP_PinAccessEnable()

__STATIC_INLINE void R_BSP_PinAccessEnable

(

void

)

Enable access to the PFS registers. Uses a reference counter to protect against interrupts that could occur via multiple threads or an ISR re-entering this code.

Note

: The DA HW does not provide such protection, so this function is a NOP.

R_BSP_PinAccessDisable()

__STATIC_INLINE void R_BSP_PinAccessDisable

(

void

)

Disable access to the PFS registers. Uses a reference counter to protect against interrupts that could occur via multiple threads or an ISR re-entering this code.

Note

: The DA HW does not provide such protection, so this function is a NOP.