RAFW Flexible Software Package Documentation  Release v2.0.1

 
bsp_defaults_ra6w1.h File Reference

Board Support Package. Device-specific system configuration default values. More...

Macros

#define dg_configRC32K_FREQ
 Vaule of the RC32K oscilator frequency in Hz.
 
#define dg_configLP_CLK_DRIFT
 Acceptable clock tick drift (in parts per million) for the Low-power clock.
 
#define dg_configXTAL32K_SETTLE_TIME
 Time needed for the settling of the LP clock, in msec.
 
#define dg_configXTAL40M_SETTLE_TIME_IN_USEC
 XTAL40M settle time. More...
 
#define dg_configENABLE_XTAL40M_ON_WAKEUP
 Enable XTAL40M upon system wake-up. More...
 
#define dg_configVOLTAGE_CHECK_LP_CYCLES
 The number of LP clock cycles required to check the voltage of an LDO during startup.
 
#define dg_configHW_FSM_WAKEUP_CYCLES
 The number of LP clock cycles required for the HW FSM to detect the wake-up signal.
 
#define dg_configSYSTEM_STARTUP_CYCLES
 The number of LP clock cycles required for the system to start-up.
 
#define dg_configWAKEUP_RC32_TIME_SLOW
 RC32 wake-up time in slow wake-up mode. More...
 
#define dg_configWAKEUP_RC32_TIME_FAST
 RC32 wake-up time in fast wake-up mode. More...
 
#define dg_configWAKEUP_RC32_TIME_ULTRA_FAST
 RC32 wake-up time. More...
 
#define dg_configDEFAULT_CLK_FREQ_TRIM_REG__XTAL32M_TRIM__VALUE
 XTAL32M trimming default settings.
 
#define dg_configWDOG_IDLE_RESET_VALUE
 Reset value for Watchdog when system is idle.
 
#define dg_configWDOG_MAX_TASKS_CNT
 Maximum watchdog tasks. More...
 
#define dg_configWDOG_EXT
 Extend maximum watchdog tasks. More...
 
#define dg_configPOWER_1V8_ACTIVE
 When set to 1, the 1V8 rail is powered, when the system is in active state. When set to 2 the rail configuration will be defined by the application.
 
#define dg_configPOWER_1V8_SLEEP
 When set to 1, the 1V8 is powered during sleep. When set to 2 the rail configuration will be defined by the application.
 
#define dg_configPOWER_1V8P_ACTIVE
 When set to 1, the 1V8P rail is powered. More...
 
#define dg_configPOWER_1V8P_SLEEP
 When set to 1, the 1V8P is powered during sleep. When set to 2 the rail configuration will be defined by the application.
 
#define dg_configFLASH_POWER_OFF
 When set to 1, the Flash is powered off during sleep.
 
#define dg_configQSPIC2_DEV_AUTODETECT
 Enable the Auto-detection mode for QSPIC2 device. More...
 
#define dg_configQSPIC2_DEV_HEADER_FILE
 The QSPI 2 Driver header file to include. More...
 
#define dg_configQSPIC2_DEV_CONFIG
 The QSPI 2 Driver configuration structure. More...
 
#define dg_configFLASH_HEADER_FILE
 The Flash Driver header file to include. More...
 
#define dg_configFLASH_CONFIG
 The Flash Driver configuration structure. More...
 
#define dg_configFLASH_CONFIG_VERIFY
 Flash device configuration verification. More...
 
#define dg_configUSE_SOC
 When set to 1, State of Charge function is enabled.
 
#define dg_configUART3_SOFTWARE_FIFO_SIZE
 UART3's software FIFO size.
 
#define dg_configUART3_RX_CIRCULAR_DMA_BUF_SIZE
 UART3's Circular DMA buffer size for RX.
 
#define dg_configUSE_BOARD
 Set the board that is used.
 

Detailed Description

Board Support Package. Device-specific system configuration default values.

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