RAFW Flexible Software Package Documentation  Release v2.0.1

 
DMIC (r_dmic_w)

Functions

fsp_err_t R_DMIC_W_Open (dmic_ctrl_t *const p_ctrl, dmic_cfg_t const *const p_cfg)
 
fsp_err_t R_DMIC_W_Write (dmic_ctrl_t *const p_ctrl, void const *const p_src, uint32_t const bytes)
 
fsp_err_t R_DMIC_W_Read (dmic_ctrl_t *const p_ctrl, void *const p_dest, uint32_t const bytes)
 
fsp_err_t R_DMIC_W_WriteRead (dmic_ctrl_t *const p_ctrl, void const *const p_src, void *const p_dest, uint32_t const bytes)
 
fsp_err_t R_DMIC_W_Stop (dmic_ctrl_t *const p_ctrl)
 
fsp_err_t R_DMIC_W_Mute (dmic_ctrl_t *const p_ctrl, dmic_mute_t const mute_enable)
 
fsp_err_t R_DMIC_W_StatusGet (dmic_ctrl_t *const p_ctrl, dmic_status_t *const p_status)
 
fsp_err_t R_DMIC_W_Close (dmic_ctrl_t *const p_ctrl)
 
fsp_err_t R_DMIC_W_CallbackSet (dmic_ctrl_t *const p_api_ctrl, void(*p_callback)(dmic_callback_args_t *), void const *const p_context, dmic_callback_args_t *const p_callback_memory)
 

Detailed Description

Driver for the DMIC peripheral on RAFW MCUs. This module implements the DMIC Interface.

Overview

Features

The DMIC module supports the following features:

Configuration

Build Time Configurations for r_dmic_w

The following build time configurations are defined in fsp_cfg/r_dmic_w_cfg.h:

ConfigurationOptionsDefaultDescription
Parameter Checking
  • Default (BSP)
  • Enabled
  • Disabled
Default (BSP) If selected code for parameter checking is included in the build.

Configurations for Connectivity > DMIC (r_dmic_w)

This module can be added to the Stacks tab via New Stack > Connectivity > DMIC (r_dmic_w). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.

ConfigurationOptionsDefaultDescription
NameName must be a valid C symbolg_dmic0 Module name.
Clock[Hz] (available only in Master mode)Value must be a non-negative integer3072000 Specify the DMIC clock in Hz.
Operating Mode (Master/Slave)
  • Master Mode
  • Slave Mode
Master Mode Select if the MCU is DMIC master or slave.
Data Directioon (Input/Output)
  • INPUT
  • OUTPUT
INPUT Select DMIC data direction.
Swap Channel (Enable/Disable)
  • Enable
  • Disable
Enable Swap channel enable
DMIC internal delay
  • 0ns
  • 6ns
  • 12ns
  • 18ns
0ns Select DMIC data delay.
Receive Interrupt PriorityMCU Specific OptionsSelect the receive interrupt priority.
CallbackName must be a valid C symbolg_dmic0_callback A user callback function must be provided. This will be called from the interrupt service routine (ISR) upon DMIC transaction completion reporting the transaction status.

Clock Configuration

The DMIC peripheral runs on FPLLCLK. The FPLLCLK frequency can be configured on the Clocks tab of the RAFW Configuration editor. The DMIC audio clock can optionally be supplied from an external source through the DMIC_CLK pin in slave mode.

Pin Configuration

The DMIC uses the following pins:

Usage Notes

DMIC Frames

A DMIC interface has 2 channels (Left/Right) of data.

Audio Data

PDM(Pulse Density Modulation) data is supported.

Audio Clock

The audio clock is only required for master mode.

Audio Clock Frequency

768,000 <= DMIC clock (Hz) <= 4096000

Audio Clock Source

The audio clock source can come from:

Examples

Loopback Example

This is an example of the DMIC-I2S loopback in an application.

void dmic_i2s_loopback_example(void)
{
bsp_src_config_t src_config;
hw_clk_enable_fpll_test(FPLL_98M,FPLL_MODE_NO_IRM);
REG_SET_BIT(SRC_IF, APU_SRC_CTRL_REG, SRC_EN);
R_GPIO_W_PinCfg(&g_ioport_ctrl, DMIC_TESTS_MASTER_DI_PIN, (uint32_t) DMIC_TESTS_MASTER_DI_PIN_SETTING);
R_GPIO_W_PinCfg(&g_ioport_ctrl, DMIC_TESTS_MASTER_CLK_PIN, (uint32_t) DMIC_TESTS_MASTER_CLK_PIN_SETTING);
R_GPIO_W_PinCfg(&g_ioport_ctrl, I2S_TESTS_MASTER_FSC_PIN, (uint32_t) I2S_TESTS_MASTER_FSC_PIN_SETTING);
R_GPIO_W_PinCfg(&g_ioport_ctrl, I2S_TESTS_MASTER_DO_PIN, (uint32_t) I2S_TESTS_MASTER_DO_PIN_SETTING);
R_GPIO_W_PinCfg(&g_ioport_ctrl, I2S_TESTS_MASTER_DI_PIN, (uint32_t) I2S_TESTS_MASTER_DI_PIN_SETTING);
R_GPIO_W_PinCfg(&g_ioport_ctrl, I2S_TESTS_MASTER_CLK_PIN, (uint32_t) I2S_TESTS_MASTER_CLK_PIN_SETTING);
REG_SETF(CRG_TOP, CLK_AMBA_REG, OQSPI_GPIO_MODE, 1);//PORT1 0~3 OQSPI ==> GPIO
R_BSP_src_set_automode(HW_SRC1, HW_SRC_IN);
R_BSP_src_set_automode(HW_SRC1, HW_SRC_OUT);
g_dmic_test_cfg_ref.clk_frequency = 3072000;
g_dmic_test_cfg_ref.mode = DMIC_MODE_MASTER;
g_dmic_test_cfg_ref.direction = DMIC_DIRECTION_INPUT;
g_dmic_test_cfg_ref.delay = DMIC_DI_NO_DELAY;
g_dmic_test_cfg_ref.swap_channel = false;
R_DMIC_W_Open(&g_dmic_ctrl, &g_dmic_test_cfg_ref);
R_BSP_src_set_automode_sync(HW_SRC1, HW_SRC_IN, HW_SRC_INPUT_MUX_PCM_OUT_REG);
R_BSP_src_set_automode_sync(HW_SRC1, HW_SRC_OUT, HW_SRC_INPUT_MUX_PCM_OUT_REG);
src_config.in_sample_rate = 48000;
src_config.out_sample_rate = 48000;
src_config.id = HW_SRC1;
R_BSP_src_select_mux(HW_SRC_PDM, HW_SRC_REGS, &src_config);
R_BSP_src_init(HW_SRC1, &src_config);
R_BSP_src_select_mux(HW_SRC_PDM, HW_SRC_REGS, &src_config);
R_I2S_W_Open(&g_i2s_w_ctrl, &g_i2s_test_cfg_ref);
R_BSP_src_enable(HW_SRC1);
REG_SETF(SRC_IF, APU_SRC_CTRL_REG , SRC_PDM_EN, 1);
while(1){
__ASM volatile ("wfi");
}
}

Data Structures

struct  dmic_instance_ctrl_t
 
struct  dmic_extended_cfg_t
 

Enumerations

enum  dmic_audio_clock_t
 

Data Structure Documentation

◆ dmic_instance_ctrl_t

struct dmic_instance_ctrl_t

Channel instance control block. DO NOT INITIALIZE. Initialization occurs when dmic_api_t::open is called.

◆ dmic_extended_cfg_t

struct dmic_extended_cfg_t

I2S configuration extension. This extension is optional.

Data Fields
dmic_audio_clock_t audio_clock Audio clock source, default is I2S_W_AUDIO_CLOCK_CRYSTAL.

Enumeration Type Documentation

◆ dmic_audio_clock_t

Audio clock source.

Enumerator
DMIC_AUDIO_CLOCK_CRYSTAL 

Audio clock source is the AUDIO_CLK input pin.

DMIC_AUDIO_CLOCK_FPLL 

Audio clock source is internal connection to a MCU specific GPT channel output.

Function Documentation

◆ R_DMIC_W_Open()

fsp_err_t R_DMIC_W_Open ( dmic_ctrl_t *const  p_ctrl,
dmic_cfg_t const *const  p_cfg 
)

Opens the DMIC. Implements dmic_api_t::open.

This function sets this clock divisor and the configurations specified in dmic_cfg_t. It also opens the timer and transfer instances if they are provided.

Return values
FSP_SUCCESSReady for DMIC communication.
FSP_ERR_ASSERTIONThe pointer to p_ctrl or p_cfg is null.
FSP_ERR_ALREADY_OPENThe control block has already been opened.
FSP_ERR_IP_CHANNEL_NOT_PRESENTChannel number is not available on this MCU.
Returns
See Common Error Codes or functions called by this function for other possible return codes. This function calls:

◆ R_DMIC_W_Write()

fsp_err_t R_DMIC_W_Write ( dmic_ctrl_t *const  p_ctrl,
void const *const  p_src,
uint32_t const  bytes 
)

Writes data buffer to DMIC. Implements dmic_api_t::write.

This function resets the transfer if the transfer interface is used, or writes the length of data that fits in the FIFO then stores the remaining write buffer in the control block to be written in the ISR.

Write() cannot be called if another write(), read() or writeRead() operation is in progress. Write can be called when the DMIC is idle, or after the DMIC_EVENT_TX_EMPTY event.

Return values
FSP_SUCCESSWrite initiated successfully.
FSP_ERR_ASSERTIONThe pointer to p_ctrl or p_src was null, or bytes requested was 0.
FSP_ERR_IN_USEAnother transfer is in progress, data was not written.
FSP_ERR_NOT_OPENThe channel is not opened.
FSP_ERR_UNDERFLOWA transmit underflow error is pending. Wait for the DMIC to go idle before resuming communication.
Returns
See Common Error Codes or functions called by this function for other possible return codes. This function calls:

◆ R_DMIC_W_Read()

fsp_err_t R_DMIC_W_Read ( dmic_ctrl_t *const  p_ctrl,
void *const  p_dest,
uint32_t const  bytes 
)

Reads data into provided buffer. Implements dmic_api_t::read.

This function resets the transfer if the transfer interface is used, or reads the length of data available in the FIFO then stores the remaining read buffer in the control block to be filled in the ISR.

Read() cannot be called if another write(), read() or writeRead() operation is in progress. Read can be called when the DMIC is idle, or after the DMIC_EVENT_RX_FULL event.

Return values
FSP_SUCCESSRead initiated successfully.
FSP_ERR_IN_USEPeripheral is in the wrong mode or not idle.
FSP_ERR_ASSERTIONThe pointer to p_ctrl or p_dest was null, or bytes requested was 0.
FSP_ERR_NOT_OPENThe channel is not opened.
FSP_ERR_OVERFLOWA receive overflow error is pending. Wait for the DMIC to go idle before resuming communication.
Returns
See Common Error Codes or functions called by this function for other possible return codes. This function calls:

◆ R_DMIC_W_WriteRead()

fsp_err_t R_DMIC_W_WriteRead ( dmic_ctrl_t *const  p_ctrl,
void const *const  p_src,
void *const  p_dest,
uint32_t const  bytes 
)

Writes from source buffer and reads data into destination buffer. Implements dmic_api_t::writeRead.

writeRead() cannot be called if another write(), read() or writeRead() operation is in progress. writeRead() can be called when the DMIC is idle, or after the DMIC_EVENT_RX_FULL event.

Return values
FSP_SUCCESSWrite and read initiated successfully.
FSP_ERR_IN_USEPeripheral is in the wrong mode or not idle.
FSP_ERR_ASSERTIONAn input parameter was invalid.
FSP_ERR_NOT_OPENThe channel is not opened.
FSP_ERR_UNDERFLOWA transmit underflow error is pending. Wait for the DMIC to go idle before resuming communication.
FSP_ERR_OVERFLOWA receive overflow error is pending. Wait for the DMIC to go idle before resuming communication.
Returns
See Common Error Codes or functions called by this function for other possible return codes. This function calls:

◆ R_DMIC_W_Stop()

fsp_err_t R_DMIC_W_Stop ( dmic_ctrl_t *const  p_ctrl)

Stops DMIC. Implements dmic_api_t::stop.

This function disables both transmission and reception, and disables any transfer instances used.

The DMIC will stop on the next frame boundary. Do not restart DMIC until it is idle.

Return values
FSP_SUCCESSDMIC communication stop request issued.
FSP_ERR_ASSERTIONThe pointer to p_ctrl was null.
FSP_ERR_NOT_OPENThe channel is not opened.
Returns
See Common Error Codes or lower level drivers for other possible return codes.

◆ R_DMIC_W_Mute()

fsp_err_t R_DMIC_W_Mute ( dmic_ctrl_t *const  p_ctrl,
dmic_mute_t const  mute_enable 
)

Mutes DMIC on the next frame boundary. Implements dmic_api_t::mute.

Data is still written while mute is enabled, but the transmit line outputs zeros.

Return values
FSP_SUCCESSTransmission is muted.
FSP_ERR_ASSERTIONThe pointer to p_ctrl was null.
FSP_ERR_NOT_OPENThe channel is not opened.

◆ R_DMIC_W_StatusGet()

fsp_err_t R_DMIC_W_StatusGet ( dmic_ctrl_t *const  p_ctrl,
dmic_status_t *const  p_status 
)

Gets DMIC status and stores it in provided pointer p_status. Implements dmic_api_t::statusGet.

Return values
FSP_SUCCESSInformation stored successfully.
FSP_ERR_ASSERTIONThe p_instance_ctrl or p_status parameter was null.
FSP_ERR_NOT_OPENThe channel is not opened.

◆ R_DMIC_W_Close()

fsp_err_t R_DMIC_W_Close ( dmic_ctrl_t *const  p_ctrl)

Closes DMIC. Implements dmic_api_t::close.

This function powers down the DMIC and closes the lower level timer and transfer drivers if they are used.

Return values
FSP_SUCCESSDevice closed successfully.
FSP_ERR_ASSERTIONThe pointer to p_ctrl was null.
FSP_ERR_NOT_OPENThe channel is not opened.

◆ R_DMIC_W_CallbackSet()

fsp_err_t R_DMIC_W_CallbackSet ( dmic_ctrl_t *const  p_api_ctrl,
void(*)(dmic_callback_args_t *)  p_callback,
void const *const  p_context,
dmic_callback_args_t *const  p_callback_memory 
)

Updates the user callback and has option of providing memory for callback structure. Implements dmic_api_t::callbackSet

Return values
FSP_SUCCESSCallback updated successfully.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENThe control block has not been opened.
FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.