RAFW Flexible Software Package Documentation  Release v2.0.1

 
Timer, General Purpose (r_tim_w)

Functions

fsp_err_t R_TIM_W_Open (timer_ctrl_t *const p_ctrl, timer_cfg_t const *const p_cfg)
 
fsp_err_t R_TIM_W_Stop (timer_ctrl_t *const p_ctrl)
 
fsp_err_t R_TIM_W_Start (timer_ctrl_t *const p_ctrl)
 
fsp_err_t R_TIM_W_Reset (timer_ctrl_t *const p_ctrl)
 
fsp_err_t R_TIM_W_Enable (timer_ctrl_t *const p_ctrl)
 
fsp_err_t R_TIM_W_Disable (timer_ctrl_t *const p_ctrl)
 
fsp_err_t R_TIM_W_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)
 
fsp_err_t R_TIM_W_PeriodSet_light (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)
 
fsp_err_t R_TIM_W_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)
 
fsp_err_t R_TIM_W_CompareMatchSet (timer_ctrl_t *const p_ctrl, uint32_t const compare_match_value, timer_compare_match_t const match_channel)
 
fsp_err_t R_TIM_W_SequentialCapturesGet (timer_ctrl_t *const p_ctrl, uint32_t *const p_captures)
 
fsp_err_t R_TIM_W_InfoGet (timer_ctrl_t *const p_ctrl, timer_info_t *const p_info)
 
fsp_err_t R_TIM_W_StatusGet (timer_ctrl_t *const p_ctrl, timer_status_t *const p_status)
 
fsp_err_t R_TIM_W_CallbackSet (timer_ctrl_t *const p_api_ctrl, void(*p_callback)(timer_callback_args_t *), void *const p_context, timer_callback_args_t *const p_callback_memory)
 
fsp_err_t R_TIM_W_Close (timer_ctrl_t *const p_ctrl)
 

Detailed Description

Driver for the TIM_W peripherals on RA for Wireless (RAFW) MCUs. This module implements the Timer Interface.

Overview

The TIM_W module can be used to count events, measure external input signals, generate a periodic interrupt, or output a periodic, one-shot or PWM signal to a GPIO pin.

Features

The TIM_W module has the following features:

Configuration

Build Time Configurations for r_tim_w

The following build time configurations are defined in fsp_cfg/r_tim_w_cfg.h:

ConfigurationOptionsDefaultDescription
Parameter Checking
  • Default (BSP)
  • Enabled
  • Disabled
Default (BSP) If selected code for parameter checking is included in the build.
Pin Output Support
  • Disabled
  • Enabled
Disabled Enables or disables support for outputting PWM waveforms on GPIO pins.

Configurations for Timers > Timer, General Purpose (r_tim_w)

This module can be added to the Stacks tab via New Stack > Timers > Timer, General Purpose (r_tim_w). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.

ConfigurationOptionsDefaultDescription
General
General > Capture/Compare Match Operations
General > Capture/Compare Match Operations > Compare Match
Compare Match A StatusMCU Specific Options
Compare Match A ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match A value in units that selected in Period Unit section.
Compare Match B StatusMCU Specific Options
Compare Match B ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match B value in units that selected in Period Unit section.
Compare Match C StatusMCU Specific Options
Compare Match C ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match C value in units that selected in Period Unit section.
Compare Match D StatusMCU Specific Options
Compare Match D ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match D value in units that selected in Period Unit section.
Compare Match E StatusMCU Specific Options
Compare Match E ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match E value in units that selected in Period Unit section.
Compare Match F StatusMCU Specific Options
Compare Match F ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match F value in units that selected in Period Unit section.
Compare Match G StatusMCU Specific Options
Compare Match G ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match G value in units that selected in Period Unit section.
Compare Match H StatusMCU Specific Options
Compare Match H ValueValue must be a non-negative integer less than 0x100000000000 Specify the compare match H value in units that selected in Period Unit section.
General > Capture/Compare Match Operations > Capture
Sequential CapturesValue must be an integer between 1 and 80 Specify the number of sequential captures that should be triggered before an interrupt is generated. If this option is set (1 up to 8), each captured value will be stored sequentially.
Single Capture Mode
  • Enabled
  • Disabled
Disabled If the single capture mode is enabled, only the first edge will be captured and subsequent edges will be ignored.
Number of channels to be configuredValue must be a non-negative integer0 Select the number of capture/compare channels to be configured.
General > One-Shot
delayValue must be a non-negative integer less than 0x100000000000 Select one-shot delay count. The restriction is the same as General->Period. To specify the desired period, please consider the prescaler setting of General->Period or specify it manually.
Automatic switching the mode from One-Shot to Periodic
  • Enabled
  • Disabled
Disabled Enabled: The timer switches the mode from one-shot to periodic after the one-shot expires.
Disabled: The timer keeps one-shot mode after the one-shot expiration and wait for next trigger.
To receive the interrupt when one-shot expires, please enable this property.
NameName must be a valid C symbolg_timer0 Module name.
ChannelEnter the supported Channel number1 Specify the hardware channel.
Mode
  • Periodic
  • One-Shot
  • PWM
  • Edge Detect
Periodic Mode selection.
Periodic: Generates periodic interrupts or fixed 50% duty PWM wave.
One-shot: Generate a single interrupt or a pulse wave.
PWM: Generates PWM waveforms with user-specific duty cycle.
Edge Detect: Detects input edge.
PeriodValue must be a non-negative integer less than 0x10000000000 (or less than 0x1000000 if pwm_support is enabled)0x10000 Specify the timer period in units selected below. The period can be set up to 0x10000000000 (32-bit) which will use a divider of 256 with the maximum period.

If the requested period cannot be achieved, the settings with the largest possible period that is less than or equal to the requested period are used. The theoretical calculated period is printed in a comment in the generated timer_cfg_t structure.
Period Unit
  • Raw Counts
  • Nanoseconds
  • Microseconds
  • Milliseconds
  • Seconds
  • Hertz
  • Kilohertz
Raw Counts Unit of the period specified above
Low-Power Clock Frequency (Hz)Value must be a positive integer0 Specify the nominal or measured (via R_CAC) frequency of the selected LP Clock.
Clock selectMCU Specific OptionsTimer clock
Clock source dividerMCU Specific OptionsTimer clock source division ratio
Count Direction
  • Up
  • Down
Up Timer count direction.
Free Run
  • Enabled
  • Disabled
Disabled Timer does not zero after period expires.
Input
Input > Capture Trigger
Capture Channel GPIO A Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO B Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO C Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO D Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO E Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO F Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO G Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Capture Channel GPIO H Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled Capture trigger will occure on the selected edge when an option other than disabled is selected.
Timer ELC Signal SourceMCU Specific OptionsELC source that will trigger the Timer
ELC Task
  • Disabled
  • Start Timer
  • Stop Timer
  • Timer counts up (Edge Detect mode)
  • Clear Timer
  • Start One-shot
  • Capture Timer snapshot
  • Toggle Timer pause state
Disabled Select the task to be performed upon the reception of an ELC event.
ELC Capture Channel
  • Capture Channel A
  • Capture Channel B
  • Capture Channel C
  • Capture Channel D
  • Capture Channel E
  • Capture Channel F
  • Capture Channel G
  • Capture Channel H
Capture Channel A Select the capture channel that will hold the captured value when triggered by the ELC task.
GPIO Trigger
  • Disabled
  • Rising Edge
  • Falling Edge
Disabled If GPIO trigger is not disabled, the GPIO source will be used to trigger One-shot (when in One-shot mode) and count up pulses (when in Edge Detect mode).
Output
Output > PWM Sync
Timer channel 2MCU Specific OptionsIf enabled, 2nd Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 3MCU Specific OptionsIf enabled, 3rd Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 4MCU Specific OptionsIf enabled, 4th Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 5MCU Specific OptionsIf enabled, 5th Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 6MCU Specific OptionsIf enabled, 6th Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 7MCU Specific OptionsIf enabled, 7th Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 8MCU Specific OptionsIf enabled, 8th Timer will act as a slave to PWM Synchronization following Master Timer.
Timer channel 9MCU Specific OptionsIf enabled, 9th Timer will act as a slave to PWM Synchronization following Master Timer.
Duty Cycle Percent (only applicable in PWM mode)Value must be between 0 and 10050 Specify the timer duty cycle percent. Only used in PWM mode.
PWM Support
  • Disabled
  • Enabled
Disabled If enabled, the module limits the period to 0x10000 to support PWM functionality.
Interrupts
CallbackName must be a valid C symbolNULL A user callback function can be specified here. If this callback function is provided, it will be called from the interrupt service routine (ISR) each time the timer period elapses
Cycle end Interrupt PriorityMCU Specific OptionsSelect the cycle end interrupt priority.
Overflow Interrupt PriorityMCU Specific OptionsSelect the overflow interrupt priority.
Capture/Compare match A Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match A.
Capture/Compare match B Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match B.
Capture/Compare match C Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match C.
Capture/Compare match D Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match D.
Capture/Compare match E Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match E.
Capture/Compare match F Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match F.
Capture/Compare match G Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match G.
Capture/Compare match H Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for Capture/Compare match H.
Underflow Interrupt PriorityMCU Specific OptionsSelect the interrupt priority for the underflow interrupt.

Clock Configuration

TIM_W has two configurations available for clock source, DIVN and LP_CLK. Adjusting the TIM_W frequency can be done using the internal source clock divider. The TIM_W can operate in all low power modes as long as lp_clk is selected as the TIM_W source clock.

If LP_CLK is selected as timer source clock, the selected LP_CLK frequency must be specified in the general stack configuration

Pin Configuration

This module can use GPIO pins as Input sources:

To configure the GPIO pins as TIM_W inputs/outputs, the equivalent pins should be configured in the pins tab.

Usage Notes

Capture Compare-Match Operations Configuration

Capture/Compare operations can be configured in three steps.

  1. Set the number of channels that are going to be used by either Capture or Compare Match operations. General Tab –> Capture/Compare Match Operations –> Number of channels to be configured.
  2. Set up the equivalent interrupts inside the interrupts tab. Interrupts –> Capture/Compare Match (channel) Priority.
  3. Set up channel(s) as a Capture or Compare-Match. Configuration for Compare Match operation:

Source Divider

Clock source divider is calculated automatically based on the period, source clock and period units set by the user, if the source divider property is set to "auto".

If a specific divider is required, the user can select it in Clock source divider property.

Maximum Period

The Configuration editor will automatically calculate the period value and source clock divider based on the selected period time, units and clock speed.

When the selected period unit is "Raw counts", the maximum period setting is 0x10000000000. This will configure the TIM_W with the maximum period and a count clock divisor.

Updating Period and Duty Cycle

The period and duty cycle are updated immediately after calling R_TIM_W_PeriodSet() or R_TIM_W_DutyCycleSet().

To configure the TIM_W for the maximum period, set Period from the General Tab to 0x10000000000.

One-Shot Mode

In One-shot mode, the TIM_W counts upwards only on period configured by the sum of Period and Delay. When One-shot has expired, TIM_W is ready to repeat the process.

To configure One-Shot:

To Configure One-Shot Trigger: One-Shot start can be triggered by: Software "R_TIM_W_Start()", GPIO Trigger, ELC Trigger. To configure One-Shot GPIO Triggers:

Note
When in One-shot mode, the TIM_W does not support any interrupts. To generate interrupt when One-shot expires, set Automatic Switch to Periodic mode and leave the Delay unconfigured. When the TIM_W interrupt triggers, R_TIM_W_Reset must be called inside Callback.

One-Shot Mode Output

The output waveform in one-shot mode consists of two parts expressed in raw counts. When One-shot is triggered the first part generated is a delay period configured by (General Tab –> One-Shot –> Delay). During the delay phase, the output waveform is forced low. In the second part, the shot is generated after the delay period expires. The shot period is configured by (General Tab –> Period).

Examples of one-shot signals that can be generated by this module are shown below:

Periodic Output

The output toggles twice each time the TIM_W expires in periodic mode. This is achieved by defining a PWM wave at a 50 percent duty cycle so that the period of the resulting square wave (from rising edge to rising edge) matches the period of the TIM_W timer.

To generate pwm signal the following field must be active

Examples of periodic signals that can be generated by this module are shown below:

PWM Output

The PWM signal can be configured by the Period and the Duty Cycle Percent options.

The PWM output signal is high at the beginning of the cycle and low at the end of the cycle.

To generate pwm signal the following field must be active

Examples of PWM signals that can be generated by this module are shown below:

Event Counting

Event counting can be done by selecting edge detect mode. The selection of sources can be GPIO pins and ELC events. In Edge detect mode, the TIM_W counter is not affected by TIM_W source clock.

To configure TIM_W to Count-Up:

Note
In edge detect mode, the application must call R_TIM_W_Start() to enable event counting. The counter will not change after calling R_TIM_W_Start(). Reading the counter in edge detect mode is not available. The timer_cfg_t::cycle_end_irq interrupt will triggered when the number events configured by timer_cfg_t::period_counts has occurred.

Pulse Measurement

Pulse measurement can be achieved by configuring at least two TIM_W Capture operation channels with the available sources (GPIO or ELC) and triggers (Rising and falling edges for GPIO sources only). The pulse width can then be calculated by subtracting the two measurements.

Controlling TIM_W with ELC Events

The TIM_W timer can be configured to stop, start, clear, count up, Capture, trigger oneshot, pause/resume or disable when an ELC event occurs.

To configure ELC Triggers:

Triggering ELC Events with TIM_W

Configure TIM_W to the desired mode to generate events for the ELC. When the TIM_W configuration is done, set up an ELC link over the Event Links tab.

Enabling External Sources

To use external events from ELC or GPIO, R_TIM_W_Enable() must be called first.

Examples

TIM_W Basic Example

This is a basic example of minimal use of the TIM_W in an application.

void tim_w_basic_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
g_timer0_cfg.p_extend = &g_ext_cfg_capture;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Start the timer. */
(void) R_TIM_W_Start(&g_timer0_ctrl);
}

TIM_W Callback Example

This is an example of a timer callback.

/* Example callback called when timer expires. */
void timer_callback (timer_callback_args_t * p_args)
{
if (TIMER_EVENT_CYCLE_END == p_args->event)
{
/* Add application code to be called periodically here. */
}
}

TIM_W Free Running Counter Example

To use the TIM_W as a free running counter, select periodic mode and set the free_run extended configuration to true.

Note
When the TIM_W counter is free running, the counter will generate an irq on Period match and will keep running until the maximum available counter value which is 0x10000000000
void tim_w_counter_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
g_timer0_cfg.p_callback = timer_callback;
g_ext_cfg_capture.free_run = 1U;
g_timer0_cfg.p_extend = &g_ext_cfg_capture;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Start the timer. */
(void) R_TIM_W_Start(&g_timer0_ctrl);
/* (Optional) Stop the timer. */
(void) R_TIM_W_Stop(&g_timer0_ctrl);
/* Read the current counter value. Counter value is in status.counter. */
(void) R_TIM_W_StatusGet(&g_timer0_ctrl, &status);
}

TIM_W Input Capture Example

This is an example of using the TIM_W to capture pulse width or pulse period measurements.

/* Example callback called when a capture occurs. */
uint64_t g_captured_time = 0U;
uint32_t g_capture_cycle_end_cnt = 0U;
uint32_t g_cycle_end_cnt = 0U;
void timer_capture_callback (timer_callback_args_t * p_args)
{
if (TIMER_EVENT_CAPTURE_A == p_args->event)
{
/* (Optional) Get the current period if not known. */
(void) R_TIM_W_InfoGet(&g_timer0_ctrl, &info);
uint32_t period = info.period_counts;
/* The maximum period is one more than the maximum 32-bit number, but will be reflected as 0 in
* timer_info_t::period_counts. */
if (0U == period)
{
period = TIM_W_COUNTER_MAX_VALUE + 1U;
}
g_captured_time = (period * g_capture_cycle_end_cnt) + p_args->capture;
g_capture_cycle_end_cnt = 0U;
}
if (TIMER_EVENT_CYCLE_END == p_args->event)
{
/* Add application code to be called periodically here. */
}
}
void tim_w_capture_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
g_timer0_cfg.p_extend = &g_ext_cfg_capture;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Enable captures. Captured values arrive in the interrupt. */
(void) R_TIM_W_Enable(&g_timer0_ctrl);
/* (Optional) Disable captures. */
(void) R_TIM_W_Disable(&g_timer0_ctrl);
}

TIM_W Period Update Example

This is an example of updating the period.

#define TIM_W_EXAMPLE_MSEC_PER_SEC (1000)
#define TIM_W_EXAMPLE_DESIRED_PERIOD_MSEC (20)
/* This example shows how to calculate a new period value at runtime. */
void tim_w_period_calculation_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Start the timer. */
(void) R_TIM_W_Start(&g_timer0_ctrl);
/* Get the source clock frequency (in Hz):
* - Use the R_TIM_W_InfoGet function (it accounts for the divider).
*/
(void) R_TIM_W_InfoGet(&g_timer0_ctrl, &info);
uint32_t timer_freq_hz = info.clock_frequency;
/* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
* desired period is larger than UINT32_MAX / pclkd_freq_hz. A cast to uint64_t is used to prevent this. */
uint32_t period_counts =
(uint32_t) (((uint64_t) timer_freq_hz * TIM_W_EXAMPLE_DESIRED_PERIOD_MSEC) / TIM_W_EXAMPLE_MSEC_PER_SEC);
/* Set the calculated period. */
err = R_TIM_W_PeriodSet(&g_timer0_ctrl, period_counts);
assert(FSP_SUCCESS == err);
}

TIM_W Duty Cycle Update Example

This is an example of updating the duty cycle.

#define TIM_W_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT (25)
#define TIM_W_EXAMPLE_MAX_PERCENT (100)
/* This example shows how to calculate a new duty cycle value at runtime. */
void tim_w_duty_cycle_calculation_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Start the timer. */
(void) R_TIM_W_Start(&g_timer0_ctrl);
/* Get the current period setting. */
(void) R_TIM_W_InfoGet(&g_timer0_ctrl, &info);
uint32_t current_period_counts = info.period_counts;
/* Calculate the desired duty cycle based on the current period. Note that if the period could be larger than
* UINT32_MAX / 100, this calculation could overflow. A cast to uint64_t is used to prevent this. The cast is
* not required for 16-bit or 24-bit timers. */
uint32_t duty_cycle_counts =
(uint32_t) (((uint64_t) current_period_counts * TIM_W_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT) /
TIM_W_EXAMPLE_MAX_PERCENT);
/* Set the calculated duty cycle. */
err = R_TIM_W_DutyCycleSet(&g_timer0_ctrl, duty_cycle_counts, 0);
assert(FSP_SUCCESS == err);
}

TIM_W Compare Match Set Example

This example demonstrates the configuration and use of compare match with TIM_W timer.

/* Example callback called when compare match occurs. */
void tim_w_compare_match_callback (timer_callback_args_t * p_args)
{
if (TIMER_EVENT_COMPARE_A == p_args->event)
{
/* Add application code to be called periodically here. */
}
}
#define TIM_W_COMPARE_MATCH_EXAMPLE_VALUE (0x2000U)
void tim_w_compare_match_set_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
g_timer0_cfg.p_extend = &g_ext_cfg_compare;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Set the compare match value (TIM_W_COMPARE_MATCH_EXAMPLE_VALUE). This value must be less than or equal to period value. */
err = R_TIM_W_CompareMatchSet(&g_timer0_ctrl, TIM_W_COMPARE_MATCH_EXAMPLE_VALUE, TIMER_COMPARE_MATCH_B);
assert(FSP_SUCCESS == err);
/* Start the timer. */
(void) R_TIM_W_Start(&g_timer0_ctrl);
/* (Optional) Stop the timer. */
(void) R_TIM_W_Stop(&g_timer0_ctrl);
}

TIM_W Sequential Capturing Example

This example demonstrates the sequential capturing and compare match configuration of 2 TIM_W channels, utilizing the ELC to trigger events between them.

static tim_w_extended_ccm_cfg g_timer_capture_seq_cfg =
{
#if BSP_FEATURE_TIM_W_SUPPORTS_SEQ_CAPTURES
.seq_captures = 2U,
#endif
.p_ccm_channel_cfg = &g_capture_channel_cfg[0]
};
static tim_w_extended_cfg_t g_ext_cfg_seq_cap_cfg =
{
.direction = TIMER_DIRECTION_UP,
.p_ccm_cfg = &g_timer_capture_seq_cfg,
};
/*
* See that capture_array is greater or equal than seq_captures
* regardless of the ccm_channel_size.
*/
static uint32_t capture_array[2U];
/* Example callback called when number of sequential captures occur. */
void timer_sequential_capture_callback (timer_callback_args_t * p_args)
{
{
/* Get captured values when the number of sequential capture triggers are met */
R_TIM_W_SequentialCapturesGet(&g_timer0_ctrl, &capture_array[0U]);
}
else if (TIMER_EVENT_CYCLE_END == p_args->event)
{
/* Add application code to be called periodically here. */
}
}
void tim_w_sequential_capture_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_periodic_cfg;
g_timer0_cfg.p_callback = timer_sequential_capture_callback;
g_timer0_cfg.p_extend = &g_ext_cfg_seq_cap_cfg;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Enable captures. */
(void) R_TIM_W_Enable(&g_timer0_ctrl);
(void) R_TIM_W_Start(&g_timer0_ctrl);
/* (Optional) Disable captures. */
(void) R_TIM_W_Disable(&g_timer0_ctrl);
}

TIM_W One-shot Trigger External Event Example

This example demonstrates the external triggering of One-shot from the ELC.

/* One-shot will be triggered by two sources: gpio and (iv available) elc */
static tim_w_extended_cfg_t g_ext_cfg_oneshot_cfg =
{
.direction = TIMER_DIRECTION_UP,
.gpio_source = TIMER_EXAMPLE_PORT_PIN1,
#if !BSP_FEATURE_ELC_MISSING
#endif
.oneshot_delay = 0U
};
static timer_cfg_t g_one_shot_cfg =
{
.channel = TIM_W_EXAMPLE_CHANNEL,
.period_counts = TIMER_EXAMPLE_PERIOD_COUNTS,
.source_div = TIMER_EXAMPLE_SOURCE_DIVIDER,
.p_extend = &g_ext_cfg_oneshot_cfg
};
void tim_w_oneshot_trigger_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_one_shot_cfg;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Enable all one-shot triggers. */
(void) R_TIM_W_Enable(&g_timer0_ctrl);
/* (Optional) Disable all one-shot triggers. */
(void) R_TIM_W_Disable(&g_timer0_ctrl);
}

TIM_W Count UP Using ELC Triggers

This example demonstrates the TIM_W configuration required to count up using the ELC as count source.

/* Edge detect counter will be triggered by two sources: gpio and (if available) elc */
static tim_w_extended_cfg_t g_ext_cfg_edge_det_cfg =
{
.direction = TIMER_DIRECTION_UP,
.gpio_source = TIMER_EXAMPLE_PORT_PIN1,
#if !BSP_FEATURE_ELC_MISSING
.elc_task = TIM_W_ELC_COUNT_UP,
#endif
};
static timer_cfg_t g_edge_det_cfg =
{
.channel = TIM_W_EXAMPLE_CHANNEL,
.period_counts = TIMER_EXAMPLE_PERIOD_COUNTS,
.source_div = TIMER_EXAMPLE_SOURCE_DIVIDER,
.p_extend = &g_ext_cfg_edge_det_cfg
};
/* Example callback called when number of edge_detect triggers have occurred. */
void timer_edge_det_callback (timer_callback_args_t * p_args)
{
if (TIMER_EVENT_CYCLE_END == p_args->event)
{
/* Add application code to be called periodically here. */
}
}
void tim_w_edge_detect_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_edge_det_cfg;
g_timer0_cfg.p_callback = timer_edge_det_callback;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Enable all edge_detect triggers. */
(void) R_TIM_W_Enable(&g_timer0_ctrl);
/* (Optional) Disable all edge_detect triggers. */
(void) R_TIM_W_Disable(&g_timer0_ctrl);
}

TIM_W Count UP Using ELC Triggers

This example demonstrates the TIM_W configuration required to count up using the ELC as count source.

/* Edge detect counter will be triggered by two sources: gpio and (if available) elc */
static tim_w_extended_cfg_t g_ext_cfg_edge_det_cfg =
{
.direction = TIMER_DIRECTION_UP,
.gpio_source = TIMER_EXAMPLE_PORT_PIN1,
#if !BSP_FEATURE_ELC_MISSING
.elc_task = TIM_W_ELC_COUNT_UP,
#endif
};
static timer_cfg_t g_edge_det_cfg =
{
.channel = TIM_W_EXAMPLE_CHANNEL,
.period_counts = TIMER_EXAMPLE_PERIOD_COUNTS,
.source_div = TIMER_EXAMPLE_SOURCE_DIVIDER,
.p_extend = &g_ext_cfg_edge_det_cfg
};
/* Example callback called when number of edge_detect triggers have occurred. */
void timer_edge_det_callback (timer_callback_args_t * p_args)
{
if (TIMER_EVENT_CYCLE_END == p_args->event)
{
/* Add application code to be called periodically here. */
}
}
void tim_w_edge_detect_example (void)
{
fsp_err_t err = FSP_SUCCESS;
g_timer0_cfg = g_edge_det_cfg;
g_timer0_cfg.p_callback = timer_edge_det_callback;
/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
/* Handle any errors. This function should be defined by the user. */
assert(FSP_SUCCESS == err);
#ifdef NDEBUG
(void) err;
#endif
/* Enable all edge_detect triggers. */
(void) R_TIM_W_Enable(&g_timer0_ctrl);
/* (Optional) Disable all edge_detect triggers. */
(void) R_TIM_W_Disable(&g_timer0_ctrl);
}

Data Structures

struct  tim_w_instance_ctrl_t
 
struct  tim_w_operation_channel_cfg
 
struct  tim_w_extended_ccm_cfg
 
struct  tim_w_extended_cfg_t
 

Enumerations

enum  tim_w_clock_t
 
enum  tim_w_gpio_trigger_t
 
enum  tim_w_elc_task_t
 

Data Structure Documentation

◆ tim_w_instance_ctrl_t

struct tim_w_instance_ctrl_t

Channel control block. DO NOT INITIALIZE. Initialization occurs when timer_api_t::open is called.

Data Fields

uint32_t open
 Whether or not channel is open.
 
const timer_cfg_tp_cfg
 Pointer to initial configurations.
 
TIMER_Type * p_reg
 Base register for this channel.
 
void(* p_callback )(timer_callback_args_t *)
 Pointer to callback.
 
timer_callback_args_tp_callback_memory
 Pointer to optional callback argument memory.
 
void * p_context
 Pointer to context to be passed into callback function.
 

◆ tim_w_operation_channel_cfg

struct tim_w_operation_channel_cfg

Configuration structure for non-periodic Capture/CompareMatch channels.

Data Fields
bsp_io_port_pin_t capture_source Configuration for GPIOs used as a source for capture operation.
tim_w_gpio_trigger_t capture_trigger
uint8_t ccm_operation_ipl
IRQn_Type ccm_operation_irq

◆ tim_w_extended_ccm_cfg

struct tim_w_extended_ccm_cfg

Extended Configuration for Capture/Compare-Match Operations.

Data Fields
bool single_capture_mode

When set, first capture value is persistant, next captures on the same register will not overwrite the first value.

uint8_t elc_channel Channel used for ELC Capture.
tim_w_operation_channel_cfg * p_ccm_channel_cfg Configuration Array of Operation Channels.
uint8_t ccm_channel_size Number of Operation Channels used for Capture or Compare-Match operations.

◆ tim_w_extended_cfg_t

struct tim_w_extended_cfg_t

TIM_W extension configures the output pins for TIM_W.

Data Fields
bool free_run Free-running mode (up-count only)
tim_w_clock_t count_source Clock source supplied to timer.
timer_direction_t direction Counter direction.
uint16_t pwm_sync_map Channels to be synchronously started with TIM on PWM mode.
tim_w_elc_task_t elc_task
bsp_io_port_pin_t gpio_source
tim_w_gpio_trigger_t gpio_trigger
bool oneshot_switch_to_periodic Enable auto mode switch from oneshot to periodic when oneshot elapses.
uint32_t oneshot_delay
tim_w_extended_ccm_cfg * p_ccm_cfg

Enumeration Type Documentation

◆ tim_w_clock_t

Offset to make the TIM_W HW channels 0-based for the r_tim_w driver. Count source clock

Enumerator
TIM_W_CLOCK_LP_CLK 

Select LP Clk to supply timer.

TIM_W_CLOCK_DIVN 

Select Divn_clk clk to supply timer.

◆ tim_w_gpio_trigger_t

Trigger edge for pulse period measurement mode and event counting mode.

Enumerator
TIM_W_GPIO_TRIGGER_DISABLED 

Disable external trigger events.

TIM_W_GPIO_TRIGGER_EDGE_RISING 

Measurement starts or events are counted on rising edge.

TIM_W_GPIO_TRIGGER_EDGE_FALLING 

Measurement starts or events are counted on falling edge.

◆ tim_w_elc_task_t

Tasks available for elc

Enumerator
TIM_W_ELC_DISABLED 

TIM_CLK_EN = 0.

TIM_W_ELC_START 

TIM_EN = 1.

TIM_W_ELC_STOP 

TIM_EN = 0.

TIM_W_ELC_COUNT_UP 

PULSE_CNT += 1, edge counter mode only.

TIM_W_ELC_CLEAR 

TIM_TIMER_VALUE = initial count up/down value.

TIM_W_ELC_ONESHOT_TRIGGER 

Trigger one-shot.

TIM_W_ELC_CAPTURE 

Trigger a capture operation.

TIM_W_ELC_PAUSE_RESUME 

Toggle TIM_PAUSE.

Function Documentation

◆ R_TIM_W_Open()

fsp_err_t R_TIM_W_Open ( timer_ctrl_t *const  p_ctrl,
timer_cfg_t const *const  p_cfg 
)

Initializes the timer module and applies configurations. Implements timer_api_t::open.

Note
TIM_W hardware does not support one-shot interrupt on cycle_end. When using one-shot mode, the timer will be switched to periodic in order to generate the cycle_end irq, then switch back to one-shot inside the ISR.

The TIM_W implementation of the general timer can accept a tim_w_extended_cfg_t extension parameter.

Example:

/* Initializes the module. */
err = R_TIM_W_Open(&g_timer0_ctrl, &g_timer0_cfg);
Return values
FSP_SUCCESSInitialization was successful and timer has started.
FSP_ERR_ASSERTIONA required input pointer is NULL or the source divider is invalid.
FSP_ERR_ALREADY_OPENModule is already open.
FSP_ERR_IRQ_BSP_DISABLEDtimer_cfg_t::p_callback is not NULL, but ISR is not enabled.
FSP_ERR_INVALID_MODEPWM mode cant be accessed without TIM_W_CFG_OUTPUT_SUPPORT_ENABLE == 1
FSP_ERR_INVALID_CHANNELPWM sync supports only TIM as master.
FSP_ERR_INVALID_ARGUMENTInvalid argument passed for one-shot mode, capture/compare as well as count down are not supported. Capture/compare channel size is out of limit. PWM period or duty cycle values are not within valid limits. PWM sync can not be set without the PWM mode active. CCM Channel configuration is empty while channel size is not zero. Elc_channel exceeds the CCM channel size.
FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel requested in the p_cfg parameter is not available on this device.

◆ R_TIM_W_Stop()

fsp_err_t R_TIM_W_Stop ( timer_ctrl_t *const  p_ctrl)

Stops timer. Implements timer_api_t::stop.

Note
In case the timer runs on low power clock, a max of 2 lp_clk sync cycles are required for the TIM_PAUSE bit to be effective.

Example:

/* (Optional) Stop the timer. */
(void) R_TIM_W_Stop(&g_timer0_ctrl);
Return values
FSP_SUCCESSTimer successfully stopped.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_Start()

fsp_err_t R_TIM_W_Start ( timer_ctrl_t *const  p_ctrl)

Starts timer. Implements timer_api_t::start.

Example:

/* Start the timer. */
(void) R_TIM_W_Start(&g_timer0_ctrl);
Return values
FSP_SUCCESSTimer successfully started.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_Reset()

fsp_err_t R_TIM_W_Reset ( timer_ctrl_t *const  p_ctrl)

Resets the counter to the initial value. Implements timer_api_t::reset.

Return values
FSP_SUCCESSCounter value written successfully.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_Enable()

fsp_err_t R_TIM_W_Enable ( timer_ctrl_t *const  p_ctrl)

Enables external event triggers that capture the counter and sets the elc task. Implements timer_api_t::enable.

Note
The timer could be running before R_TIM_W_Enable(). To ensure it is stopped, call R_TIM_W_Stop().

Example:

/* Enable captures. Captured values arrive in the interrupt. */
(void) R_TIM_W_Enable(&g_timer0_ctrl);
Return values
FSP_SUCCESSExternal events successfully enabled.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_Disable()

fsp_err_t R_TIM_W_Disable ( timer_ctrl_t *const  p_ctrl)

Disables external event triggers that start, stop, capture or compare. Implements timer_api_t::disable.

Note
The timer could be running after R_TIM_W_Disable(). To ensure it is stopped, call R_TIM_W_Stop().

Example:

/* (Optional) Disable captures. */
(void) R_TIM_W_Disable(&g_timer0_ctrl);
Return values
FSP_SUCCESSExternal events successfully disabled.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_PeriodSet()

fsp_err_t R_TIM_W_PeriodSet ( timer_ctrl_t *const  p_ctrl,
uint32_t const  period_counts 
)

Sets period value provided.

Implements timer_api_t::periodSet.

Warning
Period will be updated immediately regardless of the timer's state.

Example:

/* Get the source clock frequency (in Hz):
* - Use the R_TIM_W_InfoGet function (it accounts for the divider).
*/
(void) R_TIM_W_InfoGet(&g_timer0_ctrl, &info);
uint32_t timer_freq_hz = info.clock_frequency;
/* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
* desired period is larger than UINT32_MAX / pclkd_freq_hz. A cast to uint64_t is used to prevent this. */
uint32_t period_counts =
(uint32_t) (((uint64_t) timer_freq_hz * TIM_W_EXAMPLE_DESIRED_PERIOD_MSEC) / TIM_W_EXAMPLE_MSEC_PER_SEC);
/* Set the calculated period. */
err = R_TIM_W_PeriodSet(&g_timer0_ctrl, period_counts);
assert(FSP_SUCCESS == err);
Return values
FSP_SUCCESSPeriod value written successfully.
FSP_ERR_ASSERTIONp_ctrl was NULL, or selected value exceeds HW specifications.
FSP_ERR_NOT_OPENThe instance is not opened.
FSP_ERR_INVALID_ARGUMENTSelected value exceeds the maximum register value.

◆ R_TIM_W_PeriodSet_light()

fsp_err_t R_TIM_W_PeriodSet_light ( timer_ctrl_t *const  p_ctrl,
uint32_t const  period_counts 
)

Sets period value provided.

Implements timer_api_t::periodSet.

Warning
Light version of periodSet, the new period will be applied without any checks.
Return values
FSP_SUCCESSPeriod value written successfully.

◆ R_TIM_W_DutyCycleSet()

fsp_err_t R_TIM_W_DutyCycleSet ( timer_ctrl_t *const  p_ctrl,
uint32_t const  duty_cycle_counts,
uint32_t const  pin 
)

Sets duty cycle. Implements timer_api_t::dutyCycleSet.

Warning
Duty cycle will be updated immediately regardless of the timer's state.

Example:

/* Get the current period setting. */
(void) R_TIM_W_InfoGet(&g_timer0_ctrl, &info);
uint32_t current_period_counts = info.period_counts;
/* Calculate the desired duty cycle based on the current period. Note that if the period could be larger than
* UINT32_MAX / 100, this calculation could overflow. A cast to uint64_t is used to prevent this. The cast is
* not required for 16-bit or 24-bit timers. */
uint32_t duty_cycle_counts =
(uint32_t) (((uint64_t) current_period_counts * TIM_W_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT) /
TIM_W_EXAMPLE_MAX_PERCENT);
/* Set the calculated duty cycle. */
err = R_TIM_W_DutyCycleSet(&g_timer0_ctrl, duty_cycle_counts, 0);
assert(FSP_SUCCESS == err);
Parameters
[in]p_ctrlPointer to instance control block.
[in]duty_cycle_countsDuty cycle to set in counts.
[in]pinUse tim_w_io_pin_t to select TIM_W_IO_PIN_GTIOCA or TIM_W_IO_PIN_GTIOCB
Return values
FSP_SUCCESSDuty cycle updated successfully.
FSP_ERR_ASSERTIONp_ctrl was NULL or the pin is not one of tim_w_io_pin_t
FSP_ERR_NOT_OPENThe instance is not opened.
FSP_ERR_INVALID_ARGUMENTDuty cycle is larger than period.
FSP_ERR_INVALID_MODEDuty cycle can only be configured in PWM mode.
FSP_ERR_UNSUPPORTEDTIM_W_CFG_OUTPUT_SUPPORT_ENABLE is 0.

◆ R_TIM_W_CompareMatchSet()

fsp_err_t R_TIM_W_CompareMatchSet ( timer_ctrl_t *const  p_ctrl,
uint32_t const  compare_match_value,
timer_compare_match_t const  match_channel 
)

Set value for compare match feature. Implements timer_api_t::compareMatchSet.

Note
This API should be used when timer has stop counting and shall not be used along with PWM operation.

Example:

/* Set the compare match value (TIM_W_COMPARE_MATCH_EXAMPLE_VALUE). This value must be less than or equal to period value. */
err = R_TIM_W_CompareMatchSet(&g_timer0_ctrl, TIM_W_COMPARE_MATCH_EXAMPLE_VALUE, TIMER_COMPARE_MATCH_B);
assert(FSP_SUCCESS == err);
Return values
FSP_SUCCESSSet the compare match value successfully.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.
FSP_ERR_NOT_ENABLEDRequested compare channel is disabled. CCM channel configuration is NULL.
FSP_ERR_INVALID_MODECompare match operation is only available on periodic mode.

◆ R_TIM_W_SequentialCapturesGet()

fsp_err_t R_TIM_W_SequentialCapturesGet ( timer_ctrl_t *const  p_ctrl,
uint32_t *const  p_captures 
)

Get captured values for all configured capturing channels when sequential capturing is enabled.

Example:

/* Get captured values when the number of sequential capture triggers are met */
R_TIM_W_SequentialCapturesGet(&g_timer0_ctrl, &capture_array[0U]);
Parameters
[in]p_ctrlPointer to instance control block.
[in]p_capturesPointer to the captured snapshot values.
Note
p_captures length must be greater or equal than the number of sequential captures.
Return values
FSP_SUCCESSCaptured values stored successfully.
FSP_ERR_ASSERTIONp_ctrl or p_captures was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.
FSP_ERR_INVALID_MODECapture operation is only available on periodic mode.

◆ R_TIM_W_InfoGet()

fsp_err_t R_TIM_W_InfoGet ( timer_ctrl_t *const  p_ctrl,
timer_info_t *const  p_info 
)

Get timer information and store it in provided pointer p_info. Implements timer_api_t::infoGet.

Example:

/* (Optional) Get the current period if not known. */
(void) R_TIM_W_InfoGet(&g_timer0_ctrl, &info);
uint32_t period = info.period_counts;
/* The maximum period is one more than the maximum 32-bit number, but will be reflected as 0 in
* timer_info_t::period_counts. */
if (0U == period)
{
period = TIM_W_COUNTER_MAX_VALUE + 1U;
}
Return values
FSP_SUCCESSPeriod, count direction, frequency, and ELC event written to caller's structure successfully.
FSP_ERR_ASSERTIONp_ctrl or p_info was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_StatusGet()

fsp_err_t R_TIM_W_StatusGet ( timer_ctrl_t *const  p_ctrl,
timer_status_t *const  p_status 
)

Get current timer status and store it in provided pointer p_status. Implements timer_api_t::statusGet.

Example:

/* Read the current counter value. Counter value is in status.counter. */
(void) R_TIM_W_StatusGet(&g_timer0_ctrl, &status);
Return values
FSP_SUCCESSCurrent timer state and counter value set successfully.
FSP_ERR_ASSERTIONp_ctrl or p_status was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.

◆ R_TIM_W_CallbackSet()

fsp_err_t R_TIM_W_CallbackSet ( timer_ctrl_t *const  p_api_ctrl,
void(*)(timer_callback_args_t *)  p_callback,
void *const  p_context,
timer_callback_args_t *const  p_callback_memory 
)

Updates the user callback with the option to provide memory for the callback argument structure. Implements timer_api_t::callbackSet.

Return values
FSP_SUCCESSCallback updated successfully.
FSP_ERR_ASSERTIONA required pointer is NULL.
FSP_ERR_NOT_OPENThe control block has not been opened.
FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.

◆ R_TIM_W_Close()

fsp_err_t R_TIM_W_Close ( timer_ctrl_t *const  p_ctrl)

Stops counter, disables output pins, and clears internal driver data. Implements timer_api_t::close.

Note
In case the timer runs on low power clock, a max of 2 lp_clk sync cycles are required for the TIM_EN bit to be effective.
Return values
FSP_SUCCESSSuccessful close.
FSP_ERR_ASSERTIONp_ctrl was NULL.
FSP_ERR_NOT_OPENThe instance is not opened.