Functions
void	pll_off (void)
	Disable PLL.

Detailed Description

Platform definitions.

Files
file	sdk_defs.h
	Central include header file with platform definitions.

Macros
#define	MEMORY_REMAPPED_BASE
	Remapped device base address.

#define	MEMORY_REMAPPED_SIZE
	Remapped device memory size.

#define	MEMORY_ROM_BASE
	ROM base address.

#define	MEMORY_ROM_SIZE
	ROM memory size.

#define	MEMORY_OTP_BASE
	OTP memory base address.

#define	MEMORY_OTP_SIZE
	OTP memory size.

#define	MEMORY_SYSRAM_BASE
	SYSTEM RAM base address.

#define	MEMORY_SYSRAM_SIZE
	SYSTEM RAM size.

#define	MEMORY_CACHERAM_BASE
	CACHE RAM base address.

#define	MEMORY_CACHERAM_SIZE
	CACHE RAM size.

#define	MEMORY_OQSPIC_BASE
	QSPI Flash base address.

#define	MEMORY_QSPIF_SIZE
	QSPI Flash memory size.

#define	FLASH_SECTOR_SIZE
	The Sector Size of the OQSPI and QSPI flash memories.

#define	OQSPI_MEM1_VIRTUAL_BASE_ADDR
	The base address for accessing the Flash memory connected to OQSPI. More...

#define	IS_OQSPI_MEM1_VIRTUAL_ADDRESS(_a)
	Address is in OQSPI_MEM1 virtual memory region.

#define	QSPI_MEM1_VIRTUAL_BASE_ADDR
	The base address for accessing the Flash memory connected to QSPIC. More...

#define	WITHIN_RANGE(_a, _s, _e)
	OTP User Data Encryption Keys memory base address.

#define	IS_REMAPPED_ADDRESS(_a)
	Address is in the remapped memory region.

#define	IS_ROM_ADDRESS(_a)
	Address is in the ROM region.

#define	IS_SYSRAM_ADDRESS(_a)
	Address is in the SYSTEM RAM region.

#define	IS_CACHERAM_ADDRESS(_a)
	Address is in the CACHE RAM region.

#define	IS_QSPIF_ADDRESS(_a)
	Address is in the QSPI Flash memory region.

#define	IS_QSPIF_S_ADDRESS(_a)
	Address is in the QSPI AHB-S(ystem) memory region.

#define	IS_OQSPIC_ADDRESS(_a)
	Address is in the OQSPI Flash memory region.

#define	IS_OQSPIC_S_ADDRESS(_a)
	Address is in the OQSPI AHB-S(ystem) memory region.

#define	__RETAINED
	Zero-initialized data retained memory attribute.

#define	__RETAINED_RW
	Initialized data retained memory attribute.

#define	__RETAINED_UNINIT
	Uninitialized data retained memory attribute. Used for variables that should not be initialized during startup.

#define	__RETAINED_CONST_INIT
	Constant data retained memory attribute.

#define	__RETAINED_CODE
	Text retained memory attribute.

#define	__UNUSED
	Attribute to silence warnings about unused parameters/variables/function.

#define	__LTO_EXT
	Attribute to tell the compiler to consider a symbol as externally visible (for LTO)

#define	ASSERT_WARNING(a)
	Assert as warning macro. More...

#define	ASSERT_ERROR(a)
	Assert as error macro.

#define	ASSERT_WARNING_UNINIT(a)
	Assert as warning macro when the system is still uninitialized. More...

#define	ASSERT_ERROR_UNINIT(a)
	Assert as error macro when the system is still uninitialized. More...

#define	GLOBAL_INT_DISABLE()
	Macro to disable all interrupts. More...

#define	GLOBAL_INT_RESTORE()
	Macro to restore all interrupts. More...

#define	MIN(a, b)
	Macro the minimum of two values. More...

#define	MAX(a, b)
	Macro the maximum of two values. More...

#define	SWAP16(a)
	Macro to swap the bytes of a 16-bit variable. More...

#define	SWAP32(a)
	Macro to swap the bytes of a 32-bit variable. More...

#define	OPT_MEMCPY
	Optimized memcpy.

#define	OPT_MEMMOVE
	Optimized memmove.

#define	OPT_MEMSET(s, c, n)
	Optimized memset.

#define	REG_MSK(base, reg, field)
	Access register field mask. More...

#define	REG_POS(base, reg, field)
	Access register field position. More...

#define	REG_GET_FIELD(base, reg, field, var)
	Access register field value. More...

#define	REG_SET_FIELD(base, reg, field, var, val)
	Set register field value. More...

#define	RAW_SET_FIELD(mem, mask, val)
	Set memory field value. More...

#define	REG_CLR_FIELD(base, reg, field, var)
	Clear register field value. More...

#define	REG_GET_ADDR_INDEXED(base, reg, interval, index)
	Get the address of a register value by index (provided a register interval) More...

#define	REG_GETF_INDEXED(base, reg, field, interval, index)
	Return the value of a register field by index (provided a register interval). More...

#define	REG_GETF(base, reg, field)
	Return the value of a register field. More...

#define	RAW_GETF(addr, mask)
	Return the value of a memory field using a mask. More...

#define	REG_SETF(base, reg, field, new_val)
	Set the value of a register field. More...

#define	RAW_SETF(addr, mask, val)
	Set the value of a memory field. More...

#define	REG_SET_BIT(base, reg, field)
	Set a bit of a register. More...

#define	REG_CLR_BIT(base, reg, field)
	Clear a bit of a register. More...

#define	REG_SET_MASKED(base, reg, mask, value)
	Sets register bits, indicated by the mask, to a value. More...

#define	RAW_SET_MASKED(addr, mask, value)
	Sets memory bits, indicated by the mask, to a value. More...

#define	BITS16(base, reg, field, v)
	Sets 16-bit wide register bits, indicated by the field, to a value v.

#define	BITS32(base, reg, field, v)
	Sets 32-bit wide register bits, indicated by the field, to a value v.

#define	GETBITS16(base, reg, v, field)
	Reads 16-bit wide register bits, indicated by the field, to a variable v.

#define	GETBITS32(base, reg, v, field)
	Reads 32-bit wide register bits, indicated by the field, to a variable v.

#define	ENABLE_DEBUGGER
	Macro to enable the debugger.

#define	DISABLE_DEBUGGER
	Macro to disable the debugger.

#define	SWRESET
	Macro to cause a software reset.

#define	PORRESET
	Macro to cause a POR reset. it reset the DCORE.

Macro Definition Documentation

◆ OQSPI_MEM1_VIRTUAL_BASE_ADDR

#define OQSPI_MEM1_VIRTUAL_BASE_ADDR

The base address for accessing the Flash memory connected to OQSPI.

The base address is used in oqspi_automode. Automode is using a single zero-based address region for accessing the Flash devices connected to OQSPI and QSPI controllers (OQSPIC and QSPIC). The defined address sub-regions are: Address region 1: starting at OQSPI_MEM1_VIRTUAL_BASE_ADDR When Flash address is in region 1 then the device connected to OQSPIC is accessed. The maximum region size handled by each QSPI controller in automode is 128MBytes. The default value of each region size is 0x8000000, allowing 128MBytes region for each controller.

◆ QSPI_MEM1_VIRTUAL_BASE_ADDR

#define QSPI_MEM1_VIRTUAL_BASE_ADDR

The base address for accessing the Flash memory connected to QSPIC.

The base address is used in qspi_automode.

◆ ASSERT_WARNING

#define ASSERT_WARNING ( a )

Assert as warning macro.

Note: Active only while in development mode

◆ ASSERT_WARNING_UNINIT

#define ASSERT_WARNING_UNINIT ( a )

Assert as warning macro when the system is still uninitialized.

Note: Active only while in development mode. The SW cursor is not activated.

◆ ASSERT_ERROR_UNINIT

#define ASSERT_ERROR_UNINIT ( a )

Assert as error macro when the system is still uninitialized.

Note: The SW cursor is not activated.

◆ GLOBAL_INT_DISABLE

#define GLOBAL_INT_DISABLE ( )

Macro to disable all interrupts.

This macro must always be used with GLOBAL_INT_RESTORE(). E.g.

GLOBAL_INT_DISABLE();
 ... code to be executed with interrupts disabled ...
GLOBAL_INT_RESTORE();

See also: GLOBAL_INT_RESTORE

◆ GLOBAL_INT_RESTORE

#define GLOBAL_INT_RESTORE ( )

Macro to restore all interrupts.

This macro must always be used after GLOBAL_INT_DISABLE(). E.g.

GLOBAL_INT_DISABLE();
 ... code to be executed with interrupts disabled ...
GLOBAL_INT_RESTORE();

See also: GLOBAL_INT_DISABLE

◆ MIN

#define MIN	(	a,
		b
	)

Macro the minimum of two values.

Parameters

[in]	a	First value
[in]	b	Second value

◆ MAX

#define MAX	(	a,
		b
	)

Macro the maximum of two values.

Parameters

[in]	a	First value
[in]	b	Second value

◆ SWAP16

#define SWAP16 ( a )

Macro to swap the bytes of a 16-bit variable.

Parameters

[in] a The 16-bit variable

◆ SWAP32

#define SWAP32 ( a )

Macro to swap the bytes of a 32-bit variable.

Parameters

[in] a The 32-bit variable

◆ REG_MSK

#define REG_MSK	(	base,
		reg,
		field
	)

Access register field mask.

Returns a register field mask (aimed to be used with local variables). e.g.

uint16_t tmp;
tmp = CRG_TOP->SYS_STAT_REG;
if (tmp & REG_MSK(CRG_TOP, SYS_STAT_REG, XTAL16_TRIM_READY)) {
...

◆ REG_POS

#define REG_POS	(	base,
		reg,
		field
	)

Access register field position.

Returns a register field position (aimed to be used with local variables).

◆ REG_GET_FIELD

#define REG_GET_FIELD	(	base,
		reg,
		field,
		var
	)

Access register field value.

Returns a register field value (aimed to be used with local variables). e.g.

uint16_t tmp;
int counter;
tmp = CRG_TOP->TRIM_CTRL_REG;
counter = REG_GET_FIELD(CRG_TOP, TRIM_CTRL_REG, XTAL_COUNT_N, tmp);
...

◆ REG_SET_FIELD

#define REG_SET_FIELD	(	base,
		reg,
		field,
		var,
		val
	)

Set register field value.

Sets a register field value (aimed to be used with local variables). e.g.

uint16_t tmp;
tmp = CRG_TOP->TRIM_CTRL_REG;
REG_SET_FIELD(CRG_TOP, TRIM_CTRL_REG, XTAL_COUNT_N, tmp, 10);
REG_SET_FIELD(CRG_TOP, TRIM_CTRL_REG, XTAL_TRIM_SELECT, tmp, 2);
CRG_TOP->TRIM_CTRL_REG = tmp;
...

◆ RAW_SET_FIELD

#define RAW_SET_FIELD	(	mem,
		mask,
		val
	)

Set memory field value.

Sets a memory field value using a mask (aimed to be used with local variables). e.g.

uint32_t tmp = *(volatile uint32_t *)0x50000000;
RAW_SET_FIELD(tmp, 0x1UL, 1);
...

◆ REG_CLR_FIELD

#define REG_CLR_FIELD	(	base,
		reg,
		field,
		var
	)

Clear register field value.

Clears a register field value (aimed to be used with local variables). e.g.

uint16_t tmp;
tmp = CRG_TOP->TRIM_CTRL_REG;
REG_CLR_FIELD(CRG_TOP, TRIM_CTRL_REG, XTAL_COUNT_N, tmp);
REG_CLR_FIELD(CRG_TOP, TRIM_CTRL_REG, XTAL_TRIM_SELECT, tmp);
CRG_TOP->TRIM_CTRL_REG = tmp;
...

◆ REG_GET_ADDR_INDEXED

#define REG_GET_ADDR_INDEXED	(	base,
		reg,
		interval,
		index
	)

Get the address of a register value by index (provided a register interval)

Note: The register interval should be an exact multiple of the register's base size. For example, if the register size is 32-bit, then the interval should be 0x4, 0x8, etc. Otherwise, the result will be undefined. The interval value must be in bytes. The index value (0,1,2...) is multiplied by the interval value (in bytes) to find the actual offset of the register.

Returns a register address value by index

◆ REG_GETF_INDEXED

#define REG_GETF_INDEXED	(	base,
		reg,
		field,
		interval,
		index
	)

Return the value of a register field by index (provided a register interval).

e.g.

uint16_t val;
uint16_t index = 2
val = REG_GETF_INDEXED(FTDF, FTDF_LONG_ADDR_0_0_REG, REG_EXP_SA_L, 0x10, index)
...

Note: The register interval should be an exact multiple of the register's base size. For example, if the register size is 32-bit, then the interval should be 0x4, 0x8, etc. Otherwise, the result will be undefined. The interval value must be in bytes. The index value (0,1,2...) is multiplied by the interval value (in bytes) to find the actual offset of the register.

◆ REG_GETF

#define REG_GETF	(	base,
		reg,
		field
	)

Return the value of a register field.

e.g.

uint32_t val;
val = REG_GETF(CRG_TOP, TRIM_CTRL_REG, XTAL_COUNT_N);
...

◆ RAW_GETF

#define RAW_GETF	(	addr,
		mask
	)

Return the value of a memory field using a mask.

e.g.

uint32_t val;
val = RAW_GETF(0x50000000, 0x1UL);
...

◆ REG_SETF

#define REG_SETF	(	base,
		reg,
		field,
		new_val
	)

Set the value of a register field.

e.g.

REG_SETF(CRG_TOP, TRIM_CTRL_REG, XTAL_COUNT_N, new_value);

...

◆ RAW_SETF

#define RAW_SETF	(	addr,
		mask,
		val
	)

Set the value of a memory field.

e.g.

RAW_SETF(0x50000000, 0x1UL, 1);

...

◆ REG_SET_BIT

#define REG_SET_BIT	(	base,
		reg,
		field
	)

Set a bit of a register.

e.g.

REG_SET_BIT(CRG_TOP, CLK_TMR_REG, TMR1_ENABLE);

...

◆ REG_CLR_BIT

#define REG_CLR_BIT	(	base,
		reg,
		field
	)

Clear a bit of a register.

e.g.

REG_CLR_BIT(CRG_TOP, CLK_TMR_REG, TMR1_ENABLE);

...

◆ REG_SET_MASKED

#define REG_SET_MASKED	(	base,
		reg,
		mask,
		value
	)

Sets register bits, indicated by the mask, to a value.

e.g.

REG_SET_MASKED(RFCU_POWER, RF_CNTRL_TIMER_5_REG, 0xFF00, 0x1818);

◆ RAW_SET_MASKED

#define RAW_SET_MASKED	(	addr,
		mask,
		value
	)

Sets memory bits, indicated by the mask, to a value.

e.g.

RAW_SET_MASKED(0x50000000, 0xFF00, 0x1818);

Functions

Detailed Description

Files

Macros

Macro Definition Documentation

◆ OQSPI_MEM1_VIRTUAL_BASE_ADDR

◆ QSPI_MEM1_VIRTUAL_BASE_ADDR

◆ ASSERT_WARNING

◆ ASSERT_WARNING_UNINIT

◆ ASSERT_ERROR_UNINIT

◆ GLOBAL_INT_DISABLE

◆ GLOBAL_INT_RESTORE

◆ MIN

◆ MAX

◆ SWAP16

◆ SWAP32

◆ REG_MSK

◆ REG_POS

◆ REG_GET_FIELD

◆ REG_SET_FIELD

◆ RAW_SET_FIELD

◆ REG_CLR_FIELD

◆ REG_GET_ADDR_INDEXED

◆ REG_GETF_INDEXED

◆ REG_GETF

◆ RAW_GETF

◆ REG_SETF

◆ RAW_SETF

◆ REG_SET_BIT

◆ REG_CLR_BIT

◆ REG_SET_MASKED

◆ RAW_SET_MASKED