Cache configuration settings

Detailed Description

Cache configuration settings.

Macros
#define	dg_configCACHEABLE_QSPI_AREA_LEN
	Set the size (in bytes) of the QSPI flash cacheable area. More...
#define	dg_configCACHE_ASSOCIATIVITY
	Set the associativity of the cache. More...
#define	dg_configCACHE_LINESZ
	Set the line size of the cache. More...

Macro Definition Documentation

dg_configCACHEABLE_QSPI_AREA_LEN

#define dg_configCACHEABLE_QSPI_AREA_LEN

Set the size (in bytes) of the QSPI flash cacheable area.

All reads from offset 0 up to (not including) offset dg_configCACHEABLE_QSPI_AREA_LEN will be cached. In addition, any writes to this area will trigger cache flushing, to avoid any cache incoherence.

The size must be 64KB-aligned, due to the granularity of CACHE_CTRL2_REG[CACHE_LEN].

Special values:

• 0 : Turn off cache.
• -1 : Don't configure cacheable area size (i.e. leave as set by booter).

dg_configCACHE_ASSOCIATIVITY

#define dg_configCACHE_ASSOCIATIVITY

Set the associativity of the cache.

Available values: 0 /// direct-mapped 1 /// 2-way set associative 2 /// 4-way set associative 3 /// leave as set by the ROM booter

dg_configCACHE_LINESZ

#define dg_configCACHE_LINESZ

Set the line size of the cache.

Available values: 0 /// 8 bytes 1 /// 16 bytes 2 /// 32 byte 3 /// leave as set by the ROM booter