hw_sdadc.h

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#ifndef HW_SDADC_H
#define HW_SDADC_H
 
 
#if dg_configUSE_HW_SDADC
 
#include <stdbool.h>
#include <stdint.h>
#include "sdk_defs.h"
 
#define HW_SDADC_DMA_SUPPORT                    dg_configSDADC_DMA_SUPPORT
 
/*=============================================================================================*/
/* Macro, type and data-structure definitions                                                  */
/*=============================================================================================*/
 
#if HW_SDADC_DMA_SUPPORT
#include "hw_dma.h"
 
typedef struct {
        HW_DMA_CHANNEL       channel;                   
        HW_DMA_PRIO          prio;                      
        bool                 circular;                  
        uint16               irq_nr_of_trans;           
} hw_sdadc_dma_cfg_t;
#endif
 
typedef void (*hw_sdadc_read_cb)(void *user_data, uint32_t conv_to_go);
 
typedef enum {
        HW_SDADC_INPUT_MODE_DIFFERENTIAL = 0,           
        HW_SDADC_INPUT_MODE_SINGLE_ENDED = 1            
} HW_SDADC_INPUT_MODE;
 
typedef enum {
        HW_SDADC_VREF_INTERNAL = 0,                     
        HW_SDADC_VREFN_INTERNAL_VREFP_EXTERNAL = 1,     
        HW_SDADC_VREFN_EXTERNAL_VREFP_INTERNAL = 2,     
        HW_SDADC_VREF_EXTERNAL = 3,                     
} HW_SDADC_VREF_SEL;
 
#define HW_SDADC_VREF_VOLTAGE_INTERNAL          ( 900 ) 
#define HW_SDADC_VREF_VOLTAGE_MAX               HW_SDADC_VREF_VOLTAGE_INTERNAL
 
#define HW_SDADC_VREF_IN_RANGE(voltage)    ((uint16_t)voltage <= HW_SDADC_VREF_VOLTAGE_MAX)
 
typedef enum {
        HW_SDADC_IN_ADC0_P1_00 = 0,                     
        HW_SDADC_IN_ADC1_P1_01 = 1,                     
        HW_SDADC_IN_ADC2_P1_02 = 2,                     
        HW_SDADC_IN_ADC3_P0_10 = 3,                     
        HW_SDADC_IN_ADC4_P1_05 = 4,                     
        HW_SDADC_IN_ADC5_P1_06 = 5,                     
        HW_SDADC_IN_ADC6_P1_09 = 6,                     
        HW_SDADC_IN_ADC7_P1_11 = 7,                     
        HW_SDADC_IN_VBAT = 8,                           
} HW_SDADC_INPUT_CHANNEL;
 
typedef enum {
        HW_SDADC_MODE_SENSOR = 0,                       
        HW_SDADC_MODE_AUDIO  = 1                        
} HW_SDADC_MODE;
 
typedef enum {
        HW_SDADC_IN_ADC0 = HW_SDADC_IN_ADC0_P1_00,
        HW_SDADC_IN_ADC1 = HW_SDADC_IN_ADC1_P1_01,
        HW_SDADC_IN_ADC2 = HW_SDADC_IN_ADC2_P1_02,
        HW_SDADC_IN_ADC3 = HW_SDADC_IN_ADC3_P0_10,
        HW_SDADC_IN_ADC4 = HW_SDADC_IN_ADC4_P1_05,
        HW_SDADC_IN_ADC5 = HW_SDADC_IN_ADC5_P1_06,
        HW_SDADC_IN_ADC6 = HW_SDADC_IN_ADC6_P1_09,
        HW_SDADC_IN_ADC7 = HW_SDADC_IN_ADC7_P1_11,
        HW_SDADC_INP_VBAT = HW_SDADC_IN_VBAT,
} HW_SDADC_INPUT;
 
typedef enum {
        HW_SDADC_OSR_256,                               
        HW_SDADC_OSR_512,                               
        HW_SDADC_OSR_1024,                              
        HW_SDADC_OSR_2048,                              
} HW_SDADC_OSR;
 
 
typedef enum {
        HW_SDADC_PGA_GAIN_MINUS_12dB = 0,               
        HW_SDADC_PGA_GAIN_MINUS_6dB = 1,                
        HW_SDADC_PGA_GAIN_MINUS_0dB = 2,                
        HW_SDADC_PGA_GAIN_6dB = 3,                      
        HW_SDADC_PGA_GAIN_12dB = 4,                     
        HW_SDADC_PGA_GAIN_18dB = 5,                     
        HW_SDADC_PGA_GAIN_24dB = 6,                     
        HW_SDADC_PGA_GAIN_30dB = 7,                     
} HW_SDADC_PGA_GAIN;
 
typedef enum {
        HW_SDADC_PGA_MODE_DIFF = 0,                     
        HW_SDADC_PGA_MODE_SE_N = 1,                     
        HW_SDADC_PGA_MODE_SE_P = 2,                     
        HW_SDADC_PGA_MODE_RESERVED = 3,                 
} HW_SDADC_PGA_MODE;
 
 
typedef enum {
        HW_SDADC_PGA_BIAS_40 = 0,                       
        HW_SDADC_PGA_BIAS_44 = 1,                       
        HW_SDADC_PGA_BIAS_50 = 2,                       
        HW_SDADC_PGA_BIAS_57 = 3,                       
        HW_SDADC_PGA_BIAS_66 = 4,                       
        HW_SDADC_PGA_BIAS_80 = 5,                       
        HW_SDADC_PGA_BIAS_100 = 6,                      
        HW_SDADC_PGA_BIAS_133 = 7,                      
} HW_SDADC_PGA_BIAS;
 
typedef enum {
        HW_SDADC_PGA_ENABLE_NONE = 0,                   
        HW_SDADC_PGA_ENABLE_POSITIVE = 1,               
        HW_SDADC_PGA_ENABLE_NEGATIVE = 2,               
        HW_SDADC_PGA_ENABLE_BOTH = 3,                   
} HW_SDADC_PGA_EN;
 
typedef struct {
        HW_SDADC_PGA_GAIN      pga_gain;                
        HW_SDADC_PGA_MODE      pga_mode;                
        HW_SDADC_PGA_BIAS      pga_bias;                
        HW_SDADC_PGA_EN        pga_en;                  
} hw_sdadc_pga_config_t;
 
 
typedef void (*hw_sdadc_interrupt_cb)(void);
 
typedef struct {
        HW_SDADC_INPUT_MODE    input_mode;              
        HW_SDADC_INPUT         inn;                     
        HW_SDADC_INPUT         inp;                     
        bool                   continuous;              
        HW_SDADC_OSR           over_sampling;           
        HW_SDADC_VREF_SEL      vref_selection;          
        uint16_t               vref_voltage;            
#if HW_SDADC_DMA_SUPPORT
        hw_sdadc_dma_cfg_t     *dma_setup;              
#endif
        hw_sdadc_pga_config_t  *pga_setup;
} hw_sdadc_config_t;
 
/*
 * Necessary forward declaration
 */
__STATIC_INLINE bool hw_sdadc_in_progress(void);
 
/*=============================================================================================*/
/* Configuring the SDADC                                                                       */
/*=============================================================================================*/
 
__STATIC_INLINE void hw_sdadc_enable_interrupt(void)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_MINT, 1);
}
 
__STATIC_INLINE void hw_sdadc_disable_interrupt(void)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_MINT, 0);
}
 
__STATIC_INLINE bool hw_sdadc_is_interrupt_enabled(void)
{
        return (!!(REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_MINT)));
}
 
__STATIC_INLINE void hw_sdadc_set_continuous(bool enabled)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_CONT, (uint32_t) !!enabled);
}
 
__STATIC_INLINE bool hw_sdadc_get_continuous(void)
{
        return (!!(REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_CONT)));
}
 
__STATIC_INLINE void hw_sdadc_set_dma_functionality(bool enabled)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_DMA_EN, !!enabled);
}
 
__STATIC_INLINE bool hw_sdadc_get_dma_functionality(void)
{
        return (bool) REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_DMA_EN);
}
 
void hw_sdadc_set_input_mode(HW_SDADC_INPUT_MODE mode);
 
__STATIC_INLINE HW_SDADC_INPUT_MODE hw_sdadc_get_input_mode(void)
{
        return (HW_SDADC_INPUT_MODE) REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_SE);
}
 
__STATIC_FORCEINLINE void hw_sdadc_set_oversampling(HW_SDADC_OSR osr)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_OSR, osr);
}
__STATIC_INLINE HW_SDADC_OSR hw_sdadc_get_oversampling(void)
{
        return (HW_SDADC_OSR) REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_OSR);
}
 
__STATIC_INLINE void hw_sdadc_set_vref_sel(HW_SDADC_VREF_SEL vref_sel)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_VREF_SEL, vref_sel);
}
 
__STATIC_INLINE HW_SDADC_VREF_SEL hw_sdadc_get_vref_selection(void)
{
        return (HW_SDADC_VREF_SEL) REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_VREF_SEL);
}
 
__STATIC_INLINE uint16_t hw_sdadc_get_raw_value(void)
{
        return REG_GETF(SDADC, SDADC_RESULT_REG, SDADC_VAL);
}
 
 
__STATIC_INLINE void hw_sdadc_connect_vref_to_pad(void)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_VREF_TO_PAD, 1);
}
 
__STATIC_INLINE void hw_sdadc_disconnect_vref_from_pad(void)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_VREF_TO_PAD, 0);
}
 
/*
 * \brief Check reference voltage connection to GPIO pad
 *
 * Connect internal SDADC reference voltage VREF (0.9V) to P1[5]
 * 0: Disconnected (default)
 * 1: Connected
 *
 * \return reference voltage connected/disconnected to P1[5]
 *
 */
__STATIC_INLINE bool hw_sdadc_is_vref_connected_to_pad(void)
{
        return (!!(REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_VREF_TO_PAD)));
}
 
/*=============================================================================================*/
/* Calibration functions                                                                       */
/*=============================================================================================*/
 
__STATIC_FORCEINLINE void hw_sdadc_set_gain_correction(uint16_t gain)
{
        REG_SETF(SDADC, SDADC_GAIN_CORR_REG, SDADC_GAIN_CORR, gain);
}
 
__STATIC_INLINE uint16_t hw_sdadc_get_gain_correction(void)
{
        return (uint16_t) REG_GETF(SDADC, SDADC_GAIN_CORR_REG, SDADC_GAIN_CORR);
}
 
__STATIC_INLINE void hw_sdadc_set_offset_correction(uint16_t offset)
{
        REG_SETF(SDADC, SDADC_OFFS_CORR_REG, SDADC_OFFS_CORR, offset);
}
 
__STATIC_INLINE uint16_t hw_sdadc_get_offset_correction(void)
{
        return REG_GETF(SDADC, SDADC_OFFS_CORR_REG, SDADC_OFFS_CORR);
}
 
/*=============================================================================================*/
/* Configuring the PGA in SDADC                                                                */
/*=============================================================================================*/
 
__STATIC_INLINE void hw_sdadc_pga_set_gain(HW_SDADC_PGA_GAIN gain)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_GAIN, gain);
}
 
__STATIC_INLINE HW_SDADC_PGA_GAIN hw_sdadc_pga_get_gain(void)
{
        return (HW_SDADC_PGA_GAIN) REG_GETF(SDADC, SDADC_PGA_CTRL_REG, PGA_GAIN);
}
 
__STATIC_INLINE void hw_sdadc_pga_set_mode(HW_SDADC_PGA_MODE mode)
{
        ASSERT_WARNING((mode & 0x03) != HW_SDADC_PGA_MODE_RESERVED);
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_SINGLE, mode);
}
 
__STATIC_INLINE HW_SDADC_PGA_MODE hw_sdadc_pga_get_mode(void)
{
        return (HW_SDADC_PGA_MODE) REG_GETF(SDADC, SDADC_PGA_CTRL_REG, PGA_SINGLE);
}
 
__STATIC_INLINE void hw_sdadc_pga_mute(void)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_MUTE, 1);
}
 
__STATIC_INLINE void hw_sdadc_pga_unmute(void)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_MUTE, 0);
}
 
__STATIC_INLINE bool hw_sdadc_pga_is_mute(void)
{
        return REG_GETF(SDADC, SDADC_PGA_CTRL_REG, PGA_MUTE);
}
 
__STATIC_INLINE void hw_sdadc_pga_set_bias(HW_SDADC_PGA_BIAS bias)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_BIAS, bias);
}
 
__STATIC_INLINE HW_SDADC_PGA_BIAS hw_sdadc_pga_get_bias(void)
{
        return (HW_SDADC_PGA_BIAS) REG_GETF(SDADC, SDADC_PGA_CTRL_REG, PGA_BIAS);
}
 
 
__STATIC_INLINE void hw_sdadc_pga_short_inputs(void)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_SHORTIN, 1);
}
 
__STATIC_INLINE void hw_sdadc_pga_unshort_inputs(void)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_SHORTIN, 0);
}
 
__STATIC_INLINE bool hw_sdadc_pga_inputs_are_shorted(void)
{
        return REG_GETF(SDADC, SDADC_PGA_CTRL_REG, PGA_SHORTIN);
}
 
__STATIC_INLINE void hw_sdadc_pga_select_enabled_channels(HW_SDADC_PGA_EN channels)
{
        REG_SETF(SDADC, SDADC_PGA_CTRL_REG, PGA_EN, channels);
}
 
__STATIC_INLINE HW_SDADC_PGA_GAIN hw_sdadc_pga_enabled_channels_status(void)
{
        return (HW_SDADC_PGA_GAIN) REG_GETF(SDADC, SDADC_PGA_CTRL_REG, PGA_EN);
}
 
__STATIC_INLINE void hw_sdadc_set_cic_offset(uint32_t val)
{
        ASSERT_WARNING(hw_sdadc_in_progress() == false);
        REG_SETF(SDADC, SDADC_AUDIO_FILT_REG, SDADC_CIC_OFFSET, val);
}
 
__STATIC_INLINE uint32_t hw_sdadc_get_cic_offset(void)
{
        return REG_GETF(SDADC, SDADC_AUDIO_FILT_REG, SDADC_CIC_OFFSET);
}
 
/*=============================================================================================*/
/* Basic functionality of the SDADC                                                            */
/*=============================================================================================*/
 
void hw_sdadc_init(const hw_sdadc_config_t *cfg);
 
void hw_sdadc_audio_init(hw_sdadc_interrupt_cb cb, const hw_sdadc_pga_config_t *cfg);
 
 
void hw_sdadc_configure(const hw_sdadc_config_t *cfg);
 
void hw_sdadc_register_interrupt(hw_sdadc_interrupt_cb cb);
 
void hw_sdadc_unregister_interrupt(void);
 
__STATIC_INLINE void hw_sdadc_clear_interrupt(void)
{
        REG_SETF(SDADC, SDADC_CLEAR_INT_REG, SDADC_CLR_INT, 1);
}
 
void hw_sdadc_stop_and_wait(void);
 
__STATIC_INLINE void hw_sdadc_enable(void)
{
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_EN, 1);
        while (0 == REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_LDO_OK));       // Wait for LDO OK
}
 
__STATIC_INLINE void hw_sdadc_disable(void)
{
        hw_sdadc_stop_and_wait();
 
        REG_SETF(SDADC, SDADC_CTRL_REG, SDADC_EN, 0);
}
 
__STATIC_INLINE bool hw_sdadc_is_enabled(void)
{
        return REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_EN);
}
 
void hw_sdadc_start(void);
__STATIC_INLINE bool hw_sdadc_in_progress(void)
{
        return (!!(REG_GETF(SDADC, SDADC_CTRL_REG, SDADC_START)));
}
 
 
__STATIC_INLINE void hw_sdadc_adc_measure(void)
{
        ASSERT_WARNING(hw_sdadc_get_continuous() == false);
        hw_sdadc_start();
        while (hw_sdadc_in_progress());
}
 
int32_t hw_sdadc_get_voltage(const hw_sdadc_config_t *cfg);
 
int32_t hw_sdadc_convert_to_millivolt(const hw_sdadc_config_t *cfg, uint16_t raw);
 
bool hw_sdadc_read(uint32_t nof_conv, uint16_t *out_buf, hw_sdadc_read_cb cb, void *user_data);
 
void hw_sdadc_abort_read(void);
 
void hw_sdadc_store_ext_ref_calibration_values(int16_t gain, int16_t offset);
 
#endif /* dg_configUSE_HW_SDADC */
 
 
#endif /* HW_SDADC_H_ */