hw_cache_da1459x.h

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#ifndef HW_CACHE_DA1459X_H_
#define HW_CACHE_DA1459X_H_
 
 
#include <sdk_defs.h>
 
/*
 * ENUMERATION DEFINITIONS
 *****************************************************************************************
 */
 
typedef enum {
        HW_CACHE_EFLASH_REGION_SZ_512KB = 4,
        HW_CACHE_EFLASH_REGION_SZ_256KB = 5,
        HW_CACHE_EFLASH_REGION_SZ_128KB = 6,
        HW_CACHE_EFLASH_REGION_SZ_64KB = 7,
        HW_CACHE_EFLASH_REGION_SZ_INVALID,              /* Used as iteration terminator */
} HW_CACHE_EFLASH_REGION_SZ;
 
typedef uint16_t eflash_region_base_t;
typedef uint16_t eflash_region_offset_t;
 
#define HW_CACHE_EFLASH_DEFAULT_REGION_BASE     0x00A0
#define HW_CACHE_EFLASH_MAX_REGION_BASE         0xFF
#define HW_CACHE_EFLASH_DEFAULT_REGION_OFFSET   0x0
#define HW_CACHE_EFLASH_MAX_REGION_OFFSET       0xFFF
#define HW_CACHE_EFLASH_DEFAULT_REGION_SZ       HW_CACHE_EFLASH_REGION_SZ_128KB
#define HW_CACHE_EFLASH_MIN_REGION_SZ           HW_CACHE_EFLASH_REGION_SZ_64KB
#define HW_CACHE_EFLASH_MAX_REGION_SZ           HW_CACHE_EFLASH_REGION_SZ_512KB
 
typedef enum {
        HW_CACHE_FLASH_REGION_SZ_32MB = 0,
        HW_CACHE_FLASH_REGION_SZ_16MB = 1,
        HW_CACHE_FLASH_REGION_SZ_8MB = 2,
        HW_CACHE_FLASH_REGION_SZ_4MB = 3,
        HW_CACHE_FLASH_REGION_SZ_2MB = 4,
        HW_CACHE_FLASH_REGION_SZ_1MB = 5,
        HW_CACHE_FLASH_REGION_SZ_512KB = 6,
        HW_CACHE_FLASH_REGION_SZ_256KB = 7,
        HW_CACHE_FLASH_REGION_SZ_INVALID,              /* Used as iteration terminator */
} HW_CACHE_FLASH_REGION_SZ;
 
typedef uint16_t flash_region_base_t;
typedef uint16_t flash_region_offset_t;
 
#define HW_CACHE_FLASH_DEFAULT_REGION_BASE     0x1600
#define HW_CACHE_FLASH_MAX_REGION_BASE         0x17fc
#define HW_CACHE_FLASH_DEFAULT_REGION_OFFSET   0x0
#define HW_CACHE_FLASH_MAX_REGION_OFFSET       0xFFF
#define HW_CACHE_FLASH_DEFAULT_REGION_SZ       HW_CACHE_FLASH_REGION_SZ_512KB
#define HW_CACHE_FLASH_MIN_REGION_SZ           HW_CACHE_FLASH_REGION_SZ_256KB
#define HW_CACHE_FLASH_MAX_REGION_SZ           HW_CACHE_FLASH_REGION_SZ_32MB
 
/*
 * FAMILY SPECIFIC GENERIC FUNCTIONALITY DEFINITIONS
 *****************************************************************************************
 */
 
__STATIC_INLINE void hw_cache_enable()
{
        REG_SET_BIT(CRG_TOP, SYS_CTRL_REG, CACHERAM_MUX);
        /* Wait until the CACHERAM_MUX=1 (because of the APB Bridge). */
        while (REG_GETF(CRG_TOP, SYS_CTRL_REG, CACHERAM_MUX) != 1) {}
}
 
__STATIC_INLINE void hw_cache_disable()
{
        REG_CLR_BIT(CRG_TOP, SYS_CTRL_REG, CACHERAM_MUX);
        /* Wait until the CACHERAM_MUX=0 (because of the APB Bridge). */
        while (REG_GETF(CRG_TOP, SYS_CTRL_REG, CACHERAM_MUX) != 0) {}
}
 
__STATIC_INLINE bool hw_cache_is_enabled()
{
        return REG_GETF(CRG_TOP, SYS_CTRL_REG, CACHERAM_MUX);
}
 
__STATIC_INLINE void hw_cache_set_extflash_cacheable_len(uint32_t len)
{
        ASSERT_WARNING((len & ~CACHE_CACHE_CTRL2_REG_CACHE_LEN_Msk) == 0);
        REG_SETF(CACHE, CACHE_CTRL2_REG, CACHE_LEN, len);
}
 
__STATIC_INLINE int hw_cache_get_extflash_cacheable_len(void)
{
        return REG_GETF(CACHE, CACHE_CTRL2_REG, CACHE_LEN);
}
 
 
__STATIC_INLINE void hw_cache_set_eflash_cacheable_len(uint32_t len)
{
        ASSERT_WARNING((len & ~(CACHE_CACHE_CTRL2_REG_CACHE_EF_LEN_Msk >>
                CACHE_CACHE_CTRL2_REG_CACHE_EF_LEN_Pos)) == 0);
        REG_SETF(CACHE, CACHE_CTRL2_REG, CACHE_EF_LEN, len);
}
 
__STATIC_INLINE int hw_cache_get_eflash_cacheable_len(void)
{
        return REG_GETF(CACHE, CACHE_CTRL2_REG, CACHE_EF_LEN);
}
 
DEPRECATED_MSG("API no longer supported, use hw_cache_set_eflash_cacheable_len.")
__STATIC_INLINE void hw_cache_set_len(uint32_t len)
{
        hw_cache_set_eflash_cacheable_len(len);
}
 
DEPRECATED_MSG("API no longer supported, use hw_cache_get_eflash_cacheable_len.")
__STATIC_INLINE int hw_cache_get_len(void)
{
        return hw_cache_get_eflash_cacheable_len();
}
 
__STATIC_INLINE void hw_cache_enable_flushing(void)
{
        REG_CLR_BIT(CACHE, CACHE_CTRL2_REG, CACHE_FLUSH_DISABLE);
}
 
__STATIC_INLINE void hw_cache_disable_flushing(void)
{
        REG_SET_BIT(CACHE, CACHE_CTRL2_REG, CACHE_FLUSH_DISABLE);
}
 
__STATIC_INLINE bool hw_cache_is_flushing_disabled()
{
        return REG_GETF(CACHE, CACHE_CTRL2_REG, CACHE_FLUSH_DISABLE);
}
 
__STATIC_INLINE void hw_cache_flush(void)
{
        if (!hw_cache_is_flushing_disabled()) {
                GLOBAL_INT_DISABLE();
                hw_cache_disable();
                hw_cache_enable();
                GLOBAL_INT_RESTORE();
        }
}
 
/*
 * CACHEABLE EFLASH RELATED FUNCTIONALITY DEFINITIONS
 *****************************************************************************************
 */
 
__STATIC_INLINE void hw_cache_eflash_set_region_base(eflash_region_base_t base)
{
        ASSERT_WARNING(base <= HW_CACHE_EFLASH_MAX_REGION_BASE);
        REG_SETF(CACHE, CACHE_EFLASH_REG, EFLASH_REGION_BASE, base);
}
 
__STATIC_INLINE eflash_region_base_t hw_cache_eflash_get_region_base(void)
{
        return REG_GETF(CACHE, CACHE_EFLASH_REG, EFLASH_REGION_BASE);
}
 
__STATIC_INLINE void hw_cache_eflash_set_region_offset(eflash_region_offset_t offset)
{
        ASSERT_WARNING(offset <= HW_CACHE_EFLASH_MAX_REGION_OFFSET);
        REG_SETF(CACHE, CACHE_EFLASH_REG, EFLASH_REGION_OFFSET, offset);
}
 
__STATIC_INLINE eflash_region_offset_t hw_cache_eflash_get_region_offset(void)
{
        return REG_GETF(CACHE, CACHE_EFLASH_REG, EFLASH_REGION_OFFSET);
}
 
__STATIC_INLINE void hw_cache_eflash_set_region_size(HW_CACHE_EFLASH_REGION_SZ sz)
{
        ASSERT_WARNING(sz >= HW_CACHE_EFLASH_MAX_REGION_SZ && sz <= HW_CACHE_EFLASH_MIN_REGION_SZ);
        REG_SETF(CACHE, CACHE_EFLASH_REG, EFLASH_REGION_SIZE, sz);
}
 
__STATIC_INLINE HW_CACHE_EFLASH_REGION_SZ hw_cache_eflash_get_region_size(void)
{
        return REG_GETF(CACHE, CACHE_EFLASH_REG, EFLASH_REGION_SIZE);
}
 
__STATIC_INLINE void hw_cache_eflash_configure_region(eflash_region_base_t base, eflash_region_offset_t offset,
        HW_CACHE_EFLASH_REGION_SZ sz)
{
        hw_cache_eflash_set_region_base(base);
        hw_cache_eflash_set_region_offset(offset);
        hw_cache_eflash_set_region_size(sz);
}
 
/*
 * CACHEABLE FLASH RELATED FUNCTIONALITY DEFINITIONS
 *****************************************************************************************
 */
 
__STATIC_INLINE void hw_cache_flash_set_region_base(flash_region_base_t base)
{
        ASSERT_WARNING((base & 0xfe03) == HW_CACHE_FLASH_DEFAULT_REGION_BASE);
        REG_SETF(CACHE, CACHE_FLASH_REG, FLASH_REGION_BASE, base);
}
 
__STATIC_INLINE flash_region_base_t hw_cache_flash_get_region_base(void)
{
        return REG_GETF(CACHE, CACHE_FLASH_REG, FLASH_REGION_BASE);
}
 
__STATIC_INLINE void hw_cache_flash_set_region_offset(flash_region_offset_t offset)
{
        ASSERT_WARNING(offset <= HW_CACHE_FLASH_MAX_REGION_OFFSET);
        REG_SETF(CACHE, CACHE_FLASH_REG, FLASH_REGION_OFFSET, offset);
}
 
__STATIC_INLINE flash_region_offset_t hw_cache_flash_get_region_offset(void)
{
        return REG_GETF(CACHE, CACHE_FLASH_REG, FLASH_REGION_OFFSET);
}
 
__STATIC_INLINE void hw_cache_flash_set_region_size(HW_CACHE_FLASH_REGION_SZ sz)
{
        ASSERT_WARNING(sz >= HW_CACHE_FLASH_MAX_REGION_SZ && sz <= HW_CACHE_FLASH_MIN_REGION_SZ);
        REG_SETF(CACHE, CACHE_FLASH_REG, FLASH_REGION_SIZE, sz);
}
 
__STATIC_INLINE HW_CACHE_FLASH_REGION_SZ hw_cache_flash_get_region_size(void)
{
        return REG_GETF(CACHE, CACHE_FLASH_REG, FLASH_REGION_SIZE);
}
 
__STATIC_INLINE void hw_cache_flash_configure_region(flash_region_base_t base, flash_region_offset_t offset,
        HW_CACHE_FLASH_REGION_SZ sz)
{
        hw_cache_flash_set_region_base(base);
        hw_cache_flash_set_region_offset(offset);
        hw_cache_flash_set_region_size(sz);
}
 
/*
 * MRM RELATED FUNCTIONALITY DEFINITIONS
 *****************************************************************************************
 */
__STATIC_INLINE uint32_t hw_cache_mrm_get_hits_with_one_wait_state(void)
{
        return CACHE->CACHE_MRM_HITS1WS_REG;
}
 
__STATIC_INLINE void hw_cache_mrm_set_hits_with_one_wait_state(uint32_t hits)
{
        CACHE->CACHE_MRM_HITS1WS_REG = hits;
}
 
 
#endif /* HW_CACHE_DA1459X_H_ */