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SmartSnippets DA1459x SDK
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Flash configuration settings. More...
Macros | |
| #define | dg_configFLASH_POWER_DOWN (0) |
| When set to 1, the QSPI FLASH is put to power-down state during sleep. More... | |
| #define | dg_configQSPI_FLASH_AUTODETECT (0) |
| Enable the Flash Auto-detection mode for QSPIC. More... | |
| #define | dg_configQSPI_MEMORY_CONFIG_TABLE_HEADER "qspi_memory_config_table_internal.h" |
| The header file where the QSPI flash configuration table is instantiated. More... | |
| #define | dg_configQSPI_FLASH_AUTODETECT_RESET_DELAY (12000) |
| Minimum required delay after flash reset sequence in usec. More... | |
| #define | dg_configIMAGE_FLASH_OFFSET (0) |
| Offset of the image if not placed at the beginning of QSPI Flash. More... | |
| #define | dg_configQSPI_FLASH_MAX_WRITE_SIZE (128) |
| Set the flash page size. More... | |
| #define | dg_configQSPI_AUTOMODE_ENABLE (1) |
| Enable qspi_automode. More... | |
| #define | dg_configPOWER_1V8_ACTIVE (2) |
| The rail from which the external Flash is powered, if an external Flash is used. More... | |
| #define | dg_configPOWER_1V8_SLEEP (2) |
| When set to 1, the 1V8 is powered during sleep. When set to 2 the rail configuration will be defined by the application. More... | |
| #define | dg_configQSPI_FLASH_POWER_DOWN (1) |
| When set to 1, the system activates the QSPI flash power-down mode when it enters sleep in order to minimize overall power consumption. More... | |
| #define | dg_configQSPI_DRIVE_CURRENT (HW_QSPI_DRIVE_CURRENT_4) |
| Set the Drive Strength of the QSPI Controller. More... | |
| #define | dg_configQSPI_SLEW_RATE (HW_QSPI_SLEW_RATE_0) |
| Set the Slew Rate of the QSPI Controller. More... | |
| #define | dgconfigQSPI_ERASE_IN_AUTOMODE (1) |
| Select whether the QSPI Flash memory will be erased in Auto or in Manual Access Mode. More... | |
| #define | dg_configQSPI_FLASH_HEADER_FILE "qspi_mx25u3235_v2.h" |
| The Flash Driver header file to include. More... | |
| #define | dg_configQSPI_FLASH_CONFIG qspi_mx25u3235_cfg |
| The Flash Driver configuration structure. More... | |
| #define | dg_configQSPI_FLASH_CONFIG_VERIFY (0) |
| Flash device configuration verification. More... | |
| #define | dg_configEFLASH_MASS_ERASE_TIME 160000 |
| EFLASH memory mass erase time in usec. More... | |
| #define | dg_configEFLASH_PAGE_ERASE_TIME 160000 |
| EFLASH memory page erase time in usec. More... | |
| #define | dg_configEFLASH_WORD_WRITE_TIME 16 |
| EFLASH memory one word write time in usec. More... | |
| #define | dg_configHW_FCU_WAIT_CYCLES_MODE (2) |
| Activate EFLASH optimum wait cycle functionality. More... | |
Flash configuration settings.
| #define dg_configEFLASH_MASS_ERASE_TIME 160000 |
EFLASH memory mass erase time in usec.
EFLASH memory mass erase time. Minimum: 80000 usec Maximum: 160000 usec
| #define dg_configEFLASH_PAGE_ERASE_TIME 160000 |
EFLASH memory page erase time in usec.
EFLASH memory page erase time. Minimum: 80000 usec Maximum: 160000 usec
| #define dg_configEFLASH_WORD_WRITE_TIME 16 |
EFLASH memory one word write time in usec.
EFLASH memory one word write time. Minimum: 8 usec Maximum: 16 usec
| #define dg_configFLASH_POWER_DOWN (0) |
When set to 1, the QSPI FLASH is put to power-down state during sleep.
| #define dg_configHW_FCU_WAIT_CYCLES_MODE (2) |
Activate EFLASH optimum wait cycle functionality.
EFLASH wait cycles depend on AHB bus frequency and VDD voltage level. Enabling this functionality EFLASH is configured with the correct wait cycles.
When set to 0, the EFLASH wait cycles are configured to the default and secure option of 2 wait cycles, regardless of the AHB frequency and VDD voltage level. When set to 1, the EFLASH wait cycles are dynamically configured based on AHB bus frequency and VDD voltage level. When set to 2, in addition to dynamic configuration of wait cycles in EFLASH, like when is set to 1, the AHB frequency and VDD voltage level are monitored in order to indicate if there was a change in the above parameters without triggering wait cycles change. In this mode, extra code will be added in order to monitor the above settings and in case of an untraced change an ASSERT_WARNING will be triggered.
| #define dg_configIMAGE_FLASH_OFFSET (0) |
Offset of the image if not placed at the beginning of QSPI Flash.
| #define dg_configPOWER_1V8_ACTIVE (2) |
The rail from which the external Flash is powered, if an external Flash is used.
When set to 1, the 1V8 rail is powered, when the system is in active state. When set to 2 the rail configuration will be defined by the application
| #define dg_configPOWER_1V8_SLEEP (2) |
When set to 1, the 1V8 is powered during sleep. When set to 2 the rail configuration will be defined by the application.
| #define dg_configQSPI_AUTOMODE_ENABLE (1) |
Enable qspi_automode.
Enable qspi_automode to access QSPI flash. May be disabled when QSPI flash is not accessible.
| #define dg_configQSPI_DRIVE_CURRENT (HW_QSPI_DRIVE_CURRENT_4) |
| #define dg_configQSPI_FLASH_AUTODETECT (0) |
Enable the Flash Auto-detection mode for QSPIC.
| #define dg_configQSPI_FLASH_AUTODETECT_RESET_DELAY (12000) |
Minimum required delay after flash reset sequence in usec.
When the dg_configFLASH_AUTODETECT is enabled, a flash reset sequence must be applied before reading the JEDEC ID. Since the memory is unknown, the corresponding reset delay cannot be fetched by the flash memory driver.
| #define dg_configQSPI_FLASH_CONFIG qspi_mx25u3235_cfg |
The Flash Driver configuration structure.
The configuration structure must be in the include path of the compiler
| #define dg_configQSPI_FLASH_CONFIG_VERIFY (0) |
Flash device configuration verification.
When set to 1, the Flash device id configuration is checked against the JEDEC ID read from the controller.
Applicable only when flash auto detection is not enabled.
| #define dg_configQSPI_FLASH_HEADER_FILE "qspi_mx25u3235_v2.h" |
The Flash Driver header file to include.
The header file must be in the include path of the compiler
| #define dg_configQSPI_FLASH_MAX_WRITE_SIZE (128) |
Set the flash page size.
| #define dg_configQSPI_FLASH_POWER_DOWN (1) |
When set to 1, the system activates the QSPI flash power-down mode when it enters sleep in order to minimize overall power consumption.
| #define dg_configQSPI_MEMORY_CONFIG_TABLE_HEADER "qspi_memory_config_table_internal.h" |
The header file where the QSPI flash configuration table is instantiated.
This compilation option has effect only when the QSPI flash auto detection is enabled.
| #define dg_configQSPI_SLEW_RATE (HW_QSPI_SLEW_RATE_0) |
| #define dgconfigQSPI_ERASE_IN_AUTOMODE (1) |
Select whether the QSPI Flash memory will be erased in Auto or in Manual Access Mode.
1.8.16