SmartSnippets DA1459x SDK
sdk
bsp
config
bsp_debug.h
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#ifndef BSP_DEBUG_H_
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#define BSP_DEBUG_H_
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/* -------------------------------------- Debug settings ---------------------------------------- */
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#ifndef dg_configENABLE_DEBUGGER
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#define dg_configENABLE_DEBUGGER (1)
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#endif
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#ifndef dg_configFREERTOS_ENABLE_THREAD_AWARENESS
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#if (dg_configIMAGE_SETUP == DEVELOPMENT_MODE)
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#define dg_configFREERTOS_ENABLE_THREAD_AWARENESS (1)
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#else
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#define dg_configFREERTOS_ENABLE_THREAD_AWARENESS (0)
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#endif
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#endif
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#ifndef dg_configENABLE_CMAC_DEBUGGER
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#define dg_configENABLE_CMAC_DEBUGGER (0)
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#endif
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#ifndef dg_configUSE_SW_CURSOR
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#define dg_configUSE_SW_CURSOR (0)
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#define SW_CURSOR_PORT (0)
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#define SW_CURSOR_PIN (0)
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#else
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# if !defined SW_CURSOR_PORT && !defined SW_CURSOR_PIN
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# define SW_CURSOR_PORT (1)
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# define SW_CURSOR_PIN (2)
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# endif
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#endif
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#ifndef dg_configENABLE_MTB
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#define dg_configENABLE_MTB (dg_configIMAGE_SETUP == DEVELOPMENT_MODE)
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#endif
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#if dg_configENABLE_MTB
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#ifndef dg_configMTB_MASK
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#define dg_configMTB_MASK (6)
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#endif
/* dg_configMTB_MASK */
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#define MTB_BUFFER_SIZE (1 << (dg_configMTB_MASK + 4))
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#else
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#undef dg_configMTB_MASK
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#define dg_configMTB_MASK (0)
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#endif
/* dg_configENABLE_MTB */
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/* ---------------------------------------------------------------------------------------------- */
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/* ----------------------------- Segger System View configuration ------------------------------- */
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#ifndef dg_configSYSTEMVIEW
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#define dg_configSYSTEMVIEW (0)
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#endif
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#if dg_configSYSTEMVIEW
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# ifndef dg_configSYSTEMVIEW_STACK_OVERHEAD
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# define dg_configSYSTEMVIEW_STACK_OVERHEAD (256)
/* in Bytes */
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# endif
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#else
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# undef dg_configSYSTEMVIEW_STACK_OVERHEAD
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# define dg_configSYSTEMVIEW_STACK_OVERHEAD (0)
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#endif
/* dg_configSYSTEMVIEW */
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/*
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* Enable/Disable System View monitoring time critical interrupt handlers (BLE, CPM, USB).
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* Disabling ISR monitoring could help reducing assertions triggered by System View monitoring overhead.
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*
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*/
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#ifndef dg_configSYSTEMVIEW_MONITOR_BLE_ISR
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#define dg_configSYSTEMVIEW_MONITOR_BLE_ISR (1)
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#endif
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#ifndef dg_configSYSTEMVIEW_MONITOR_CPM_ISR
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#define dg_configSYSTEMVIEW_MONITOR_CPM_ISR (1)
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#endif
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#ifndef dg_configSYSTEMVIEW_MONITOR_USB_ISR
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#define dg_configSYSTEMVIEW_MONITOR_USB_ISR (1)
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* --------------------------------- DEBUG GPIO handling macros --------------------------------- */
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#define DBG_GET_SET_PAD_LATCH_REG(name) *(((volatile uint32_t *)(&name##_SET_REG) == (volatile uint32_t *)(&GPIO->P0_SET_DATA_REG)) ? &CRG_TOP->P0_SET_PAD_LATCH_REG : &CRG_TOP->P1_SET_PAD_LATCH_REG)
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#define DBG_GET_RESET_PAD_LATCH_REG(name) *(((volatile uint32_t *)(&name##_SET_REG) == (volatile uint32_t *)(&GPIO->P0_SET_DATA_REG)) ? &CRG_TOP->P0_RESET_PAD_LATCH_REG : &CRG_TOP->P1_RESET_PAD_LATCH_REG)
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#define DBG_TOGGLE_PIN_PAD_LATCH(name) DBG_GET_SET_PAD_LATCH_REG(name) = name##_PIN; \
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DBG_GET_RESET_PAD_LATCH_REG(name) = name##_PIN
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#define DBG_SET_PIN_REG(name) name##_SET_REG = name##_PIN
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#define DBG_RESET_PIN_REG(name) name##_RESET_REG = name##_PIN
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#define DBG_CONFIGURE(flag, name, func) \
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{ \
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if (flag == 1) { \
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ASSERT_WARNING(REG_GETF(CRG_TOP, SYS_STAT_REG, COM_IS_UP) == 1); \
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name##_MODE_REG = 0x300 + func; \
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DBG_TOGGLE_PIN_PAD_LATCH(name); \
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} \
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}
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#define DBG_CONFIGURE_HIGH(flag, name) \
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{ \
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if (flag == 1) { \
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ASSERT_WARNING(REG_GETF(CRG_TOP, SYS_STAT_REG, COM_IS_UP) == 1); \
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name##_MODE_REG = 0x300; \
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DBG_SET_PIN_REG(name); \
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DBG_TOGGLE_PIN_PAD_LATCH(name); \
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} \
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}
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#define DBG_CONFIGURE_LOW(flag, name) \
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{ \
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if (flag == 1) { \
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ASSERT_WARNING(REG_GETF(CRG_TOP, SYS_STAT_REG, COM_IS_UP) == 1); \
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name##_MODE_REG = 0x300; \
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DBG_RESET_PIN_REG(name); \
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DBG_TOGGLE_PIN_PAD_LATCH(name); \
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} \
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}
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#define DBG_SET_HIGH(flag, name) \
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{ \
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if (flag == 1) { \
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ASSERT_WARNING(REG_GETF(CRG_TOP, SYS_STAT_REG, COM_IS_UP) == 1); \
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name##_MODE_REG = 0x300; \
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DBG_SET_PIN_REG(name); \
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DBG_TOGGLE_PIN_PAD_LATCH(name); \
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} \
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}
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#define DBG_SET_LOW(flag, name) \
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{ \
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if (flag == 1) { \
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ASSERT_WARNING(REG_GETF(CRG_TOP, SYS_STAT_REG, COM_IS_UP) == 1); \
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name##_MODE_REG = 0x300; \
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DBG_RESET_PIN_REG(name); \
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DBG_TOGGLE_PIN_PAD_LATCH(name); \
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} \
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}
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/* ---------------------------------------------------------------------------------------------- */
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/* ---------------------------------- HardFault or NMI event ------------------------------------ */
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#ifndef EXCEPTION_DEBUG
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#define EXCEPTION_DEBUG (0) // Requires GPIO config.
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* --------------------------------- Clock and Power Manager ------------------------------------ */
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#ifndef PWR_MGR_DEBUG
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#define PWR_MGR_DEBUG (0)
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#endif
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#ifndef SYS_TIM_DEBUG
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#define SYS_TIM_DEBUG (0)
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#endif
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#ifndef PWR_MGR_FUNCTIONAL_DEBUG
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#define PWR_MGR_FUNCTIONAL_DEBUG (0) // Requires GPIO config.
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#endif
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#ifndef PWR_MGR_USE_TIMING_DEBUG
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#define PWR_MGR_USE_TIMING_DEBUG (0) // Requires GPIO config.
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#endif
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#ifndef CLK_MGR_USE_TIMING_DEBUG
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#define CLK_MGR_USE_TIMING_DEBUG (0) // Requires GPIO config.
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#endif
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/* Controls which RAM blocks will be retained when the MEASURE_SLEEP_CURRENT test mode is used
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* (optional). */
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#ifndef dg_configTESTMODE_RETAIN_RAM
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#define dg_configTESTMODE_RETAIN_RAM (0x1F)
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#endif
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/* Controls whether the Cache will be retained when the MEASURE_SLEEP_CURRENT test mode is used
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* (optional). */
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#ifndef dg_configTESTMODE_RETAIN_CACHE
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#define dg_configTESTMODE_RETAIN_CACHE (0)
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#endif
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/* Controls whether the ECC RAM will be retained when the MEASURE_SLEEP_CURRENT test mode is used
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* (optional). */
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#ifdef dg_config_TESTMODE_RETAIN_ECCRAM
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#error "dg_config_TESTMODE_RETAIN_ECCRAM is no longer supported. "
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"Use dg_configTESTMODE_RETAIN_ECCRAM instead (no underscore)!"
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#endif
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#ifndef dg_configTESTMODE_RETAIN_ECCRAM
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#define dg_configTESTMODE_RETAIN_ECCRAM (0)
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* --------------------------------------- USB Charger ------------------------------------------ */
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/* ---------------------------------------------------------------------------------------------- */
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/* ------------------------------------------- BLE ---------------------------------------------- */
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#ifndef BLE_ADAPTER_DEBUG
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#define BLE_ADAPTER_DEBUG (0) // Requires GPIO config.
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#endif
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#define BLE_RX_EN_FUNC (57)
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#ifndef BLE_WINDOW_STATISTICS
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#define BLE_WINDOW_STATISTICS (0)
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#endif
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#ifndef BLE_SLEEP_PERIOD_DEBUG
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#define BLE_SLEEP_PERIOD_DEBUG (0) // Requires logging and window statistics.
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#endif
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#ifndef BLE_WAKEUP_MONITOR_PERIOD
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#define BLE_WAKEUP_MONITOR_PERIOD (1024)
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#endif
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#ifndef BLE_MAX_MISSES_ALLOWED
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#define BLE_MAX_MISSES_ALLOWED (0)
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#endif
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#ifndef BLE_MAX_DELAYS_ALLOWED
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#define BLE_MAX_DELAYS_ALLOWED (0)
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#endif
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#ifndef BLE_SSP_DEBUG
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#define BLE_SSP_DEBUG (0)
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* ------------------------------------------ Flash --------------------------------------------- */
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#ifndef FLASH_DEBUG
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#define FLASH_DEBUG (0) // Requires GPIO config.
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#endif
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#ifndef __DBG_QSPI_ENABLED
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#define __DBG_QSPI_ENABLED (0)
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* ------------------------------------------ SysADC -------------------------------------------- */
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#ifndef SYS_ADC_DEBUG
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#define SYS_ADC_DEBUG (0) // Requires GPIO config.
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* ------------------------------------------ Common -------------------------------------------- */
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#ifndef CMN_TIMING_DEBUG
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#define CMN_TIMING_DEBUG (0) // Requires GPIO config.
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#endif
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/* ---------------------------------------------------------------------------------------------- */
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/* ------------------------------------ GPIO configuration -------------------------------------- */
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/* Enable/Disable GPIO pin assignment conflict detection
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*/
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#define DEBUG_GPIO_ALLOC_MONITOR_ENABLED (0)
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/* Exception handling debug configuration
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*
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*/
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#if (EXCEPTION_DEBUG == 0)
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// Dummy values to suppress compiler errors
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#define EXCEPTIONDBG_MODE_REG *(volatile int *)0x20000000
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#define EXCEPTIONDBG_SET_REG *(volatile int *)0x20000000
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#define EXCEPTIONDBG_RESET_REG *(volatile int *)0x20000000
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#define EXCEPTIONDBG_PIN (0)
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#else
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#endif
/* EXCEPTION_DEBUG */
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/* Functional debug configuration
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*
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* Note that GPIO overlapping is allowed if the tracked events are discrete and the initial GPIO
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* configuration is the same! No checking is performed for erroneous configuration though!
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*
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*/
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#if (PWR_MGR_FUNCTIONAL_DEBUG == 0)
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// Dummy values to suppress compiler errors
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#define PWRDBG_TICK_MODE_REG *(volatile int *)0x20000000
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#define PWRDBG_TICK_SET_REG *(volatile int *)0x20000000
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#define PWRDBG_TICK_RESET_REG *(volatile int *)0x20000000
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#define PWRDBG_TICK_PIN (0)
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#define PWRDBG_POWERUP_MODE_REG *(volatile int *)0x20000000
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#define PWRDBG_POWERUP_SET_REG *(volatile int *)0x20000000
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#define PWRDBG_POWERUP_RESET_REG *(volatile int *)0x20000000
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#define PWRDBG_POWERUP_PIN (0)
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#else
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#endif
/* PWR_MGR_FUNCTIONAL_DEBUG */
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/* Timing debug configuration
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*
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* Note that in this mode the pad latches are removed immediately after the execution resumes from
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* the __WFI(). Because of this, it is not advised to use this feature in projects that use GPIOS.
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* Nevertheless, in case it is used, make sure that the "peripheral initialization" is also done
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* at that point, modifying sys_power_mgr.c accordingly.
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*
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* Note also that GPIO overlapping is allowed if the tracked events are discrete and the initial
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* GPIO configuration is the same! No checking is performed for erroneous configuration though!
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*
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*/
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#if (PWR_MGR_USE_TIMING_DEBUG == 0)
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// Dummy values to suppress compiler errors
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#define PWRDBG_SLEEP_ENTER_MODE_REG *(volatile int *)0x20000000
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#define PWRDBG_SLEEP_ENTER_SET_REG *(volatile int *)0x20000000
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#define PWRDBG_SLEEP_ENTER_RESET_REG *(volatile int *)0x20000000
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#define PWRDBG_SLEEP_ENTER_PIN (0)
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#define PWRDBG_SLEEP_EXIT_MODE_REG *(volatile int *)0x20000000
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#define PWRDBG_SLEEP_EXIT_SET_REG *(volatile int *)0x20000000
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#define PWRDBG_SLEEP_EXIT_RESET_REG *(volatile int *)0x20000000
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#define PWRDBG_SLEEP_EXIT_PIN (0)
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#else
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#endif
/* CLK_MGR_USE_TIMING_DEBUG */
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#if (CLK_MGR_USE_TIMING_DEBUG == 0)
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// Dummy values to suppress compiler errors
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#define CLKDBG_LOWER_CLOCKS_MODE_REG *(volatile int *)0x20000000
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#define CLKDBG_LOWER_CLOCKS_SET_REG *(volatile int *)0x20000000
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#define CLKDBG_LOWER_CLOCKS_RESET_REG *(volatile int *)0x20000000
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#define CLKDBG_LOWER_CLOCKS_PIN (0)
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#define CLKDBG_XTAL32M_SETTLED_MODE_REG *(volatile int *)0x20000000
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#define CLKDBG_XTAL32M_SETTLED_SET_REG *(volatile int *)0x20000000
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#define CLKDBG_XTAL32M_SETTLED_RESET_REG *(volatile int *)0x20000000
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#define CLKDBG_XTAL32M_SETTLED_PIN (0)
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#define CLKDBG_XTAL32M_READY_MODE_REG *(volatile int *)0x20000000
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#define CLKDBG_XTAL32M_READY_SET_REG *(volatile int *)0x20000000
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#define CLKDBG_XTAL32M_READY_RESET_REG *(volatile int *)0x20000000
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#define CLKDBG_XTAL32M_READY_PIN (0)
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#define CLKDBG_DBLR_ON_MODE_REG *(volatile int *)0x20000000
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#define CLKDBG_DBLR_ON_SET_REG *(volatile int *)0x20000000
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#define CLKDBG_DBLR_ON_RESET_REG *(volatile int *)0x20000000
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#define CLKDBG_DBLR_ON_PIN (0)
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#else
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#endif
/* CLK_MGR_USE_TIMING_DEBUG */
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#if (BLE_ADAPTER_DEBUG == 0)
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#define BLEBDG_ADAPTER_MODE_REG *(volatile int *)0x20000000
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#define BLEBDG_ADAPTER_SET_REG *(volatile int *)0x20000000
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#define BLEBDG_ADAPTER_RESET_REG *(volatile int *)0x20000000
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#define BLEBDG_ADAPTER_PIN (0)
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#else
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#endif
/* BLE_ADAPTER_DEBUG */
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#if (CMN_TIMING_DEBUG == 0)
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// Common: Inside critical section (initial configuration: low)
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#define CMNDBG_CRITICAL_SECTION_MODE_REG *(volatile int *)0x20000000
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#define CMNDBG_CRITICAL_SECTION_SET_REG *(volatile int *)0x20000000
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#define CMNDBG_CRITICAL_SECTION_RESET_REG *(volatile int *)0x20000000
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#define CMNDBG_CRITICAL_SECTION_PIN (0)
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#else
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#endif
/* CMN_TIMING_DEBUG */
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/* Flash debug configuration
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*
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*/
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#if (FLASH_DEBUG == 0)
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// Write page (initial configuration: low)
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#define FLASHDBG_PAGE_PROG_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_PIN (0)
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// Program page wait loop (initial configuration: low)
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#define FLASHDBG_PAGE_PROG_WL_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_WL_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_WL_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_WL_PIN (0)
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// Program page wait loop - pending irq check (initial configuration: low)
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#define FLASHDBG_PAGE_PROG_WL_IRQ_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_WL_IRQ_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_WL_IRQ_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_PAGE_PROG_WL_IRQ_PIN (0)
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// Suspend op (initial configuration: low)
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#define FLASHDBG_SUSPEND_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_SUSPEND_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_SUSPEND_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_SUSPEND_PIN (0)
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// Erase sector cmd (initial configuration: low)
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#define FLASHDBG_SECTOR_ERASE_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_SECTOR_ERASE_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_SECTOR_ERASE_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_SECTOR_ERASE_PIN (0)
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// Notify task (initial configuration: low)
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#define FLASHDBG_TASK_NOTIFY_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_TASK_NOTIFY_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_TASK_NOTIFY_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_TASK_NOTIFY_PIN (0)
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// Suspend action (low level) (initial configuration: low)
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#define FLASHDBG_SUSPEND_ACTION_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_SUSPEND_ACTION_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_SUSPEND_ACTION_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_SUSPEND_ACTION_PIN (0)
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// Resume op (initial configuration: low)
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#define FLASHDBG_RESUME_MODE_REG *(volatile int *)0x20000000
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#define FLASHDBG_RESUME_SET_REG *(volatile int *)0x20000000
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#define FLASHDBG_RESUME_RESET_REG *(volatile int *)0x20000000
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#define FLASHDBG_RESUME_PIN (0)
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#else
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#endif
/* FLASH_DEBUG */
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#if (SYS_ADC_DEBUG == 0)
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// Write page (initial configuration: low)
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#define SYS_ADC_DBG_READ_TEMPERATURE_MODE_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_READ_TEMPERATURE_SET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_READ_TEMPERATURE_RESET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_READ_TEMPERATURE_PIN (0)
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_MODE_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_SET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_RESET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_PIN (0)
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_MODE_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_SET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_RESET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_PIN (0)
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#define SYS_ADC_DBG_TIMER_RESET_MODE_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_TIMER_RESET_SET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_TIMER_RESET_RESET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_TIMER_RESET_PIN (0)
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_MODE_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_SET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_RESET_REG *(volatile int *)0x20000000
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_PIN (0)
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#else
/* SYS_ADC_DEBUG */
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#pragma message "Deactivate switches 2 and 4 on S1 of the Motherboard to ensure proper toggling of P0_11 and P0_15"
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#define SYS_ADC_DBG_READ_TEMPERATURE_MODE_REG GPIO->P1_00_MODE_REG
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#define SYS_ADC_DBG_READ_TEMPERATURE_SET_REG GPIO->P1_SET_DATA_REG
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#define SYS_ADC_DBG_READ_TEMPERATURE_RESET_REG GPIO->P1_RESET_DATA_REG
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#define SYS_ADC_DBG_READ_TEMPERATURE_PIN (1 << 0)
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_MODE_REG GPIO->P1_01_MODE_REG
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_SET_REG GPIO->P1_SET_DATA_REG
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_RESET_REG GPIO->P1_RESET_DATA_REG
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#define SYS_ADC_DBG_SET_RF_CALIBRATION_INFO_PIN (1 << 1)
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_MODE_REG GPIO->P0_10_MODE_REG
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_SET_REG GPIO->P0_SET_DATA_REG
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_RESET_REG GPIO->P0_RESET_DATA_REG
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#define SYS_ADC_DBG_RC_CALIBRATION_NOTIFY_PIN (1 << 10)
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#define SYS_ADC_DBG_TIMER_RESET_MODE_REG GPIO->P0_11_MODE_REG
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#define SYS_ADC_DBG_TIMER_RESET_SET_REG GPIO->P0_SET_DATA_REG
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#define SYS_ADC_DBG_TIMER_RESET_RESET_REG GPIO->P0_RESET_DATA_REG
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#define SYS_ADC_DBG_TIMER_RESET_PIN (1 << 11)
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_MODE_REG GPIO->P0_15_MODE_REG
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_SET_REG GPIO->P0_SET_DATA_REG
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_RESET_REG GPIO->P0_RESET_DATA_REG
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#define SYS_ADC_DBG_RC_CLOCK_CALIBRATION_PIN (1 << 15)
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#endif
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/* Enables the logging of stack (RW) heap memories usage.
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*
669
* The feature shall only be enabled in development/debug mode
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*/
671
#ifndef dg_configLOG_BLE_STACK_MEM_USAGE
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#define dg_configLOG_BLE_STACK_MEM_USAGE (0)
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#endif
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#endif
/* BSP_DEBUG_H_ */
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