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SmartSnippets DA1459x SDK
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42 #ifndef HW_AES_HASH_H_
43 #define HW_AES_HASH_H_
49 #if dg_configUSE_HW_AES || dg_configUSE_HW_HASH
55 HW_AES_HASH_STATUS_UNLOCKED = 0,
56 HW_AES_HASH_STATUS_LOCKED_BY_AES = 1,
57 HW_AES_HASH_STATUS_LOCKED_BY_HASH = 2,
80 HW_AES_HASH_IRQ_MASK_INACTIVE =
REG_MSK(AES_HASH, CRYPTO_STATUS_REG, CRYPTO_INACTIVE),
81 HW_AES_HASH_IRQ_MASK_WAITING_FOR_INPUT =
REG_MSK(AES_HASH, CRYPTO_STATUS_REG, CRYPTO_WAIT_FOR_IN),
95 REG_SETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_MORE_IN, wait_more_input);
105 return REG_GETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_MORE_IN);
115 AES_HASH->CRYPTO_LEN_REG = len;
125 return AES_HASH->CRYPTO_LEN_REG;
136 return REG_GETF(AES_HASH, CRYPTO_STATUS_REG, CRYPTO_WAIT_FOR_IN) == 0;
177 REG_SET_BIT(CRG_TOP, CLK_AMBA_REG, AES_CLK_ENABLE);
188 REG_CLR_BIT(CRG_TOP, CLK_AMBA_REG, AES_CLK_ENABLE);
199 return REG_GETF(CRG_TOP, CLK_AMBA_REG, AES_CLK_ENABLE);
233 AES_HASH->CRYPTO_START_REG = 1;
#define REG_SETF(base, reg, field, new_val)
Set the value of a register field.
Definition: sdk_defs.h:738
#define REG_CLR_BIT(base, reg, field)
Clear a bit of a register.
Definition: sdk_defs.h:781
__STATIC_INLINE bool hw_aes_hash_clock_is_enabled(void)
Check whether the AES/HASH engine clock is enabled or not.
Definition: hw_aes_hash.h:197
#define REG_SET_BIT(base, reg, field)
Set a bit of a register.
Definition: sdk_defs.h:766
__STATIC_INLINE uint32_t hw_aes_hash_get_input_data_len(void)
Get the input data length.
Definition: hw_aes_hash.h:123
__STATIC_INLINE void hw_aes_hash_set_input_data_mode(bool wait_more_input)
Set AES/HASH engine input data mode.
Definition: hw_aes_hash.h:93
void hw_aes_hash_interrupt_disable(void)
Disable interrupt for AES/HASH crypto engine.
void hw_aes_hash_deinit(void)
De-initialize AES/HASH crypto engine.
Central include header file with platform definitions.
__STATIC_INLINE bool hw_aes_hash_waiting_for_input_data(void)
Check whether the AES/Hash Engine is waiting for more input data or not.
Definition: hw_aes_hash.h:134
HW_AES_HASH_STATUS
AES/HASH engine status.
Definition: hw_aes_hash.h:54
__STATIC_INLINE void hw_aes_hash_disable_clock(void)
Disable AES/HASH engine clock.
Definition: hw_aes_hash.h:185
HW_AES_HASH_STATUS hw_aes_hash_get_status(void)
Get the status of the AES/HASH engine.
HW_AES_HASH_IRQ_MASK
Masks of AES/HASH Engine Interrupt sources.
Definition: hw_aes_hash.h:79
__STATIC_INLINE void hw_aes_hash_set_input_data_len(uint32_t len)
Set the input data length.
Definition: hw_aes_hash.h:113
void hw_aes_hash_interrupt_enable(hw_aes_hash_cb cb)
Enable interrupt for AES/HASH crypto engine.
#define REG_MSK(base, reg, field)
Access register field mask.
Definition: sdk_defs.h:583
void(* hw_aes_hash_cb)(uint32_t status)
AES/Hash callback.
Definition: hw_aes_hash.h:168
void hw_aes_hash_set_input_data_addr(uint32_t inp_data_addr)
Set the address of the Input Data.
__ALWAYS_RETAINED_CODE bool hw_aes_hash_is_active(void)
AES/Hash is active.
#define GLOBAL_INT_RESTORE()
Macro to restore all interrupts.
Definition: sdk_defs.h:477
#define REG_GETF(base, reg, field)
Return the value of a register field.
Definition: sdk_defs.h:711
void hw_aes_hash_set_output_data_addr(uint32_t out_data_addr)
Set the address of the Output Data.
__STATIC_INLINE void hw_aes_hash_enable_clock(void)
Enable AES/HASH engine clock.
Definition: hw_aes_hash.h:174
__STATIC_INLINE bool hw_aes_hash_get_input_data_mode(void)
Get AES/HASH engine input data mode.
Definition: hw_aes_hash.h:103
__STATIC_INLINE void hw_aes_hash_start(void)
Start AES/HASH engine operation.
Definition: hw_aes_hash.h:231
#define GLOBAL_INT_DISABLE()
Macro to disable all interrupts.
Definition: sdk_defs.h:452