Structure type to access the Trace Port Interface Register (TPI). More...

#include <core_cm33.h>

Data Fields
__IM uint32_t	SSPSR

__IOM uint32_t	CSPSR

__IOM uint32_t	ACPR

__IOM uint32_t	SPPR

__IM uint32_t	FFSR

__IOM uint32_t	FFCR

__IOM uint32_t	PSCR

__IM uint32_t	TRIGGER

__IM uint32_t	ITFTTD0

__IOM uint32_t	ITATBCTR2

__IM uint32_t	ITATBCTR0

__IM uint32_t	ITFTTD1

__IOM uint32_t	ITCTRL

__IOM uint32_t	CLAIMSET

__IOM uint32_t	CLAIMCLR

__IM uint32_t	DEVID

__IM uint32_t	DEVTYPE

Detailed Description

Structure type to access the Trace Port Interface Register (TPI).

Field Documentation

◆ ACPR

__IOM uint32_t TPI_Type::ACPR

Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register

◆ CLAIMCLR

__IOM uint32_t TPI_Type::CLAIMCLR

Offset: 0xFA4 (R/W) Claim tag clear

◆ CLAIMSET

__IOM uint32_t TPI_Type::CLAIMSET

Offset: 0xFA0 (R/W) Claim tag set

◆ CSPSR

__IOM uint32_t TPI_Type::CSPSR

Offset: 0x004 (R/W) Current Parallel Port Size Register

◆ DEVID

__IM uint32_t TPI_Type::DEVID

Offset: 0xFC8 (R/ ) Device Configuration Register

◆ DEVTYPE

__IM uint32_t TPI_Type::DEVTYPE

Offset: 0xFCC (R/ ) Device Type Identifier Register

◆ FFCR

__IOM uint32_t TPI_Type::FFCR

Offset: 0x304 (R/W) Formatter and Flush Control Register

◆ FFSR

__IM uint32_t TPI_Type::FFSR

Offset: 0x300 (R/ ) Formatter and Flush Status Register

◆ ITATBCTR0

__IM uint32_t TPI_Type::ITATBCTR0

Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0

◆ ITATBCTR2

__IOM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2

◆ ITCTRL

__IOM uint32_t TPI_Type::ITCTRL

Offset: 0xF00 (R/W) Integration Mode Control

◆ ITFTTD0

__IM uint32_t TPI_Type::ITFTTD0

Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register

◆ ITFTTD1

__IM uint32_t TPI_Type::ITFTTD1

Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register

◆ PSCR

__IOM uint32_t TPI_Type::PSCR

Offset: 0x308 (R/W) Periodic Synchronization Control Register

◆ SPPR

__IOM uint32_t TPI_Type::SPPR

Offset: 0x0F0 (R/W) Selected Pin Protocol Register

◆ SSPSR

__IM uint32_t TPI_Type::SSPSR

Offset: 0x000 (R/ ) Supported Parallel Port Size Register

◆ TRIGGER

__IM uint32_t TPI_Type::TRIGGER

Offset: 0xEE8 (R/ ) TRIGGER Register

The documentation for this struct was generated from the following file:

sdk/bsp/include/core_cm33.h

Data Fields