hw_aes.h

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#ifndef HW_AES_H_
#define HW_AES_H_
 
#if dg_configUSE_HW_AES
 
#define HW_AES_USER_DATA_KEYS_MAX_ENTRIES       ((MEMORY_EFLASH_USER_DATA_KEYS_END  - \
                                                MEMORY_EFLASH_USER_DATA_KEYS_BASE) \
                                               / MEMORY_EFLASH_USER_DATA_KEY_SIZE)
#include <stdbool.h>
#include "hw_aes_hash.h"
 
typedef enum {
        HW_AES_ERROR_INVALID_INPUT_DATA_LEN = -2,
        HW_AES_ERROR_CRYPTO_ENGINE_LOCKED = -1,
        HW_AES_ERROR_NONE = 0
} HW_AES_ERROR;
 
typedef enum {
        HW_AES_MODE_ECB = 0,            
        HW_AES_MODE_CTR = 2,            
        HW_AES_MODE_CBC = 3,            
} HW_AES_MODE;
 
typedef enum {
        HW_AES_OPERATION_DECRYPT = 0,   
        HW_AES_OPERATION_ENCRYPT = 1    
} HW_AES_OPERATION;
 
typedef enum {
        HW_AES_KEY_SIZE_128 = 0,        
        HW_AES_KEY_SIZE_192 = 1,        
        HW_AES_KEY_SIZE_256 = 2         
} HW_AES_KEY_SIZE;
 
typedef enum {
        HW_AES_KEY_EXPAND_BY_SW = 0,    
        HW_AES_KEY_EXPAND_BY_HW = 1     
} HW_AES_KEY_EXPAND;
 
typedef enum {
        HW_AES_OUTPUT_DATA_MODE_ALL = 0,         
        HW_AES_OUTPUT_DATA_MODE_FINAL_BLOCK = 1, 
} HW_AES_OUTPUT_DATA_MODE;
 
typedef struct {
        HW_AES_MODE             mode : 2;               
        HW_AES_OPERATION        operation : 1;          
        HW_AES_KEY_SIZE         key_size : 2;           
        HW_AES_KEY_EXPAND       key_expand : 1;         
        HW_AES_OUTPUT_DATA_MODE output_data_mode : 1;   
        bool                    wait_more_input;        
        hw_aes_hash_cb          callback;               
        const uint8_t           *iv_cnt_ptr;            
        uint32_t                keys_addr;              
        uint32_t                input_data_addr;        
        uint32_t                output_data_addr;       
        uint32_t                input_data_len;         
} hw_aes_config_t;
 
__STATIC_INLINE void hw_aes_set_mode(HW_AES_MODE aes_mode)
{
        ASSERT_WARNING((aes_mode == HW_AES_MODE_ECB) || (aes_mode == HW_AES_MODE_CTR) ||
                       (aes_mode == HW_AES_MODE_CBC));
 
        uint32_t crypto_ctrl_reg = AES_HASH->CRYPTO_CTRL_REG;
 
        REG_SET_FIELD(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_HASH_SEL, crypto_ctrl_reg, 0);
        REG_SET_FIELD(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_ALG, crypto_ctrl_reg, 0);
        REG_SET_FIELD(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_ALG_MD, crypto_ctrl_reg, aes_mode);
 
        AES_HASH->CRYPTO_CTRL_REG = crypto_ctrl_reg;
}
 
__STATIC_INLINE HW_AES_MODE hw_aes_get_mode(void)
{
        return REG_GETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_ALG_MD);
}
 
__STATIC_INLINE void hw_aes_set_operation(HW_AES_OPERATION operation)
{
        ASSERT_WARNING((operation == HW_AES_OPERATION_DECRYPT) ||
                       (operation == HW_AES_OPERATION_ENCRYPT));
 
        REG_SETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_ENCDEC, operation);
}
 
__STATIC_INLINE void hw_aes_set_key_size(HW_AES_KEY_SIZE key_size)
{
        ASSERT_WARNING((key_size == HW_AES_KEY_SIZE_128) || (key_size == HW_AES_KEY_SIZE_192) ||
                       (key_size == HW_AES_KEY_SIZE_256));
 
        REG_SETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_AES_KEY_SZ, key_size);
}
 
__STATIC_INLINE void hw_aes_set_key_expansion(HW_AES_KEY_EXPAND key_expand)
{
        ASSERT_WARNING((key_expand == HW_AES_KEY_EXPAND_BY_SW) ||
                       (key_expand == HW_AES_KEY_EXPAND_BY_HW));
 
        REG_SETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_AES_KEXP, key_expand);
}
 
__STATIC_INLINE void hw_aes_set_output_data_mode(HW_AES_OUTPUT_DATA_MODE output_data_mode)
{
        ASSERT_WARNING((output_data_mode == HW_AES_OUTPUT_DATA_MODE_ALL) ||
                       (output_data_mode == HW_AES_OUTPUT_DATA_MODE_FINAL_BLOCK));
 
        REG_SETF(AES_HASH, CRYPTO_CTRL_REG, CRYPTO_OUT_MD, output_data_mode);
}
 
__STATIC_INLINE void hw_aes_start_operation(HW_AES_OPERATION aes_operation)
{
        hw_aes_set_operation(aes_operation);
        hw_aes_hash_start();
}
 
bool hw_aes_check_input_data_len_restrictions(void);
 
void hw_aes_set_init_vector(const uint8_t *iv_cnt_ptr);
bool hw_aes_is_key_valid(uint8_t idx);
 
 
uint32_t hw_aes_key_address_get(uint8_t key_idx);
 
void hw_aes_load_keys(uint32_t key_src_addr, HW_AES_KEY_SIZE key_size, HW_AES_KEY_EXPAND key_exp);
 
HW_AES_ERROR hw_aes_init(const hw_aes_config_t *aes_cfg);
 
#endif /* dg_configUSE_HW_AES */
 
#endif /* HW_AES_H_ */