DMA registers (DMA) More...

#include <DA1459x-00.h>

Data Fields
__IOM uint32_t	DMA0_A_START_REG

__IOM uint32_t	DMA0_B_START_REG

__IOM uint32_t	DMA0_INT_REG

__IOM uint32_t	DMA0_LEN_REG

__IOM uint32_t	DMA0_CTRL_REG

__IOM uint32_t	DMA0_IDX_REG

__IOM uint32_t	DMA1_A_START_REG

__IOM uint32_t	DMA1_B_START_REG

__IOM uint32_t	DMA1_INT_REG

__IOM uint32_t	DMA1_LEN_REG

__IOM uint32_t	DMA1_CTRL_REG

__IOM uint32_t	DMA1_IDX_REG

__IOM uint32_t	DMA2_A_START_REG

__IOM uint32_t	DMA2_B_START_REG

__IOM uint32_t	DMA2_INT_REG

__IOM uint32_t	DMA2_LEN_REG

__IOM uint32_t	DMA2_CTRL_REG

__IOM uint32_t	DMA2_IDX_REG

__IOM uint32_t	DMA3_A_START_REG

__IOM uint32_t	DMA3_B_START_REG

__IOM uint32_t	DMA3_INT_REG

__IOM uint32_t	DMA3_LEN_REG

__IOM uint32_t	DMA3_CTRL_REG

__IOM uint32_t	DMA3_IDX_REG

__IOM uint32_t	DMA4_A_START_REG

__IOM uint32_t	DMA4_B_START_REG

__IOM uint32_t	DMA4_INT_REG

__IOM uint32_t	DMA4_LEN_REG

__IOM uint32_t	DMA4_CTRL_REG

__IOM uint32_t	DMA4_IDX_REG

__IOM uint32_t	DMA5_A_START_REG

__IOM uint32_t	DMA5_B_START_REG

__IOM uint32_t	DMA5_INT_REG

__IOM uint32_t	DMA5_LEN_REG

__IOM uint32_t	DMA5_CTRL_REG

__IOM uint32_t	DMA5_IDX_REG

__IOM uint32_t	DMA_REQ_MUX_REG

__IOM uint32_t	DMA_INT_STATUS_REG

__IOM uint32_t	DMA_CLEAR_INT_REG

__IOM uint32_t	DMA_INT_MASK_REG

__IOM uint32_t	DMA_SET_INT_MASK_REG

__IOM uint32_t	DMA_RESET_INT_MASK_REG

Detailed Description

DMA registers (DMA)

Field Documentation

◆ DMA0_A_START_REG

__IOM uint32_t DMA_Type::DMA0_A_START_REG

< (@ 0x50060200) DMA Structure
(@ 0x00000000) Source address register of DMA channel 0

◆ DMA0_B_START_REG

__IOM uint32_t DMA_Type::DMA0_B_START_REG

(@ 0x00000004) Destination address register of DMA channel 0

◆ DMA0_CTRL_REG

__IOM uint32_t DMA_Type::DMA0_CTRL_REG

(@ 0x00000010) Control register of DMA channel 0

◆ DMA0_IDX_REG

__IOM uint32_t DMA_Type::DMA0_IDX_REG

(@ 0x00000014) Index pointer register of DMA channel 0

◆ DMA0_INT_REG

__IOM uint32_t DMA_Type::DMA0_INT_REG

(@ 0x00000008) Interrupt length register of DMA channel 0

◆ DMA0_LEN_REG

__IOM uint32_t DMA_Type::DMA0_LEN_REG

(@ 0x0000000C) Transfer length register of DMA channel 0

◆ DMA1_A_START_REG

__IOM uint32_t DMA_Type::DMA1_A_START_REG

(@ 0x00000020) Source address register of DMA channel 1

◆ DMA1_B_START_REG

__IOM uint32_t DMA_Type::DMA1_B_START_REG

(@ 0x00000024) Destination address register of DMA channel 1

◆ DMA1_CTRL_REG

__IOM uint32_t DMA_Type::DMA1_CTRL_REG

(@ 0x00000030) Control register of DMA channel 1

◆ DMA1_IDX_REG

__IOM uint32_t DMA_Type::DMA1_IDX_REG

(@ 0x00000034) Index pointer register of DMA channel 1

◆ DMA1_INT_REG

__IOM uint32_t DMA_Type::DMA1_INT_REG

(@ 0x00000028) Interrupt length register of DMA channel 1

◆ DMA1_LEN_REG

__IOM uint32_t DMA_Type::DMA1_LEN_REG

(@ 0x0000002C) Transfer length register of DMA channel 1

◆ DMA2_A_START_REG

__IOM uint32_t DMA_Type::DMA2_A_START_REG

(@ 0x00000040) Source address register of DMA channel 2

◆ DMA2_B_START_REG

__IOM uint32_t DMA_Type::DMA2_B_START_REG

(@ 0x00000044) Destination address register of DMA channel 2

◆ DMA2_CTRL_REG

__IOM uint32_t DMA_Type::DMA2_CTRL_REG

(@ 0x00000050) Control register of DMA channel 2

◆ DMA2_IDX_REG

__IOM uint32_t DMA_Type::DMA2_IDX_REG

(@ 0x00000054) Index pointer register of DMA channel 2

◆ DMA2_INT_REG

__IOM uint32_t DMA_Type::DMA2_INT_REG

(@ 0x00000048) Interrupt length register of DMA channel 2

◆ DMA2_LEN_REG

__IOM uint32_t DMA_Type::DMA2_LEN_REG

(@ 0x0000004C) Transfer length register of DMA channel 2

◆ DMA3_A_START_REG

__IOM uint32_t DMA_Type::DMA3_A_START_REG

(@ 0x00000060) Source address register of DMA channel 3

◆ DMA3_B_START_REG

__IOM uint32_t DMA_Type::DMA3_B_START_REG

(@ 0x00000064) Destination address register of DMA channel 3

◆ DMA3_CTRL_REG

__IOM uint32_t DMA_Type::DMA3_CTRL_REG

(@ 0x00000070) Control register of DMA channel 3

◆ DMA3_IDX_REG

__IOM uint32_t DMA_Type::DMA3_IDX_REG

(@ 0x00000074) Index pointer register of DMA channel 3

◆ DMA3_INT_REG

__IOM uint32_t DMA_Type::DMA3_INT_REG

(@ 0x00000068) Interrupt length register of DMA channel 3

◆ DMA3_LEN_REG

__IOM uint32_t DMA_Type::DMA3_LEN_REG

(@ 0x0000006C) Transfer length register of DMA channel 3

◆ DMA4_A_START_REG

__IOM uint32_t DMA_Type::DMA4_A_START_REG

(@ 0x00000080) Source address register of DMA channel 4

◆ DMA4_B_START_REG

__IOM uint32_t DMA_Type::DMA4_B_START_REG

(@ 0x00000084) Destination address register of DMA channel 4

◆ DMA4_CTRL_REG

__IOM uint32_t DMA_Type::DMA4_CTRL_REG

(@ 0x00000090) Control register of DMA channel 4

◆ DMA4_IDX_REG

__IOM uint32_t DMA_Type::DMA4_IDX_REG

(@ 0x00000094) Index pointer register of DMA channel 4

◆ DMA4_INT_REG

__IOM uint32_t DMA_Type::DMA4_INT_REG

(@ 0x00000088) Interrupt length register of DMA channel 4

◆ DMA4_LEN_REG

__IOM uint32_t DMA_Type::DMA4_LEN_REG

(@ 0x0000008C) Transfer length register of DMA channel 4

◆ DMA5_A_START_REG

__IOM uint32_t DMA_Type::DMA5_A_START_REG

(@ 0x000000A0) Source address register of DMA channel 5

◆ DMA5_B_START_REG

__IOM uint32_t DMA_Type::DMA5_B_START_REG

(@ 0x000000A4) Destination address register of DMA channel 5

◆ DMA5_CTRL_REG

__IOM uint32_t DMA_Type::DMA5_CTRL_REG

(@ 0x000000B0) Control register of DMA channel 5

◆ DMA5_IDX_REG

__IOM uint32_t DMA_Type::DMA5_IDX_REG

(@ 0x000000B4) Index pointer register of DMA channel 5

◆ DMA5_INT_REG

__IOM uint32_t DMA_Type::DMA5_INT_REG

(@ 0x000000A8) Interrupt length register of DMA channel 5

◆ DMA5_LEN_REG

__IOM uint32_t DMA_Type::DMA5_LEN_REG

(@ 0x000000AC) Transfer length register of DMA channel 5

◆ DMA_CLEAR_INT_REG

__IOM uint32_t DMA_Type::DMA_CLEAR_INT_REG

(@ 0x00000108) DMA Interrupt clear register

◆ DMA_INT_MASK_REG

__IOM uint32_t DMA_Type::DMA_INT_MASK_REG

(@ 0x0000010C) DMA Interrupt mask register

◆ DMA_INT_STATUS_REG

__IOM uint32_t DMA_Type::DMA_INT_STATUS_REG

(@ 0x00000104) DMA Interrupt status register

◆ DMA_REQ_MUX_REG

__IOM uint32_t DMA_Type::DMA_REQ_MUX_REG

(@ 0x00000100) DMA channels peripherals mapping register

◆ DMA_RESET_INT_MASK_REG

__IOM uint32_t DMA_Type::DMA_RESET_INT_MASK_REG

(@ 0x00000114) DMA Reset Interrupt mask register

◆ DMA_SET_INT_MASK_REG

__IOM uint32_t DMA_Type::DMA_SET_INT_MASK_REG

(@ 0x00000110) DMA Set Interrupt mask register

The documentation for this struct was generated from the following file:

sdk/bsp/include/DA1459x-00.h

Data Fields