hw_clk.h

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#ifndef HW_CLK_H_
#define HW_CLK_H_
 
 
#if dg_configUSE_HW_CLK
 
#include "sdk_defs.h"
 
typedef enum lp_clk_is_type {
        LP_CLK_IS_RCLP = 0,
        LP_CLK_IS_RCX,
        LP_CLK_IS_XTAL32K,
        LP_CLK_IS_EXTERNAL,
        LP_CLK_IS_INVALID
} lp_clk_is_t;
 
typedef enum ahbdiv_type {
        ahb_div1 = 0,           
        ahb_div2,               
        ahb_div4,               
        ahb_div8,               
        ahb_div16,              
        ahb_invalid
} ahb_div_t;
 
typedef enum apbdiv_type {
        apb_div1 = 0,           
        apb_div2,               
        apb_div4,               
        apb_div8,               
        apb_invalid
} apb_div_t;
 
__STATIC_FORCEINLINE ahb_div_t hw_clk_get_hclk_div(void)
{
        return REG_GETF(CRG_TOP, CLK_AMBA_REG, HCLK_DIV);
}
 
__STATIC_FORCEINLINE apb_div_t hw_clk_get_pclk_div(void)
{
        return REG_GETF(CRG_TOP, CLK_AMBA_REG, PCLK_DIV);
}
 
        #include "hw_clk_da1459x.h"
 
 
__STATIC_FORCEINLINE void hw_clk_set_pclk_div(apb_div_t div)
{
        ASSERT_WARNING(div <= apb_div8);
 
 
        GLOBAL_INT_DISABLE();
        REG_SETF(CRG_TOP, CLK_AMBA_REG, PCLK_DIV, div);
        GLOBAL_INT_RESTORE();
}
 
__STATIC_INLINE void hw_clk_set_lpclk(lp_clk_is_t mode)
{
        GLOBAL_INT_DISABLE();
        switch (mode) {
        case LP_CLK_IS_RCLP:
                hw_clk_lp_set_rclp();
                break;
        case LP_CLK_IS_RCX:
                hw_clk_lp_set_rcx();
                break;
        case LP_CLK_IS_XTAL32K:
                hw_clk_lp_set_xtal32k();
                break;
        case LP_CLK_IS_EXTERNAL:
                hw_clk_lp_set_ext32k();
                break;
        default:
                ASSERT_WARNING(0);
                break;
        }
        GLOBAL_INT_RESTORE();
}
 
__STATIC_INLINE bool hw_clk_lpclk_is(lp_clk_is_t clk)
{
        switch (clk) {
        case LP_CLK_IS_RCLP:
                return hw_clk_lp_is_rclp();
        case LP_CLK_IS_RCX:
                return hw_clk_lp_is_rcx();
        case LP_CLK_IS_XTAL32K:
                return hw_clk_lp_is_xtal32k();
        case LP_CLK_IS_EXTERNAL:
                return hw_clk_lp_is_external();
        default:
                /* An invalid clock is requested */
                ASSERT_WARNING(0);
                return false;
        }
}
 
__STATIC_INLINE lp_clk_is_t hw_clk_get_lpclk(void)
{
        lp_clk_is_t lp_clk;
        for (lp_clk = 0; lp_clk < LP_CLK_IS_INVALID; lp_clk++) {
                if (hw_clk_lpclk_is(lp_clk)) {
                        return lp_clk;
                }
        }
        ASSERT_WARNING(0);
        return LP_CLK_IS_INVALID;
}
 
__STATIC_INLINE void hw_clk_configure_lpclk(lp_clk_is_t clk)
{
        switch (clk) {
        case LP_CLK_IS_RCLP:
                // Nothing to do for RCLP
                return;
        case LP_CLK_IS_RCX:
                hw_clk_configure_rcx();
                return;
        case LP_CLK_IS_XTAL32K:
                hw_clk_configure_xtal32k();
                return;
        case LP_CLK_IS_EXTERNAL:
                // Nothing to do for external LP clock
                return;
        default:
                /* An invalid clock is requested */
                ASSERT_WARNING(0);
        }
}
 
__STATIC_INLINE void hw_clk_enable_lpclk(lp_clk_is_t clk)
{
        switch (clk) {
        case LP_CLK_IS_RCLP:
                hw_clk_enable_rclp();
                return;
        case LP_CLK_IS_RCX:
                hw_clk_enable_rcx();
                return;
        case LP_CLK_IS_XTAL32K:
                hw_clk_enable_xtal32k();
                return;
        case LP_CLK_IS_EXTERNAL:
                // Nothing to do for external LP clock
                return;
        default:
                /* An invalid clock is requested */
                ASSERT_WARNING(0);
        }
}
 
__STATIC_INLINE void hw_clk_disable_lpclk(lp_clk_is_t clk)
{
        switch (clk) {
        case LP_CLK_IS_RCLP:
                hw_clk_disable_rclp();
                return;
        case LP_CLK_IS_RCX:
                hw_clk_disable_rcx();
                return;
        case LP_CLK_IS_XTAL32K:
                hw_clk_disable_xtal32k();
                return;
        case LP_CLK_IS_EXTERNAL:
                // Nothing to do for external LP clock
                return;
        default:
                /* An invalid clock is requested */
                ASSERT_WARNING(0);
        }
}
 
__STATIC_FORCEINLINE uint32_t hw_clk_get_sys_clk_freq(sys_clk_t sys_clk)
{
        switch (sys_clk) {
        case sysclk_RC32:
                return dg_configRC32M_FREQ;
        case sysclk_XTAL32M:
                return dg_configXTAL32M_FREQ;
        case sysclk_DBLR64:
                return dg_configDBLR64M_FREQ;
        default:
                ASSERT_WARNING(0);
                return 0;
        }
}
 
 
__RETAINED_CODE void hw_clk_delay_usec(uint32_t usec);
 
__RETAINED_CODE uint32_t hw_clk_get_sysclk_freq(void);
 
#endif /* dg_configUSE_HW_CLK */
#endif /* HW_CLK_H_ */