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SmartSnippets DA1459x SDK
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Serial Peripheral Interface (SPI) Low Level Driver (LLD) API definition. More...
Go to the source code of this file.
Data Structures | |
| struct | SPI_Pad |
| SPI chip-select pin definition. More... | |
| struct | hw_spi_config_t |
| SPI configuration. More... | |
Macros | |
| #define | HW_SPI1 ((void *)SPI_BASE) |
| SPI controller number. More... | |
| #define | HW_SPI_DMA_SUPPORT dg_configSPI_DMA_SUPPORT |
| DMA support for SPI. | |
| #define | HW_SPI1_USE_FIXED_WORD_SIZE (0) |
| Use predefined (fixed) word size to optimize performance. More... | |
| #define | HW_SPI_REG_SETF(id, reg, field, val) |
| Write a value to an SPI register field. More... | |
| #define | HW_SPI_REG_GETF(id, reg, field) ((SBA(id)->reg & (SPI_##reg##_##field##_Msk)) >> (SPI_##reg##_##field##_Pos)) |
| Get the value of an SPI register field. More... | |
| #define | HW_SPI_REG_SET_FIELD(reg, field, var, val) REG_SET_FIELD(SPI, reg##_REG, field, var, val) |
| Sets a field value of an SPI register. Aimed to be used with local variables. More... | |
| #define | HW_SPI_ASSERT(id) |
| Assertion for SPI control fields. More... | |
Typedefs | |
| typedef uint8_t | HW_SPI_FREQ |
| Source clock's divider for the selected SPI clock frequency. More... | |
Functions | |
| __STATIC_INLINE uint16_t | hw_spi_fifo_read16 (HW_SPI_ID id) |
| Read 4 to 16-bits from RX FIFO. More... | |
| __STATIC_INLINE void | hw_spi_fifo_write16 (HW_SPI_ID id, uint16_t data) |
| Write 4 to 16-bits to TX FIFO. More... | |
| __STATIC_INLINE uint8_t | hw_spi_fifo_read8 (HW_SPI_ID id) |
| Read 4 to 8-bits from RX FIFO. More... | |
| __STATIC_INLINE void | hw_spi_fifo_write8 (HW_SPI_ID id, uint8_t data) |
| Write 4 to 8-bits to TX FIFO. More... | |
| __STATIC_INLINE uint32_t | hw_spi_fifo_read32 (HW_SPI_ID id) |
| Read 4 to 32-bits from RX FIFO. More... | |
| __STATIC_INLINE void | hw_spi_fifo_write32 (HW_SPI_ID id, uint32_t data) |
| Write 4 to 32-bits to TX FIFO. More... | |
| uint16_t | hw_spi_writeread (HW_SPI_ID id, uint16_t val) |
| Writes/reads 4 to 16 bits to the SPI. More... | |
| uint32_t | hw_spi_writeread32 (HW_SPI_ID id, uint32_t val) |
| Writes/reads 4 to 32 bits to the SPI. More... | |
| void | hw_spi_writeread_buf (HW_SPI_ID id, const uint8_t *out_buf, uint8_t *in_buf, uint16_t len, hw_spi_tx_callback cb, void *user_data) |
| Write and reads array of bytes through SPI. More... | |
| void | hw_spi_write_buf (HW_SPI_ID id, const uint8_t *out_buf, uint16_t len, hw_spi_tx_callback cb, void *user_data) |
| Write array of bytes to SPI. More... | |
| void | hw_spi_read_buf (HW_SPI_ID id, uint8_t *in_buf, uint16_t len, hw_spi_tx_callback cb, void *user_data) |
| Reads array of bytes through SPI. More... | |
| __STATIC_INLINE HW_SPI_FIFO_TL | hw_spi_get_fifo_depth_in_bytes (const HW_SPI_ID id) |
| Get SPI fifo depth in bytes. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg (HW_SPI_ID id, uint32_t val) |
| Set SPI Control Register Value. More... | |
| __STATIC_INLINE uint32_t | hw_spi_get_ctrl_reg (HW_SPI_ID id) |
| Get SPI Control Register Value. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_clear_enable (HW_SPI_ID id) |
| Set SPI Control Register Value to clear SPI enable. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_spi_en (HW_SPI_ID id, bool spi_enable) |
| Set SPI_EN in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_spi_en (HW_SPI_ID id) |
| Get SPI_EN from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_tx_en (HW_SPI_ID id, bool spi_tx_enable) |
| Set SPI_TX_EN in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_tx_en (HW_SPI_ID id) |
| Get SPI_TX_EN from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_rx_en (HW_SPI_ID id, bool spi_rx_enable) |
| Set SPI_RX_EN in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_rx_en (HW_SPI_ID id) |
| Get SPI_RX_EN from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_dma_tx_en (HW_SPI_ID id, bool spi_dma_tx_enable) |
| Set SPI_DMA_TX_EN in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_dma_tx_en (HW_SPI_ID id) |
| Get SPI_DMA_TX_EN from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_dma_rx_en (HW_SPI_ID id, bool spi_dma_rx_enable) |
| Set SPI_DMA_RX_EN in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_dma_rx_en (HW_SPI_ID id) |
| Get SPI_DMA_RX_EN from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_fifo_reset (HW_SPI_ID id, bool spi_fifo_reset) |
| Set SPI_FIFO_RESET in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_fifo_reset (HW_SPI_ID id) |
| Get SPI_FIFO_RESET from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_capture_next_edge (HW_SPI_ID id, HW_SPI_MASTER_EDGE_CAPTURE capture_next_edge) |
| Set SPI_CAPTURE_AT_NEXT_EDGE in Control Register. More... | |
| __STATIC_INLINE HW_SPI_MASTER_EDGE_CAPTURE | hw_spi_get_ctrl_reg_capture_next_edge (HW_SPI_ID id) |
| Get SPI_CAPTURE_AT_NEXT_EDGE from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_ctrl_reg_swap_bytes (HW_SPI_ID id, bool swap_bytes) |
| Set SPI_SWAP_BYTES in Control Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_ctrl_reg_swap_bytes (HW_SPI_ID id) |
| Get SPI_SWAP_BYTES from Control Register. More... | |
| __STATIC_INLINE void | hw_spi_set_config_reg (HW_SPI_ID id, uint32_t spi_config_reg) |
| Set SPI Configuration Register Value. More... | |
| __STATIC_INLINE uint32_t | hw_spi_get_config_reg (HW_SPI_ID id) |
| Get SPI Configuration Register Value. More... | |
| __STATIC_INLINE void | hw_spi_set_config_reg_spi_mode (HW_SPI_ID id, HW_SPI_MODE_CPOL_CPHA spi_cp) |
| Set SPI_MODE in Configuration Register. More... | |
| __STATIC_INLINE HW_SPI_MODE_CPOL_CPHA | hw_spi_get_config_reg_spi_mode (HW_SPI_ID id) |
| Get SPI_MODE from Configuration Register. More... | |
| __STATIC_INLINE void | hw_spi_set_config_reg_word_len (HW_SPI_ID id, HW_SPI_WORD spi_wsz) |
| Set SPI_WORD_LENGTH in Configuration Register. More... | |
| __STATIC_INLINE HW_SPI_WORD | hw_spi_get_config_reg_word_len (HW_SPI_ID id) |
| Get SPI_WORD_LENGTH from Configuration Register. More... | |
| __STATIC_INLINE void | hw_spi_set_config_reg_slave_en (HW_SPI_ID id, HW_SPI_MODE spi_ms) |
| Set SPI_SLAVE_EN in Configuration Register. More... | |
| __STATIC_INLINE HW_SPI_MODE | hw_spi_get_config_reg_slave_en (HW_SPI_ID id) |
| Get SPI Master/Slave mode from Configuration Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_clock_en (const HW_SPI_ID id) |
| Check if the SPI clock is enabled. More... | |
| __STATIC_INLINE void | hw_spi_set_clock_reg (HW_SPI_ID id, uint8_t spi_clock_reg) |
| Set SPI Clock Register Value. More... | |
| __STATIC_INLINE uint8_t | hw_spi_get_clock_reg (HW_SPI_ID id) |
| Get SPI Clock Register Value. More... | |
| __STATIC_INLINE void | hw_spi_set_clock_reg_clk_div (HW_SPI_ID id, HW_SPI_FREQ spi_clk_div) |
| Set SPI_CLK_DIV in Clock Register Applicable only in master mode. Defines the spi clock frequency in master only mode. More... | |
| __STATIC_INLINE HW_SPI_FREQ | hw_spi_get_clock_reg_clk_div (HW_SPI_ID id) |
| Get SPI_CLK_DIV from Configuration Register. More... | |
| __STATIC_INLINE void | hw_spi_set_fifo_config_reg (HW_SPI_ID id, uint8_t val) |
| Set SPI FIFO Configuration Register Value. More... | |
| __STATIC_INLINE uint32_t | hw_spi_get_fifo_config_reg (HW_SPI_ID id) |
| Get SPI FIFO Configuration Register Value. More... | |
| __STATIC_INLINE void | hw_spi_set_fifo_config_reg_tx_tl (HW_SPI_ID id, HW_SPI_FIFO_TL spi_tx_tl) |
| Set SPI_TX_TL in FIFO Configuration Register. More... | |
| __STATIC_INLINE HW_SPI_FIFO_TL | hw_spi_get_fifo_config_reg_tx_tl (HW_SPI_ID id) |
| Get SPI_TX_TL from FIFO Configuration Register. More... | |
| __STATIC_INLINE void | hw_spi_set_fifo_config_reg_rx_tl (HW_SPI_ID id, HW_SPI_FIFO_TL spi_rx_tl) |
| Set SPI_RX_TL in FIFO Configuration Register. More... | |
| __STATIC_INLINE HW_SPI_FIFO_TL | hw_spi_get_fifo_config_reg_rx_tl (HW_SPI_ID id) |
| Get SPI_RX_TL from FIFO Configuration Register. More... | |
| __STATIC_INLINE void | hw_spi_set_irq_mask_reg_tx_empty_en (HW_SPI_ID id, HW_SPI_MINT irq_tx_empty_en) |
| Set SPI_IRQ_MASK_TX_EMPTY in IRQ Mask Register. More... | |
| __STATIC_INLINE HW_SPI_MINT | hw_spi_get_irq_mask_reg_tx_empty_en (HW_SPI_ID id) |
| Get SPI_IRQ_MASK_TX_EMPTY from IRQ Mask Register. More... | |
| __STATIC_INLINE void | hw_spi_set_irq_mask_reg_rx_full_en (HW_SPI_ID id, HW_SPI_MINT irq_rx_full_en) |
| Set SPI_IRQ_MASK_RX_FULL in IRQ Mask Register. More... | |
| __STATIC_INLINE HW_SPI_MINT | hw_spi_get_irq_mask_reg_rx_full_en (HW_SPI_ID id) |
| Get SPI_IRQ_MASK_RX_FULL from IRQ Mask Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_status_reg_tx_fifo_empty (HW_SPI_ID id) |
| Get SPI TX FIFO Empty status from Status Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_status_reg_rx_fifo_full (HW_SPI_ID id) |
| Get SPI RX FIFO Full status from Status Register. More... | |
| __STATIC_INLINE uint16_t | hw_spi_get_fifo_status_reg (HW_SPI_ID id) |
| Get SPI FIFO status. More... | |
| __STATIC_INLINE bool | hw_spi_get_fifo_status_reg_transaction_active (HW_SPI_ID id) |
| Get SPI transaction status from Status Register. More... | |
| __STATIC_INLINE uint8_t | hw_spi_get_fifo_status_reg_tx_fifo_level (HW_SPI_ID id) |
| Get SPI TX FIFO level from FIFO Status Register. More... | |
| __STATIC_INLINE bool | hw_spi_get_fifo_status_reg_rx_empty (HW_SPI_ID id) |
| Get SPI RX FIFO Empty status from FIFO Status Register. More... | |
| __STATIC_INLINE uint8_t | hw_spi_get_fifo_status_reg_rx_fifo_level (HW_SPI_ID id) |
| Get SPI RX FIFO level from FIFO Status Register. More... | |
| __STATIC_INLINE uint8_t | hw_spi_get_fifo_status_reg_rx_fifo_overflow (HW_SPI_ID id) |
| Get SPI RX FIFO overflow status from FIFO Status Register. More... | |
| __STATIC_INLINE uint32_t | hw_spi_get_fifo_read_reg (HW_SPI_ID id) |
| Read RX FIFO. Read access is permitted only if SPI_RX_FIFO_EMPTY = 0. More... | |
| __STATIC_INLINE void | hw_spi_set_fifo_write_reg (HW_SPI_ID id, uint32_t tx_data) |
| Write to TX FIFO. Write access is permitted only if SPI_TX_FIFO_FULL is 0. More... | |
| __STATIC_INLINE void | hw_spi_set_cs_config_reg_mode (HW_SPI_ID id, HW_SPI_CS_MODE cs_mode) |
| Set CS output in master mode. More... | |
| __STATIC_INLINE HW_SPI_CS_MODE | hw_spi_get_cs_config_reg_mode (HW_SPI_ID id) |
| Get CS output in master mode. More... | |
| __STATIC_INLINE void | hw_spi_set_txbuffer_force_reg (HW_SPI_ID id, uint32_t tx_data) |
| Write SPI_TXBUFFER_FORCE_REG Register. More... | |
| __STATIC_INLINE void | hw_spi_enable_interrupt (HW_SPI_ID id) |
| Enables the SPI maskable interrupt (MINT) to the CPU. More... | |
| __STATIC_INLINE void | hw_spi_disable_interrupt (HW_SPI_ID id) |
| Disables the SPI maskable interrupt (MINT) to the CPU. More... | |
| __STATIC_INLINE HW_SPI_MINT | hw_spi_is_interrupt_enabled (HW_SPI_ID id) |
| Get the status of the SPI maskable interrupt (MINT) to the CPU. More... | |
| __STATIC_INLINE void | hw_spi_enable (HW_SPI_ID id, uint8_t on) |
| Switch the SPI module on and off. More... | |
| __STATIC_INLINE uint8_t | hw_spi_is_enabled (HW_SPI_ID id) |
| Get the on/off status of the SPI module. More... | |
| __STATIC_INLINE void | hw_spi_set_clock_freq (HW_SPI_ID id, HW_SPI_FREQ freq) |
| Set SPI source clock's divider for the selected SPI clock frequency. More... | |
| __STATIC_INLINE HW_SPI_FREQ | hw_spi_get_clock_freq (HW_SPI_ID id) |
| Get SPI source clock's divider for the selected SPI clock frequency. More... | |
| __STATIC_INLINE void | hw_spi_set_mode (HW_SPI_ID id, HW_SPI_MODE smn) |
| Set SPI master/slave mode. More... | |
| __STATIC_INLINE HW_SPI_MODE | hw_spi_is_slave (HW_SPI_ID id) |
| Get the SPI master/slave mode. More... | |
| __STATIC_INLINE void | hw_spi_set_word_size (HW_SPI_ID id, HW_SPI_WORD word) |
| Set SPI word mode. More... | |
| __STATIC_INLINE HW_SPI_WORD | hw_spi_get_word_size (HW_SPI_ID id) |
| Get the SPI word mode. More... | |
| __STATIC_INLINE uint32_t | hw_spi_get_memory_word_size (HW_SPI_ID id) |
| Get the SPI word size. More... | |
| __STATIC_INLINE bool | hw_spi_is_tx_fifo_full (HW_SPI_ID id) |
| Get the value of the SPI TX FIFO full bit. More... | |
| void | hw_spi_init_clk_reg (const HW_SPI_ID id, bool select_divn) |
| Initialize peripheral divider register - select clock source and enable SPI clock. More... | |
| void | hw_spi_deinit_clk_reg (const HW_SPI_ID id) |
| De-initialize peripheral divider register - disable SPI clock. More... | |
| void | hw_spi_init (HW_SPI_ID id, const hw_spi_config_t *cfg) |
| Initialize the SPI module. More... | |
| void | hw_spi_set_cs_pad (HW_SPI_ID id, const SPI_Pad *pad, HW_SPI_CS_MODE cs_mode, bool validate) |
| Set SPI GPIO Chip Select (CS) Pad. More... | |
| void | hw_spi_set_cs_low (HW_SPI_ID id) |
| Set SPI CS low. More... | |
| void | hw_spi_set_cs_high (HW_SPI_ID id) |
| Set SPI CS high. More... | |
| void | hw_spi_set_fifo_mode (HW_SPI_ID id, HW_SPI_FIFO mode) |
| Set SPI FIFO mode. More... | |
| HW_SPI_FIFO | hw_spi_get_fifo_mode (HW_SPI_ID id) |
| Get SPI FIFO mode. More... | |
| HW_SPI_FIFO | hw_spi_change_fifo_mode (HW_SPI_ID id, HW_SPI_FIFO mode) |
| Change SPI FIFO mode. More... | |
| __STATIC_INLINE uint8_t | hw_spi_is_busy (HW_SPI_ID id) |
| Get SPI busy status in master mode. More... | |
| __STATIC_INLINE void | hw_spi_wait_while_busy (HW_SPI_ID id) |
| Wait till SPI is not busy. More... | |
| void | hw_spi_deinit (HW_SPI_ID id) |
| Disables SPI controller. More... | |
| bool | hw_spi_is_occupied (const HW_SPI_ID id) |
| get SPI transaction status More... | |
Serial Peripheral Interface (SPI) Low Level Driver (LLD) API definition.
Copyright (C) 2015-2023 Renesas Electronics Corporation and/or its affiliates. All rights reserved. Confidential Information.
This software ("Software") is supplied by Renesas Electronics Corporation and/or its affiliates ("Renesas"). Renesas grants you a personal, non-exclusive, non-transferable, revocable, non-sub-licensable right and license to use the Software, solely if used in or together with Renesas products. You may make copies of this Software, provided this copyright notice and disclaimer ("Notice") is included in all such copies. Renesas reserves the right to change or discontinue the Software at any time without notice.
THE SOFTWARE IS PROVIDED "AS IS". RENESAS DISCLAIMS ALL WARRANTIES OF ANY KIND, WHETHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. TO THE MAXIMUM EXTENT PERMITTED UNDER LAW, IN NO EVENT SHALL RENESAS BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE, EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. USE OF THIS SOFTWARE MAY BE SUBJECT TO TERMS AND CONDITIONS CONTAINED IN AN ADDITIONAL AGREEMENT BETWEEN YOU AND RENESAS. IN CASE OF CONFLICT BETWEEN THE TERMS OF THIS NOTICE AND ANY SUCH ADDITIONAL LICENSE AGREEMENT, THE TERMS OF THE AGREEMENT SHALL TAKE PRECEDENCE. BY CONTINUING TO USE THIS SOFTWARE, YOU AGREE TO THE TERMS OF THIS NOTICE.IF YOU DO NOT AGREE TO THESE TERMS, YOU ARE NOT PERMITTED TO USE THIS SOFTWARE.
1.8.16