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SmartSnippets DA1459x SDK
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iCache Controller LLD common API More...
Files | |
| file | hw_cache.h |
| Definition of API for the iCache Controller Low Level Driver. | |
| file | hw_cache_da1459x.h |
| Definition of DA1459x specific API for the iCache Controller Low Level Driver. | |
Typedefs | |
| typedef void(* | hw_cache_mrm_cb_t) (void) |
| Application defined callback for the MRM interrupt. More... | |
Enumerations | |
| enum | HW_CACHE_EFLASH_REGION_SZ |
| Cacheable eflash Region Sizes as defined in DA1459x datasheet. More... | |
| enum | HW_CACHE_FLASH_REGION_SZ |
| Cacheable flash Region Sizes as defined in DA1459x datasheet. More... | |
Functions | |
| __STATIC_INLINE void | hw_cache_mrm_set_misses_thres (uint32_t thres) |
| Set the cache MRM interrupt threshold for misses. More... | |
| __STATIC_INLINE uint32_t | hw_cache_mrm_get_misses_thres (void) |
| Get the cache MRM interrupt threshold for misses. More... | |
| __STATIC_INLINE void | hw_cache_mrm_set_hits_thres (uint32_t thres) |
| Set the cache MRM interrupt threshold for hits. More... | |
| __STATIC_INLINE uint32_t | hw_cache_mrm_get_hits_thres (void) |
| Get the cache MRM interrupt threshold for hits. More... | |
| __STATIC_INLINE bool | hw_cache_mrm_get_misses_thres_status (void) |
| Get the cache MRM misses threshold IRQ status. More... | |
| __STATIC_INLINE void | hw_cache_mrm_clr_misses_thres_status (void) |
| Clear the cache MRM misses threshold IRQ status. More... | |
| __STATIC_INLINE bool | hw_cache_mrm_get_hits_thres_status (void) |
| Get the cache MRM hits threshold IRQ status. More... | |
| __STATIC_INLINE void | hw_cache_mrm_clr_hits_thres_status (void) |
| Clear the cache MRM hits threshold IRQ status. More... | |
| __STATIC_INLINE void | hw_cache_mrm_set_tint (uint32_t tint) |
| Set the cache MRM monitoring time interval. More... | |
| __STATIC_INLINE uint32_t | hw_cache_mrm_get_tint (void) |
| Get the cache MRM monitoring time interval. More... | |
| __STATIC_INLINE bool | hw_cache_mrm_get_tint_status (void) |
| Get the cache MRM timer interval IRQ status. More... | |
| __STATIC_INLINE void | hw_cache_mrm_clr_tint_status (void) |
| Clear the cache MRM timer interval IRQ status. More... | |
| __STATIC_INLINE void | hw_cache_mrm_start_counters (void) |
| Start MRM counters. More... | |
| __STATIC_INLINE void | hw_cache_mrm_freeze_counters (void) |
| Freeze MRM counters. More... | |
| __STATIC_INLINE uint32_t | hw_cache_mrm_get_misses (void) |
| Get the cache MRM misses number. More... | |
| __STATIC_INLINE void | hw_cache_mrm_set_misses (uint32_t misses) |
| Set the cache MRM cache misses number. More... | |
| __STATIC_INLINE uint32_t | hw_cache_mrm_get_hits (void) |
| Get the cache MRM cache hits number. More... | |
| __STATIC_INLINE void | hw_cache_mrm_set_hits (uint32_t hits) |
| Set the cache MRM cache hits number. More... | |
| void | hw_cache_mrm_enable_interrupt (hw_cache_mrm_cb_t cb) |
| Enable the MRM interrupt generation. More... | |
| void | hw_cache_mrm_disable_interrupt (void) |
| Disable the MRM interrupt generation. More... | |
| __STATIC_INLINE void | hw_cache_enable () |
| Enables the iCache Controller. More... | |
| __STATIC_INLINE void | hw_cache_disable () |
| Disables the iCache Controller. More... | |
| __STATIC_INLINE bool | hw_cache_is_enabled () |
| Checks if the iCache Controller is enabled. More... | |
| __STATIC_INLINE void | hw_cache_set_extflash_cacheable_len (uint32_t len) |
| Set the external (QSPI) flash cacheable memory length. More... | |
| __STATIC_INLINE int | hw_cache_get_extflash_cacheable_len (void) |
| Get the external (QSPI) flash cacheable memory length. More... | |
| __STATIC_INLINE void | hw_cache_set_eflash_cacheable_len (uint32_t len) |
| Set the eflash cacheable memory length. More... | |
| __STATIC_INLINE int | hw_cache_get_eflash_cacheable_len (void) |
| Get the eflash cacheable memory length. More... | |
| __STATIC_INLINE void | hw_cache_set_len (uint32_t len) |
| Set the cacheable memory length. Backwards compatibility wrapper. More... | |
| __STATIC_INLINE int | hw_cache_get_len (void) |
| Get the cacheable memory length. Backwards compatibility wrapper. More... | |
| __STATIC_INLINE void | hw_cache_enable_flushing (void) |
| Enable flushing the iCache Controller (cache RAM cells) contents. For debugging only. | |
| __STATIC_INLINE void | hw_cache_disable_flushing (void) |
| Disable flushing the iCache Controller (cache RAM cells) contents. For debugging only. | |
| __STATIC_INLINE bool | hw_cache_is_flushing_disabled () |
| Checks if the iCache Controller flushing is disabled. For debugging only. More... | |
| __STATIC_INLINE void | hw_cache_flush (void) |
| Flush the cache contents. More... | |
| __STATIC_INLINE void | hw_cache_eflash_set_region_base (eflash_region_base_t base) |
| Set the eflash region base. More... | |
| __STATIC_INLINE eflash_region_base_t | hw_cache_eflash_get_region_base (void) |
| Get the eflash region base. More... | |
| __STATIC_INLINE void | hw_cache_eflash_set_region_offset (eflash_region_offset_t offset) |
| Set the eflash region offset. More... | |
| __STATIC_INLINE eflash_region_offset_t | hw_cache_eflash_get_region_offset (void) |
| Get the eflash region offset. More... | |
| __STATIC_INLINE void | hw_cache_eflash_set_region_size (HW_CACHE_EFLASH_REGION_SZ sz) |
| Set the eflash region size. More... | |
| __STATIC_INLINE HW_CACHE_EFLASH_REGION_SZ | hw_cache_eflash_get_region_size (void) |
| Get the eflash region size. More... | |
| __STATIC_INLINE void | hw_cache_eflash_configure_region (eflash_region_base_t base, eflash_region_offset_t offset, HW_CACHE_EFLASH_REGION_SZ sz) |
| Configure the eflash memory region that will be cacheable. More... | |
| __STATIC_INLINE void | hw_cache_flash_set_region_base (flash_region_base_t base) |
| Set the flash region base. More... | |
| __STATIC_INLINE flash_region_base_t | hw_cache_flash_get_region_base (void) |
| Get the flash region base. More... | |
| __STATIC_INLINE void | hw_cache_flash_set_region_offset (flash_region_offset_t offset) |
| Set the flash region offset. More... | |
| __STATIC_INLINE flash_region_offset_t | hw_cache_flash_get_region_offset (void) |
| Get the flash region offset. More... | |
| __STATIC_INLINE void | hw_cache_flash_set_region_size (HW_CACHE_FLASH_REGION_SZ sz) |
| Set the flash region size. More... | |
| __STATIC_INLINE HW_CACHE_FLASH_REGION_SZ | hw_cache_flash_get_region_size (void) |
| Get the flash region size. More... | |
| __STATIC_INLINE void | hw_cache_flash_configure_region (flash_region_base_t base, flash_region_offset_t offset, HW_CACHE_FLASH_REGION_SZ sz) |
| Configure the flash memory region that will be cacheable. More... | |
| __STATIC_INLINE uint32_t | hw_cache_mrm_get_hits_with_one_wait_state (void) |
| Get the cache MRM hits with 1 Wait State number. More... | |
| __STATIC_INLINE void | hw_cache_mrm_set_hits_with_one_wait_state (uint32_t hits) |
| Set the cache MRM hits with 1 Wait State number. More... | |
iCache Controller LLD common API
iCache Controller DA1459x specific LLD API
| typedef void(* hw_cache_mrm_cb_t) (void) |
Application defined callback for the MRM interrupt.
Cacheable eflash Region Sizes as defined in DA1459x datasheet.
Cacheable flash Region Sizes as defined in DA1459x datasheet.
| __STATIC_INLINE void hw_cache_disable | ( | ) |
Disables the iCache Controller.
The iCache Controller is disabled by setting the CACHERAM_MUX to '0'. This action disables the corresponding HW block, bypassing the iCache Controller for all read requests and letting the RAM memory of the block be visible in the entire memory space.
| __STATIC_INLINE void hw_cache_eflash_configure_region | ( | eflash_region_base_t | base, |
| eflash_region_offset_t | offset, | ||
| HW_CACHE_EFLASH_REGION_SZ | sz | ||
| ) |
Configure the eflash memory region that will be cacheable.
This is an alternative API to hw_cache_eflash_set_region_base()/_size()/_offset(). It automatically configures the entire eflash region in one call.
See the relevant called functions for input parameter definition.
| __STATIC_INLINE eflash_region_base_t hw_cache_eflash_get_region_base | ( | void | ) |
Get the eflash region base.
| __STATIC_INLINE eflash_region_offset_t hw_cache_eflash_get_region_offset | ( | void | ) |
Get the eflash region offset.
| __STATIC_INLINE HW_CACHE_EFLASH_REGION_SZ hw_cache_eflash_get_region_size | ( | void | ) |
Get the eflash region size.
| __STATIC_INLINE void hw_cache_eflash_set_region_base | ( | eflash_region_base_t | base | ) |
Set the eflash region base.
| [in] | base | The eflash region base corresponds to the eflash address bits [31:16]. Default value is '0x00A0'. Bits [31:24] are fixed to '0x00'. Max value is thus 0x00FF and min 0x0000. |
| __STATIC_INLINE void hw_cache_eflash_set_region_offset | ( | eflash_region_offset_t | offset | ) |
Set the eflash region offset.
This value (expressed in words) is added to eflash region base (see hw_cache_eflash_set/get_region_base()) to calculate the the starting address within the eflash memory area that will be cacheable (remapped to 0x0) and XiPed.
| [in] | offset | eflash region offset in 32-bit words. Max: 0xFFF since the corresponding register bit field area is 3 nibbles in length. |
| __STATIC_INLINE void hw_cache_eflash_set_region_size | ( | HW_CACHE_EFLASH_REGION_SZ | sz | ) |
Set the eflash region size.
| [in] | sz | The eflash region size to use with the cache |
This is the size of the eflash memory that will be cached. The size starts from eflash region base (see hw_cache_eflash_set_region_base()) plus eflash region offset (see hw_cache_eflash_set_region_offset()).
| __STATIC_INLINE void hw_cache_enable | ( | ) |
Enables the iCache Controller.
The iCache Controller is enabled by setting the CACHERAM_MUX to '1'. This action enables the corresponding HW block, letting the RAM memory of the block be visible only to the iCache Controller for caching purposes.
| __STATIC_INLINE void hw_cache_flash_configure_region | ( | flash_region_base_t | base, |
| flash_region_offset_t | offset, | ||
| HW_CACHE_FLASH_REGION_SZ | sz | ||
| ) |
Configure the flash memory region that will be cacheable.
This is an alternative API to hw_cache_flash_set_region_base()/_size()/_offset(). It automatically configures the entire flash region in one call.
See the relevant called functions for input parameter definition.
| __STATIC_INLINE flash_region_base_t hw_cache_flash_get_region_base | ( | void | ) |
Get the flash region base.
| __STATIC_INLINE flash_region_offset_t hw_cache_flash_get_region_offset | ( | void | ) |
Get the flash region offset.
| __STATIC_INLINE HW_CACHE_FLASH_REGION_SZ hw_cache_flash_get_region_size | ( | void | ) |
Get the flash region size.
| __STATIC_INLINE void hw_cache_flash_set_region_base | ( | flash_region_base_t | base | ) |
Set the flash region base.
| [in] | base | The Flash region base corresponds to the flash address bits [31:16]. Bits [31:25] should be fixed to '0xb' and bits [17:16] should be fixed to '0x0'. Therefore, valid values are from 0x1600 to 0x17fc. This address should be 'size'-param aligned. |
| __STATIC_INLINE void hw_cache_flash_set_region_offset | ( | flash_region_offset_t | offset | ) |
Set the flash region offset.
This value (expressed in words) is added to flash region base (see hw_cache_flash_set/get_region_base()) to calculate the the starting address within the flash memory area that will be cacheable (remapped to 0x0) and XiPed.
| [in] | offset | flash region offset in 32-bit words. Max: 0xFFF since the corresponding register bit field area is 3 nibbles in length. |
| __STATIC_INLINE void hw_cache_flash_set_region_size | ( | HW_CACHE_FLASH_REGION_SZ | sz | ) |
Set the flash region size.
| [in] | sz | The flash region size to use with the cache |
This is the size of the flash memory that will be cached. The size starts from flash region base (see hw_cache_flash_set_region_base()) plus flash region offset (see hw_cache_flash_set_region_offset()).
| __STATIC_INLINE void hw_cache_flush | ( | void | ) |
Flush the cache contents.
Note: The very first flushing occurred after power on reset when the iCache Controller is enabled for the first time by the booter.
| __STATIC_INLINE int hw_cache_get_eflash_cacheable_len | ( | void | ) |
Get the eflash cacheable memory length.
| __STATIC_INLINE int hw_cache_get_extflash_cacheable_len | ( | void | ) |
Get the external (QSPI) flash cacheable memory length.
| __STATIC_INLINE int hw_cache_get_len | ( | void | ) |
Get the cacheable memory length. Backwards compatibility wrapper.
| __STATIC_INLINE bool hw_cache_is_enabled | ( | ) |
Checks if the iCache Controller is enabled.
| __STATIC_INLINE bool hw_cache_is_flushing_disabled | ( | ) |
Checks if the iCache Controller flushing is disabled. For debugging only.
| __STATIC_INLINE void hw_cache_mrm_clr_hits_thres_status | ( | void | ) |
Clear the cache MRM hits threshold IRQ status.
| __STATIC_INLINE void hw_cache_mrm_clr_misses_thres_status | ( | void | ) |
Clear the cache MRM misses threshold IRQ status.
| __STATIC_INLINE void hw_cache_mrm_clr_tint_status | ( | void | ) |
Clear the cache MRM timer interval IRQ status.
| void hw_cache_mrm_disable_interrupt | ( | void | ) |
Disable the MRM interrupt generation.
| void hw_cache_mrm_enable_interrupt | ( | hw_cache_mrm_cb_t | cb | ) |
Enable the MRM interrupt generation.
The application should define its own callback. The latter is registered and then invoked when the MRM interrupt is generated.
| [in] | cb | Callback defined by the application. |
| __STATIC_INLINE void hw_cache_mrm_freeze_counters | ( | void | ) |
Freeze MRM counters.
| __STATIC_INLINE uint32_t hw_cache_mrm_get_hits | ( | void | ) |
Get the cache MRM cache hits number.
| __STATIC_INLINE uint32_t hw_cache_mrm_get_hits_thres | ( | void | ) |
Get the cache MRM interrupt threshold for hits.
| __STATIC_INLINE bool hw_cache_mrm_get_hits_thres_status | ( | void | ) |
Get the cache MRM hits threshold IRQ status.
| __STATIC_INLINE uint32_t hw_cache_mrm_get_hits_with_one_wait_state | ( | void | ) |
Get the cache MRM hits with 1 Wait State number.
| __STATIC_INLINE uint32_t hw_cache_mrm_get_misses | ( | void | ) |
Get the cache MRM misses number.
| __STATIC_INLINE uint32_t hw_cache_mrm_get_misses_thres | ( | void | ) |
Get the cache MRM interrupt threshold for misses.
| __STATIC_INLINE bool hw_cache_mrm_get_misses_thres_status | ( | void | ) |
Get the cache MRM misses threshold IRQ status.
| __STATIC_INLINE uint32_t hw_cache_mrm_get_tint | ( | void | ) |
Get the cache MRM monitoring time interval.
| __STATIC_INLINE bool hw_cache_mrm_get_tint_status | ( | void | ) |
Get the cache MRM timer interval IRQ status.
| __STATIC_INLINE void hw_cache_mrm_set_hits | ( | uint32_t | hits | ) |
Set the cache MRM cache hits number.
This is primarily intended for clearing the hits number
| [in] | hits | The number of cache hits |
| __STATIC_INLINE void hw_cache_mrm_set_hits_thres | ( | uint32_t | thres | ) |
Set the cache MRM interrupt threshold for hits.
Defines the threshold (in hits) to trigger the interrupt generation. A value of 0 disables interrupt generation
| [in] | thres | The interrupt generation threshold (in hits) |
| __STATIC_INLINE void hw_cache_mrm_set_hits_with_one_wait_state | ( | uint32_t | hits | ) |
Set the cache MRM hits with 1 Wait State number.
This is primarily intended for clearing the register
| [in] | hits | The number of cache hits with 1 Wait State |
| __STATIC_INLINE void hw_cache_mrm_set_misses | ( | uint32_t | misses | ) |
Set the cache MRM cache misses number.
This is primarily intended for clearing the misses number
| [in] | misses | The number of cache misses |
| __STATIC_INLINE void hw_cache_mrm_set_misses_thres | ( | uint32_t | thres | ) |
Set the cache MRM interrupt threshold for misses.
Defines the threshold (in misses) to trigger the interrupt generation. A value of 0 disables interrupt generation
| [in] | thres | The interrupt generation threshold (in misses) |
| __STATIC_INLINE void hw_cache_mrm_set_tint | ( | uint32_t | tint | ) |
Set the cache MRM monitoring time interval.
Defines the time interval for the monitoring in 32 MHz clock cycles. Must be an 19-bit value max. When this time is reached, an interrupt will be generated. A value of 0 disables interrupt generation
| [in] | tint | Monitoring time interval in clock cycles |
| __STATIC_INLINE void hw_cache_mrm_start_counters | ( | void | ) |
Start MRM counters.
| __STATIC_INLINE void hw_cache_set_eflash_cacheable_len | ( | uint32_t | len | ) |
Set the eflash cacheable memory length.
| [in] | len | The eflash cacheable memory length, in 64KB blocks. The actual cacheable memory length will therefore be len * 64KB. Valid values: [0, 511]. A value of 0 sets the iCache Controller in bypass mode for the read requests targeting the cacheable eflash memory area. Any value greater than zero will set it in caching mode. |
| __STATIC_INLINE void hw_cache_set_extflash_cacheable_len | ( | uint32_t | len | ) |
Set the external (QSPI) flash cacheable memory length.
| [in] | len | The QSPI flash cacheable memory length, in 64KB blocks. The actual cacheable memory length will therefore be len * 64KB. Valid values: [0, 511]. A value of 0 sets the iCache Controller in bypass mode for the read requests targeting the cacheable QSPI flash memory area. Any value greater than zero will set it in caching mode. |
| __STATIC_INLINE void hw_cache_set_len | ( | uint32_t | len | ) |
Set the cacheable memory length. Backwards compatibility wrapper.
| [in] | len | See hw_cache_set_eflash_cacheable_len for details. |
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