PDM LLD provides a serial audio connection for 1 stereo or 2 mono input devices or outputs devices. More...

Files
file	hw_pdm.h
	Definition of API for the PDM Low Level Driver.

Data Structures
struct	hw_pdm_config_t
	PDM interface mode configuration. More...

Macros
#define	HW_PDM_CRG_REG_FIELD_MASK(reg, field) REG_MSK(CRG_AUD, PDM_##reg##_REG, field)
	Get the mask of a field of a PDM register of CRG. More...

#define	HW_PDM_CRG_REG_FIELD_POS(reg, field) REG_POS(CRG_AUD, PDM_##reg##_REG, field)
	Get the bit position of a field of a PDM register of CRG. More...

#define	HW_PDM_CRG_REG_GETF(reg, field) REG_GETF(CRG_AUD, PDM_##reg##_REG, field)
	Get the value of a field of a PDM register. More...

#define	HW_PDM_CRG_REG_SETF(reg, field, val) REG_SETF(CRG_AUD, PDM_##reg##_REG, field, val)
	Set the value of a field of a PDM register. More...

#define	HW_PDM_CRG_REG_SET_BIT(reg, field) REG_SET_BIT(CRG_AUD, PDM_##reg##_REG, field)
	Set a bit of a PDM register. More...

#define	HW_PDM_CRG_REG_CLR_BIT(reg, field) REG_CLR_BIT(CRG_AUD, PDM_##reg##_REG, field)
	Clear a bit of a PDM register. More...

#define	HW_PDM_SRC_REG_GETF(id, reg, field) HW_SRC_REG_GETF(id, SRC1, reg##_REG, field)
	Get the value of a field of a PDM register. More...

#define	HW_PDM_SRC_REG_SETF(id, reg, field, val) HW_SRC_REG_SETF(id, SRC1, reg##_REG, field, val)
	Set the value of a field of a PDM register. More...

#define	HW_PDM_SRC_REG_SET_BIT(id, reg, field) HW_SRC_REG_SET_BIT(id, SRC1, reg##_REG, field)
	Set a bit of a PDM register. More...

#define	HW_PDM_SRC_REG_CLR_BIT(id, reg, field) HW_SRC_REG_CLR_BIT(id, SRC1, reg##_REG, field)
	Clear a bit of a PDM register. More...

Enumerations
enum	HW_PDM_DATA_DIRECTION
	PDM data direction. More...

enum	HW_PDM_MODE { HW_PDM_SLAVE_MODE = 0, HW_PDM_MASTER_MODE }
	PDM Master/Slave mode. More...

enum	HW_PDM_DI_DELAY { HW_PDM_DI_NO_DELAY = 0, HW_PDM_DI_4_NS_DELAY, HW_PDM_DI_8_NS_DELAY, HW_PDM_DI_12_NS_DELAY }
	PDM input delay. More...

enum	HW_PDM_DO_DELAY { HW_PDM_DO_NO_DELAY = 0, HW_PDM_DO_8_NS_DELAY, HW_PDM_DO_12_NS_DELAY, HW_PDM_DO_16_NS_DELAY }
	PDM output delay. More...

enum	HW_PDM_CHANNEL_CONFIG { HW_PDM_CHANNEL_NONE = 0, HW_PDM_CHANNEL_R, HW_PDM_CHANNEL_L, HW_PDM_CHANNEL_LR }
	PDM output channel configuration. More...

enum	HW_PDM_MUX_OUT { HW_PDM_MUX_OUT_SRC1, HW_PDM_MUX_OUT_SRC2 }
	PDM output multiplexer. More...

Functions
__STATIC_INLINE HW_PDM_DI_DELAY	hw_pdm_get_input_delay (HW_SRC_ID id)
	Get input delay in PDM interface. More...

__STATIC_INLINE HW_PDM_DO_DELAY	hw_pdm_get_output_delay (HW_SRC_ID id)
	Get output delay in PDM interface. More...

__STATIC_INLINE HW_PDM_CHANNEL_CONFIG	hw_pdm_get_output_channel_config (HW_SRC_ID id)
	Get PDM output channel configuration. More...

__STATIC_INLINE HW_PDM_MODE	hw_pdm_get_mode (void)
	Get PDM Master/Slave mode. More...

__STATIC_INLINE bool	hw_pdm_get_status (void)
	Get PDM status. Supported only for Master mode. More...

__STATIC_INLINE uint8_t	hw_pdm_get_clk_div (void)
	Get PDM clock divider. More...

__STATIC_INLINE bool	hw_pdm_get_in_channel_swap (HW_SRC_ID id)
	Get the status of swap of the channels on the PDM input source. More...

__STATIC_INLINE bool	hw_pdm_get_out_channel_swap (HW_SRC_ID id)
	Get the status of swap of the channels on the PDM output source. More...

__STATIC_INLINE void	hw_pdm_enable (void)
	Enable PDM block system clock source used only for Master mode. More...

__STATIC_INLINE void	hw_pdm_disable (void)
	Disable PDM block system clock source. More...

__STATIC_INLINE void	hw_pdm_set_input_delay (HW_SRC_ID id, HW_PDM_DI_DELAY delay)
	Set input delay in PDM interface. More...

__STATIC_INLINE void	hw_pdm_set_output_delay (HW_SRC_ID id, HW_PDM_DO_DELAY delay)
	Set output delay in PDM interface. More...

__STATIC_INLINE void	hw_pdm_set_output_channel_config (HW_SRC_ID id, HW_PDM_CHANNEL_CONFIG channel_conf)
	Set PDM output channel configuration applicable only for SRC1, APU. More...

__STATIC_INLINE void	hw_pdm_set_mode (HW_PDM_MODE mode)
	Set PDM Master/Slave mode. More...

__STATIC_INLINE void	hw_pdm_set_in_channel_swap (HW_SRC_ID id, bool swap)
	Swap left and right channel on the PDM input source. More...

__STATIC_INLINE void	hw_pdm_set_out_channel_swap (HW_SRC_ID id, bool swap)
	Swap left and right channel on the PDM output source. More...

__STATIC_INLINE void	hw_pdm_set_pdm_output_mux (HW_PDM_MUX_OUT output)
	Set output for the PDM_MUX_OUT multiplexer. More...

__STATIC_INLINE HW_PDM_MUX_OUT	hw_pdm_get_pdm_output_mux (void)
	Get output for the PDM_MUX_OUT multiplexer. More...

uint32_t	hw_pdm_clk_init (uint32_t frequency)
	Initialize PDM clock. More...

void	hw_pdm_init (HW_SRC_ID id, hw_pdm_config_t *config)
	Initialize PDM interface. More...

Detailed Description

PDM LLD provides a serial audio connection for 1 stereo or 2 mono input devices or outputs devices.

Macro Definition Documentation

◆ HW_PDM_CRG_REG_CLR_BIT

#define HW_PDM_CRG_REG_CLR_BIT	(	reg,
		field
	)	REG_CLR_BIT(CRG_AUD, PDM_##reg##_REG, field)

Clear a bit of a PDM register.

Parameters

[in]	reg	is the register to access
[in]	field	is the register field to write

◆ HW_PDM_CRG_REG_FIELD_MASK

#define HW_PDM_CRG_REG_FIELD_MASK	(	reg,
		field
	)	REG_MSK(CRG_AUD, PDM_##reg##_REG, field)

Get the mask of a field of a PDM register of CRG.

Parameters

[in]	reg	is the register to access
[in]	field	is the register field to access

Note

The stripped register name should be provided, e.g.:

to get CRG_PER_PDM_DIV_REG_PDM_DIV_Ms, use HW_PDM_CRG_REG_FIELD_MASK(DIV, PDM_DIV)

◆ HW_PDM_CRG_REG_FIELD_POS

#define HW_PDM_CRG_REG_FIELD_POS	(	reg,
		field
	)	REG_POS(CRG_AUD, PDM_##reg##_REG, field)

Get the bit position of a field of a PDM register of CRG.

Parameters

[in]	reg	is the register to access
[in]	field	is the register field to access

Note

The stripped register name should be provided, e.g.:

to get CRG_PER_PDM_DIV_REG_PDM_DIV_Pos, use HW_PDM_CRG_REG_FIELD_POS(DIV, PDM_DIV)

◆ HW_PDM_CRG_REG_GETF

#define HW_PDM_CRG_REG_GETF	(	reg,
		field
	)	REG_GETF(CRG_AUD, PDM_##reg##_REG, field)

Get the value of a field of a PDM register.

Parameters

[in]	reg	is the register to access
[in]	field	is the register field to read

Returns: the value of the register field

◆ HW_PDM_CRG_REG_SET_BIT

#define HW_PDM_CRG_REG_SET_BIT	(	reg,
		field
	)	REG_SET_BIT(CRG_AUD, PDM_##reg##_REG, field)

Set a bit of a PDM register.

Parameters

[in]	reg	is the register to access
[in]	field	is the register field to write

◆ HW_PDM_CRG_REG_SETF

#define HW_PDM_CRG_REG_SETF	(	reg,
		field,
		val
	)	REG_SETF(CRG_AUD, PDM_##reg##_REG, field, val)

Set the value of a field of a PDM register.

Parameters

[in]	reg	is the register to access
[in]	field	is the register field to write
[in]	val	is the value to write

◆ HW_PDM_SRC_REG_CLR_BIT

#define HW_PDM_SRC_REG_CLR_BIT	(	id,
		reg,
		field
	)	HW_SRC_REG_CLR_BIT(id, SRC1, reg##_REG, field)

Clear a bit of a PDM register.

Parameters

[in]	id	identifies APU, SRC1, SRC2
[in]	reg	is the register to access
[in]	field	is the register field to write

◆ HW_PDM_SRC_REG_GETF

#define HW_PDM_SRC_REG_GETF	(	id,
		reg,
		field
	)	HW_SRC_REG_GETF(id, SRC1, reg##_REG, field)

Get the value of a field of a PDM register.

Parameters

[in]	id	identifies APU, SRC1, SRC2
[in]	reg	is the register to access
[in]	field	is the register field to read

Returns: the value of the register field

◆ HW_PDM_SRC_REG_SET_BIT

#define HW_PDM_SRC_REG_SET_BIT	(	id,
		reg,
		field
	)	HW_SRC_REG_SET_BIT(id, SRC1, reg##_REG, field)

Set a bit of a PDM register.

Parameters

[in]	id	identifies APU, SRC1, SRC2
[in]	reg	is the register to access
[in]	field	is the register field to write

◆ HW_PDM_SRC_REG_SETF

#define HW_PDM_SRC_REG_SETF	(	id,
		reg,
		field,
		val
	)	HW_SRC_REG_SETF(id, SRC1, reg##_REG, field, val)

Set the value of a field of a PDM register.

Parameters

[in]	id	identifies APU, SRC1, SRC2
[in]	reg	is the register to access
[in]	field	is the register field to write
[in]	val	is the value to write

Enumeration Type Documentation

◆ HW_PDM_CHANNEL_CONFIG

enum HW_PDM_CHANNEL_CONFIG

PDM output channel configuration.

Enumerator
HW_PDM_CHANNEL_NONE	No PDM output - no output
HW_PDM_CHANNEL_R	Right channel only PDM output (falling edge of PDM_CLK)
HW_PDM_CHANNEL_L	Left channel only PDM output (rising edge of PDM_CLK)
HW_PDM_CHANNEL_LR	Left and Right channel PDM output

◆ HW_PDM_DATA_DIRECTION

enum HW_PDM_DATA_DIRECTION

PDM data direction.

◆ HW_PDM_DI_DELAY

enum HW_PDM_DI_DELAY

PDM input delay.

Enumerator
HW_PDM_DI_NO_DELAY	no PDM input delay
HW_PDM_DI_4_NS_DELAY	4ns PDM input delay
HW_PDM_DI_8_NS_DELAY	8ns PDM input delay
HW_PDM_DI_12_NS_DELAY	12ns PDM input delay

◆ HW_PDM_DO_DELAY

enum HW_PDM_DO_DELAY

PDM output delay.

Enumerator
HW_PDM_DO_NO_DELAY	no delay
HW_PDM_DO_8_NS_DELAY	8ns PDM output delay
HW_PDM_DO_12_NS_DELAY	12ns PDM output delay
HW_PDM_DO_16_NS_DELAY	16ns PDM output delay

◆ HW_PDM_MODE

enum HW_PDM_MODE

PDM Master/Slave mode.

Enumerator
HW_PDM_SLAVE_MODE	PDM Interface in slave mode
HW_PDM_MASTER_MODE	PDM Interface in master mode

◆ HW_PDM_MUX_OUT

enum HW_PDM_MUX_OUT

PDM output multiplexer.

Enumerator
HW_PDM_MUX_OUT_SRC1	PDM output for PDM_MUX_OUT from SRC1
HW_PDM_MUX_OUT_SRC2	PDM output for PDM_MUX_OUT from SRC2

Function Documentation

◆ hw_pdm_clk_init()

uint32_t hw_pdm_clk_init ( uint32_t frequency )

Initialize PDM clock.

Parameters

[in] frequency requested frequency in the range 125490...4000000 (Hz) of PDM clock for default clock DIVN.

Returns: achieved frequency (Hz) of PDM clock

◆ hw_pdm_disable()

__STATIC_INLINE void hw_pdm_disable ( void )

Disable PDM block system clock source.

Disable the PDM clock source.

◆ hw_pdm_enable()

__STATIC_INLINE void hw_pdm_enable ( void )

Enable PDM block system clock source used only for Master mode.

Enable the PDM clock source. PDM_DIV must be set before or together with CLK_PDM_EN.

◆ hw_pdm_get_clk_div()

__STATIC_INLINE uint8_t hw_pdm_get_clk_div ( void )

Get PDM clock divider.

Returns: PDM clock divider

◆ hw_pdm_get_in_channel_swap()

__STATIC_INLINE bool hw_pdm_get_in_channel_swap ( HW_SRC_ID id )

Get the status of swap of the channels on the PDM input source.

Parameters

[in] id identifies SRC1, SRC2

Returns: true when input PDM channels are swapped otherwise false

◆ hw_pdm_get_input_delay()

__STATIC_INLINE HW_PDM_DI_DELAY hw_pdm_get_input_delay ( HW_SRC_ID id )

Get input delay in PDM interface.

Parameters

[in] id identifies SRC1, SRC2

Returns

Additional delay (in ns) from the PDM data input pad to the PDM interface. Available delay values are:

no delay,
4 ns delay,
8 ns delay,
12 ns delay.

◆ hw_pdm_get_mode()

__STATIC_INLINE HW_PDM_MODE hw_pdm_get_mode ( void )

Get PDM Master/Slave mode.

Returns: The PDM mode, HW_PDM_SLAVE_MODE or HW_PDM_MASTER_MODE

◆ hw_pdm_get_out_channel_swap()

__STATIC_INLINE bool hw_pdm_get_out_channel_swap ( HW_SRC_ID id )

Get the status of swap of the channels on the PDM output source.

Returns: true when output PDM channels are swapped otherwise false

◆ hw_pdm_get_output_channel_config()

__STATIC_INLINE HW_PDM_CHANNEL_CONFIG hw_pdm_get_output_channel_config ( HW_SRC_ID id )

Get PDM output channel configuration.

Parameters

[in] id identifies SRC1, SRC2

Returns

channel_conf Output configuration of the PDM output interface. Available values for PDM output configuration are:

HW_PDM_CHANNEL_NONE
There is no data on the PDM output interface.

HW_PDM_CHANNEL_R
Data stream at the output of the PDM interface is available only on the right channel.

HW_PDM_CHANNEL_L
Data stream at the output of the PDM interface is available only on the left channel.

HW_PDM_CHANNEL_LR
Data stream at the output of the PDM interface is available on both left and right channel.

◆ hw_pdm_get_output_delay()

__STATIC_INLINE HW_PDM_DO_DELAY hw_pdm_get_output_delay ( HW_SRC_ID id )

Get output delay in PDM interface.

Returns

additional delay (in ns) from the PDM interface to the PDM data outpu pad. Available delay values are:

no delay,
8 ns delay,
12 ns delay,
16 ns delay.

◆ hw_pdm_get_pdm_output_mux()

__STATIC_INLINE HW_PDM_MUX_OUT hw_pdm_get_pdm_output_mux ( void )

Get output for the PDM_MUX_OUT multiplexer.

Returns: The output for PCM:

Return values

HW_PDM_OUTPUT_MUX_SRC1	= PDM output for PDM_MUX_OUT from SRC1
HW_PDM_OUTPUT_MUX_SRC2	= PDM output for PDM_MUX_OUT from SRC2

◆ hw_pdm_get_status()

__STATIC_INLINE bool hw_pdm_get_status ( void )

Get PDM status. Supported only for Master mode.

Returns: PDM status

◆ hw_pdm_init()

void hw_pdm_init	(	HW_SRC_ID	id,
		hw_pdm_config_t *	config
	)

Initialize PDM interface.

call hw_pdm_enable() once PDM interface initialization is done

Parameters

[in]	id	identifies SRC1, SRC2
[in]	config	configuration of PDM interface

◆ hw_pdm_set_in_channel_swap()

__STATIC_INLINE void hw_pdm_set_in_channel_swap	(	HW_SRC_ID	id,
		bool	swap
	)

Swap left and right channel on the PDM input source.

Parameters

[in]	id	identifies SRC1, SRC2
[in]	swap	true when input PDM channels are swapped otherwise false

◆ hw_pdm_set_input_delay()

__STATIC_INLINE void hw_pdm_set_input_delay	(	HW_SRC_ID	id,
		HW_PDM_DI_DELAY	delay
	)

Set input delay in PDM interface.

Parameters

[in]	id	identifies SRC1, SRC2
[in]	delay	Additional delay (in ns) from the PDM data input pad to the PDM interface. Available delay values are: no delay, 4 ns delay, 8 ns delay, 12 ns delay.

◆ hw_pdm_set_mode()

__STATIC_INLINE void hw_pdm_set_mode ( HW_PDM_MODE mode )

Set PDM Master/Slave mode.

Parameters

[in] mode The PDM mode, HW_PDM_SLAVE_MODE or HW_PDM_MASTER_MODE

◆ hw_pdm_set_out_channel_swap()

__STATIC_INLINE void hw_pdm_set_out_channel_swap	(	HW_SRC_ID	id,
		bool	swap
	)

Swap left and right channel on the PDM output source.

Parameters

[in]	id	identifies APU, SRC1, SRC2
[in]	swap	true when output PDM channels are swapped otherwise false

◆ hw_pdm_set_output_channel_config()

__STATIC_INLINE void hw_pdm_set_output_channel_config	(	HW_SRC_ID	id,
		HW_PDM_CHANNEL_CONFIG	channel_conf
	)

Set PDM output channel configuration applicable only for SRC1, APU.

Parameters

[in] id identifies SRC1, SRC2

[in]

channel_conf

Output configuration of the PDM output interface. Available values for PDM output configuration are:

HW_PDM_CHANNEL_NONE
There is no data on the PDM output interface.

HW_PDM_CHANNEL_R
Data stream at the output of the PDM interface is available only on the right channel.

HW_PDM_CHANNEL_L
Data stream at the output of the PDM interface is available only on the left channel.

HW_PDM_CHANNEL_LR
Data stream at the output of the PDM interface is available on both left and right channel.

◆ hw_pdm_set_output_delay()

__STATIC_INLINE void hw_pdm_set_output_delay	(	HW_SRC_ID	id,
		HW_PDM_DO_DELAY	delay
	)

Set output delay in PDM interface.

Parameters

[in]	id	identifies APU, SRC1, SRC2
[in]	delay	additional delay (in ns) from the PDM interface to the PDM data outpu pad. Available delay values are: no delay, 8 ns delay, 12 ns delay, 16 ns delay.

◆ hw_pdm_set_pdm_output_mux()

__STATIC_INLINE void hw_pdm_set_pdm_output_mux ( HW_PDM_MUX_OUT output )

Set output for the PDM_MUX_OUT multiplexer.

Parameters

[in] output The output for PCM:

Return values

HW_PDM_OUTPUT_MUX_SRC1	= PDM output for PDM_MUX_OUT from SRC1
HW_PDM_OUTPUT_MUX_SRC2	= PDM output for PDM_MUX_OUT from SRC2

Files

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ HW_PDM_CRG_REG_CLR_BIT

◆ HW_PDM_CRG_REG_FIELD_MASK

◆ HW_PDM_CRG_REG_FIELD_POS

◆ HW_PDM_CRG_REG_GETF

◆ HW_PDM_CRG_REG_SET_BIT

◆ HW_PDM_CRG_REG_SETF

◆ HW_PDM_SRC_REG_CLR_BIT

◆ HW_PDM_SRC_REG_GETF

◆ HW_PDM_SRC_REG_SET_BIT

◆ HW_PDM_SRC_REG_SETF

Enumeration Type Documentation

◆ HW_PDM_CHANNEL_CONFIG

◆ HW_PDM_DATA_DIRECTION

◆ HW_PDM_DI_DELAY

◆ HW_PDM_DO_DELAY

◆ HW_PDM_MODE

◆ HW_PDM_MUX_OUT

Function Documentation

◆ hw_pdm_clk_init()

◆ hw_pdm_disable()

◆ hw_pdm_enable()

◆ hw_pdm_get_clk_div()

◆ hw_pdm_get_in_channel_swap()

◆ hw_pdm_get_input_delay()

◆ hw_pdm_get_mode()

◆ hw_pdm_get_out_channel_swap()

◆ hw_pdm_get_output_channel_config()

◆ hw_pdm_get_output_delay()

◆ hw_pdm_get_pdm_output_mux()

◆ hw_pdm_get_status()

◆ hw_pdm_init()

◆ hw_pdm_set_in_channel_swap()

◆ hw_pdm_set_input_delay()

◆ hw_pdm_set_mode()

◆ hw_pdm_set_out_channel_swap()

◆ hw_pdm_set_output_channel_config()

◆ hw_pdm_set_output_delay()

◆ hw_pdm_set_pdm_output_mux()