SmartSnippets DA1459x SDK
Data Fields

MEMCTRL registers (MEMCTRL) More...

#include <DA1459x-00.h>

Data Fields

__IM uint32_t RESERVED
 
__IOM uint32_t MEM_PRIO_REG
 
__IOM uint32_t MEM_STALL_REG
 
__IOM uint32_t MEM_STATUS_REG
 
__IOM uint32_t MEM_STATUS2_REG
 
__IOM uint32_t CMI_CODE_BASE_REG
 
__IOM uint32_t CMI_DATA_BASE_REG
 
__IOM uint32_t CMI_SHARED_BASE_REG
 
__IOM uint32_t BUSY_SET_REG
 
__IOM uint32_t BUSY_RESET_REG
 
__IOM uint32_t BUSY_STAT_REG
 

Detailed Description

MEMCTRL registers (MEMCTRL)

Field Documentation

◆ BUSY_RESET_REG

__IOM uint32_t MEMCTRL_Type::BUSY_RESET_REG

(@ 0x00000078) BSR Reset Register

◆ BUSY_SET_REG

__IOM uint32_t MEMCTRL_Type::BUSY_SET_REG

(@ 0x00000074) BSR Set Register

◆ BUSY_STAT_REG

__IOM uint32_t MEMCTRL_Type::BUSY_STAT_REG

(@ 0x0000007C) BSR Status Register

◆ CMI_CODE_BASE_REG

__IOM uint32_t MEMCTRL_Type::CMI_CODE_BASE_REG

(@ 0x00000020) CMAC code Base Address Register

◆ CMI_DATA_BASE_REG

__IOM uint32_t MEMCTRL_Type::CMI_DATA_BASE_REG

(@ 0x00000024) CMAC data Base Address Register

◆ CMI_SHARED_BASE_REG

__IOM uint32_t MEMCTRL_Type::CMI_SHARED_BASE_REG

(@ 0x00000028) CMAC shared data Base Address Register

◆ MEM_PRIO_REG

__IOM uint32_t MEMCTRL_Type::MEM_PRIO_REG

(@ 0x00000004) Priority Control Register

◆ MEM_STALL_REG

__IOM uint32_t MEMCTRL_Type::MEM_STALL_REG

(@ 0x00000008) Maximum Stall cycles Control Register

◆ MEM_STATUS2_REG

__IOM uint32_t MEMCTRL_Type::MEM_STATUS2_REG

(@ 0x00000010) RAM cells Status Register

◆ MEM_STATUS_REG

__IOM uint32_t MEMCTRL_Type::MEM_STATUS_REG

(@ 0x0000000C) Memory Arbiter Status Register

◆ RESERVED

__IM uint32_t MEMCTRL_Type::RESERVED

< (@ 0x50060000) MEMCTRL Structure


The documentation for this struct was generated from the following file: