I2C Controller. More...

Files
file	hw_i2c.h
	Definition of API for the I2C Low Level Driver.

Data Structures
struct	i2c_config
	I2C configuration. More...

Macros
#define	HW_I2C_DMA_SUPPORT dg_configI2C_DMA_SUPPORT
	DMA support for I2C.

#define	HW_I2C_SLAVE_SUPPORT ( 1 )
	I2C slave mode support.

#define	I2C_FIFO_DEPTH (4)
	TX/RX FIFO depth. More...

#define	I2C_SETUP(id, seq)
	Wrapper to perform controller setup. More...

#define	HW_I2C1 ((void *)I2C_BASE)
	I2C controller instance. More...

#define	HW_I2C_F_NONE 0x00000000

#define	HW_I2C_F_WAIT_FOR_STOP 0x00000001

#define	HW_I2C_F_ADD_STOP 0x00000002

#define	HW_I2C_F_ADD_RESTART 0x00000004

#define	HW_I2C_I2C1_MADDR 0x01
	I2C high speed master code. This bit field holds the value of the I2C HS mode master code. HS-mode master codes are reserved 8-bit codes (00001xxx) that are not used for slave addressing or other purposes. Each master has its unique master code. Up to eight high-speed mode masters can be present on the same I2C bus system. Valid values are from 0 to 7. This can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. More...

#define	HW_I2C_REG_SETF(id, reg, field, val)
	Write a value to an I2C register field. More...

#define	HW_I2C_REG_GETF(id, reg, field) ((IBA(id)->reg##_REG & (I2C_##reg##_REG_##field##_Msk)) >> (I2C_##reg##_REG_##field##_Pos))
	Get the value of an I2C register field. More...

#define	HW_I2C_REG_SET_FIELD(reg, field, var, val) REG_SET_FIELD(I2C, reg##_REG, field, var, val)
	Sets a field value of an I2C register. Aimed to be used with local variables. More...

Typedefs
typedef hw_dma_periph_prio_t	hw_i2c_dma_prio_t
	I2C DMA priority configuration. More...

typedef void(*	hw_i2c_interrupt_cb) (HW_I2C_ID id, uint16_t mask)
	Callback called on interrupt from I2C controller. More...

typedef void(*	hw_i2c_complete_cb) (HW_I2C_ID id, void *cb_data, uint16_t len, bool success)
	Callback called upon completion of read or write in non-blocking mode (FIFO or DMA) More...

typedef void(*	hw_i2c_event_cb) (HW_I2C_ID id, HW_I2C_EVENT event)
	Callback called on event when in slave mode. More...

Enumerations
enum	HW_I2C_ABORT_SOURCE { HW_I2C_ABORT_NONE = 0, HW_I2C_ABORT_7B_ADDR_NO_ACK = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_7B_ADDR_NOACK_Msk, HW_I2C_ABORT_10B_ADDR1_NO_ACK = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_10ADDR1_NOACK_Msk, HW_I2C_ABORT_10B_ADDR2_NO_ACK = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_10ADDR2_NOACK_Msk, HW_I2C_ABORT_TX_DATA_NO_ACK = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_TXDATA_NOACK_Msk, HW_I2C_ABORT_GENERAL_CALL_NO_ACK = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_GCALL_NOACK_Msk, HW_I2C_ABORT_GENERAL_CALL_READ = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_GCALL_READ_Msk, HW_I2C_ABORT_START_BYTE_ACK = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_SBYTE_ACKDET_Msk, HW_I2C_ABORT_10B_READ_NO_RESTART = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_10B_RD_NORSTRT_Msk, HW_I2C_ABORT_MASTER_DISABLED = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_MASTER_DIS_Msk, HW_I2C_ABORT_ARBITRATION_LOST = I2C_I2C_TX_ABRT_SOURCE_REG_ARB_LOST_Msk, HW_I2C_ABORT_SLAVE_FLUSH_TX_FIFO = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_SLVFLUSH_TXFIFO_Msk, HW_I2C_ABORT_SLAVE_ARBITRATION_LOST = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_SLV_ARBLOST_Msk, HW_I2C_ABORT_SLAVE_IN_TX = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_SLVRD_INTX_Msk, HW_I2C_ABORT_USER_ABORT = I2C_I2C_TX_ABRT_SOURCE_REG_ABRT_USER_ABRT_Msk, HW_I2C_ABORT_SW_ERROR }
	I2C abort source. More...

enum	HW_I2C_SPEED { HW_I2C_SPEED_STANDARD = 0, HW_I2C_SPEED_FAST, HW_I2C_SPEED_HIGH }
	I2C interface speed. More...

enum	HW_I2C_MODE { HW_I2C_MODE_MASTER = 0, HW_I2C_MODE_SLAVE }
	I2C mode. More...

enum	HW_I2C_ADDRESSING { HW_I2C_ADDRESSING_7B = 0, HW_I2C_ADDRESSING_10B }
	I2C addressing mode. More...

enum	HW_I2C_EVENT { HW_I2C_EVENT_READ_REQUEST = 0, HW_I2C_EVENT_DATA_READY, HW_I2C_EVENT_TX_ABORT, HW_I2C_EVENT_RX_OVERFLOW, HW_I2C_EVENT_INVALID }
	Callback events when working as slave. More...

enum	HW_I2C_INT { HW_I2C_INT_RX_UNDERFLOW = I2C_I2C_INTR_STAT_REG_R_RX_UNDER_Msk, HW_I2C_INT_RX_OVERFLOW = I2C_I2C_INTR_STAT_REG_R_RX_OVER_Msk, HW_I2C_INT_RX_FULL = I2C_I2C_INTR_STAT_REG_R_RX_FULL_Msk, HW_I2C_INT_TX_OVERFLOW = I2C_I2C_INTR_STAT_REG_R_TX_OVER_Msk, HW_I2C_INT_TX_EMPTY = I2C_I2C_INTR_STAT_REG_R_TX_EMPTY_Msk, HW_I2C_INT_READ_REQUEST = I2C_I2C_INTR_STAT_REG_R_RD_REQ_Msk, HW_I2C_INT_TX_ABORT = I2C_I2C_INTR_STAT_REG_R_TX_ABRT_Msk, HW_I2C_INT_RX_DONE = I2C_I2C_INTR_STAT_REG_R_RX_DONE_Msk, HW_I2C_INT_ACTIVITY = I2C_I2C_INTR_STAT_REG_R_ACTIVITY_Msk, HW_I2C_INT_STOP_DETECTED = I2C_I2C_INTR_STAT_REG_R_STOP_DET_Msk, HW_I2C_INT_START_DETECTED = I2C_I2C_INTR_STAT_REG_R_START_DET_Msk, HW_I2C_INT_GENERAL_CALL = I2C_I2C_INTR_STAT_REG_R_GEN_CALL_Msk }
	I2C interrupt source. More...

enum	HW_I2C_DMA_TRANSFER
	DMA transfer type. More...

Functions
void	hw_i2c_enable_clk (const HW_I2C_ID id)
	Enable I2C clock. More...

void	hw_i2c_disable_clk (const HW_I2C_ID id)
	Disable I2C clock. More...

bool	hw_i2c_is_clk_enabled (const HW_I2C_ID id)
	Get the status of the I2C interface clock source. More...

void	hw_i2c_init (HW_I2C_ID id, const i2c_config *cfg)
	Initialize I2C controller. More...

void	hw_i2c_deinit (HW_I2C_ID id)
	DeInitialize I2C controller. More...

void	hw_i2c_configure (HW_I2C_ID id, const i2c_config *cfg)
	Configure I2C controller. More...

__STATIC_INLINE void	hw_i2c_enable (HW_I2C_ID id)
	Enable I2C controller. More...

void	hw_i2c_disable (HW_I2C_ID id)
	Disable I2C controller. More...

__STATIC_INLINE bool	hw_i2c_is_enabled (HW_I2C_ID id)
	Get I2C controller enable status. More...

__STATIC_INLINE uint16_t	hw_i2c_get_enable_status (HW_I2C_ID id)
	Get I2C Controller Enable status. More...

void	hw_i2c_reset_dma_cb (HW_I2C_ID id)
	Reset DMA callback. More...

bool	hw_i2c_is_occupied (HW_I2C_ID id)
	Get I2C controller occupied status. More...

void	hw_i2c_register_int (HW_I2C_ID id, hw_i2c_interrupt_cb cb, uint16_t mask)
	Register interrupt handler. More...

void	hw_i2c_unregister_int (HW_I2C_ID id)
	Unregister interrupt handler. More...

void	hw_i2c_set_int_mask (HW_I2C_ID id, uint16_t mask)
	Set bitmask of requested interrupt events. More...

uint16_t	hw_i2c_get_int_mask (HW_I2C_ID id)
	Get current bitmask of requested interrupt events. More...

__STATIC_INLINE void	hw_i2c_set_mode (HW_I2C_ID id, HW_I2C_MODE mode)
	Set I2C controller mode. More...

__STATIC_INLINE uint8_t	hw_i2c_is_master (HW_I2C_ID id)
	Get I2C controller master mode status. More...

__STATIC_INLINE void	hw_i2c_set_speed (HW_I2C_ID id, HW_I2C_SPEED speed)
	Set I2C interface bus speed. More...

__STATIC_INLINE void	hw_i2c_set_restart_enabled (HW_I2C_ID id, bool enabled)
	Set whether RESTART conditions may be sent when acting as master. More...

__STATIC_INLINE void	hw_i2c_set_general_call_enabled (HW_I2C_ID id, bool enabled)
	Set whether General Call should be used to address slaves. More...

__STATIC_INLINE void	hw_i2c_set_target_addressing_mode (HW_I2C_ID id, HW_I2C_ADDRESSING addr_mode)
	Set target slave addressing mode in master mode. More...

__STATIC_INLINE void	hw_i2c_set_slave_addressing_mode (HW_I2C_ID id, HW_I2C_ADDRESSING addr_mode)
	Set slave addressing mode in slave mode. More...

__STATIC_INLINE void	hw_i2c_set_slave_address (HW_I2C_ID id, uint16_t address)
	Set slave address in slave mode. More...

__STATIC_INLINE void	hw_i2c_set_general_call_ack_enabled (HW_I2C_ID id, bool ack)
	Set support for general call acknowledgment. More...

void	hw_i2c_setup_master (HW_I2C_ID id, HW_I2C_ADDRESSING addr_mode, uint16_t address)
	Setup controller for operation in master mode. More...

void	hw_i2c_set_slave_callback (HW_I2C_ID id, hw_i2c_event_cb cb)
	Setup callback function for operation in slave mode. More...

void	hw_i2c_register_slave_dma_read_callback (HW_I2C_ID id)
	Register proper handling for DMA read in slave mode. More...

void	hw_i2c_setup_slave (HW_I2C_ID id, HW_I2C_ADDRESSING addr_mode, uint16_t address, hw_i2c_event_cb cb)
	Setup controller for operation in slave mode. More...

__STATIC_INLINE bool	hw_i2c_is_master_busy (HW_I2C_ID id)
	Check if controller is busy when operating in master mode. More...

__STATIC_INLINE bool	hw_i2c_is_slave_busy (HW_I2C_ID id)
	Check if controller is busy when operating in slave mode. More...

__STATIC_INLINE bool	hw_i2c_controler_is_busy (HW_I2C_ID id)
	Check controller activity. More...

__STATIC_INLINE bool	hw_i2c_is_tx_fifo_empty (HW_I2C_ID id)
	Check if TX FIFO queue is empty. More...

__STATIC_INLINE bool	hw_i2c_is_tx_fifo_not_full (HW_I2C_ID id)
	Check if TX FIFO is not full. More...

__STATIC_INLINE bool	hw_i2c_is_rx_fifo_full (HW_I2C_ID id)
	Check if RX FIFO queue is full. More...

__STATIC_INLINE bool	hw_i2c_is_rx_fifo_not_empty (HW_I2C_ID id)
	Check if RX FIFO is not empty. More...

__STATIC_INLINE void	hw_i2c_set_target_address (HW_I2C_ID id, uint16_t address)
	Set target slave address in master mode. More...

__STATIC_INLINE void	hw_i2c_write_byte (HW_I2C_ID id, uint8_t byte)
	Write single byte into TX FIFO. More...

size_t	hw_i2c_write_buffer_sync (HW_I2C_ID id, const uint8_t data, uint16_t len, HW_I2C_ABORT_SOURCE abrt_code, uint32_t flags)
	Write multiple bytes to I2C slave synchronously. More...

int	hw_i2c_write_buffer_async (HW_I2C_ID id, const uint8_t data, uint16_t len, hw_i2c_complete_cb cb, void cb_data, uint32_t flags)
	Write multiple bytes to I2C slave asynchronously. More...

__STATIC_INLINE void	hw_i2c_read_byte_trigger (HW_I2C_ID id)
	Initiate reading from I2C bus. More...

size_t	hw_i2c_read_buffer_sync (HW_I2C_ID id, uint8_t data, uint16_t len, HW_I2C_ABORT_SOURCE abrt_code, uint32_t flags)
	Read multiple bytes from I2C slave synchronously. More...

int	hw_i2c_read_buffer_async (HW_I2C_ID id, uint8_t data, uint16_t len, hw_i2c_complete_cb cb, void cb_data, uint32_t flags)
	Read multiple bytes from I2C slave asynchronously. More...

int	hw_i2c_write_then_read_async (HW_I2C_ID id, const uint8_t w_data, uint16_t w_len, uint8_t r_data, uint16_t r_len, hw_i2c_complete_cb cb, void *cb_data, uint32_t flags)
	Write then read multiple bytes from I2C slave. More...

__STATIC_INLINE uint8_t	hw_i2c_read_byte (HW_I2C_ID id)
	Read single byte from RX FIFO. More...

__STATIC_INLINE void	hw_i2c_set_tx_fifo_threshold (HW_I2C_ID id, uint8_t level)
	Set threshold level on TX FIFO. More...

__STATIC_INLINE void	hw_i2c_set_rx_fifo_threshold (HW_I2C_ID id, uint8_t level)
	Set threshold level on RX FIFO. More...

__STATIC_INLINE uint8_t	hw_i2c_get_tx_fifo_threshold (HW_I2C_ID id)
	Get threshold level on TX FIFO. More...

__STATIC_INLINE uint8_t	hw_i2c_get_rx_fifo_threshold (HW_I2C_ID id)
	Get threshold level on RX FIFO. More...

__STATIC_INLINE uint8_t	hw_i2c_get_tx_fifo_level (HW_I2C_ID id)
	Get number of bytes in TX FIFO. More...

__STATIC_INLINE uint8_t	hw_i2c_get_rx_fifo_level (HW_I2C_ID id)
	Get number of bytes in RX FIFO. More...

__STATIC_INLINE void	hw_i2c_flush_rx_fifo (HW_I2C_ID id)
	Flushing RX FIFO. More...

__STATIC_INLINE uint16_t	hw_i2c_get_int_state (HW_I2C_ID id)
	Get interrupt state. More...

__STATIC_INLINE uint16_t	hw_i2c_get_raw_int_state (HW_I2C_ID id)
	Get raw interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_all (HW_I2C_ID id)
	Reset all interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_rx_underflow (HW_I2C_ID id)
	Reset RX_UNDERFLOW interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_rx_overflow (HW_I2C_ID id)
	Reset RX_OVERFLOW interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_tx_overflow (HW_I2C_ID id)
	Reset TX_OVERFLOW interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_read_request (HW_I2C_ID id)
	Reset READ_REQUEST interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_tx_abort (HW_I2C_ID id)
	Reset TX_ABORT interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_rx_done (HW_I2C_ID id)
	Reset RX_DONE interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_activity (HW_I2C_ID id)
	Reset ACTIVITY interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_start_detected (HW_I2C_ID id)
	Reset START_DETECTED interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_stop_detected (HW_I2C_ID id)
	Reset STOP_DETECTED interrupt state. More...

__STATIC_INLINE void	hw_i2c_reset_int_gen_call (HW_I2C_ID id)
	Reset GENERAL_CALL interrupt state. More...

__STATIC_INLINE uint32_t	hw_i2c_get_abort_source (HW_I2C_ID id)
	Get abort source. More...

__STATIC_INLINE void	hw_i2c_reset_abort_source (HW_I2C_ID id)
	Reset abort source. More...

__STATIC_INLINE void	hw_i2c_master_abort_transfer (HW_I2C_ID id)
	Aborts I2C transfer. More...

void	hw_i2c_prepare_dma (HW_I2C_ID id, uint8_t channel, void data, uint16_t len, HW_I2C_DMA_TRANSFER type, hw_i2c_complete_cb cb, void cb_data, uint32_t flags)
	Prepares I2C DMA for transfer. More...

void	hw_i2c_dma_start (HW_I2C_ID id)
	Starts DMA transfer. More...

void	hw_i2c_write_buffer_dma (HW_I2C_ID id, uint8_t channel, const uint16_t data, uint16_t len, hw_i2c_complete_cb cb, void cb_data, uint32_t flags)
	Write multiple bytes on I2C bus using DMA. More...

void	hw_i2c_read_buffer_dma (HW_I2C_ID id, uint8_t channel, uint8_t data, uint16_t len, hw_i2c_complete_cb cb, void cb_data, uint32_t flags)
	Read multiple bytes from I2C bus using DMA. More...

Detailed Description

I2C Controller.

Macro Definition Documentation

◆ HW_I2C1

#define HW_I2C1 ((void *)I2C_BASE)

I2C controller instance.

◆ HW_I2C_F_ADD_RESTART

#define HW_I2C_F_ADD_RESTART 0x00000004

Add Restart condition at the start of read or write

◆ HW_I2C_F_ADD_STOP

#define HW_I2C_F_ADD_STOP 0x00000002

Add stop condition after read or write

◆ HW_I2C_F_NONE

#define HW_I2C_F_NONE 0x00000000

No special command for the operation

◆ HW_I2C_F_WAIT_FOR_STOP

#define HW_I2C_F_WAIT_FOR_STOP 0x00000001

Operation will wait until stop condition occurs

◆ HW_I2C_I2C1_MADDR

#define HW_I2C_I2C1_MADDR 0x01

I2C high speed master code. This bit field holds the value of the I2C HS mode master code. HS-mode master codes are reserved 8-bit codes (00001xxx) that are not used for slave addressing or other purposes. Each master has its unique master code. Up to eight high-speed mode masters can be present on the same I2C bus system. Valid values are from 0 to 7. This can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect.

◆ HW_I2C_REG_GETF

#define HW_I2C_REG_GETF	(	id,
		reg,
		field
	)	((IBA(id)->reg##_REG & (I2C_##reg##_REG_##field##_Msk)) >> (I2C_##reg##_REG_##field##_Pos))

Get the value of an I2C register field.

Parameters

[in]	id	I2C controller instance
[in]	reg	the I2C register
[in]	field	the I2C register field

See also: HW_I2C_REG_SETF

◆ HW_I2C_REG_SET_FIELD

#define HW_I2C_REG_SET_FIELD	(	reg,
		field,
		var,
		val
	)	REG_SET_FIELD(I2C, reg##_REG, field, var, val)

Sets a field value of an I2C register. Aimed to be used with local variables.

Parameters

[in]	reg	the I2C register
[in]	field	the I2C register field
[out]	var	the local variable
[in]	val	the field value

◆ HW_I2C_REG_SETF

#define HW_I2C_REG_SETF	(	id,
		reg,
		field,
		val
	)

Value:

IBA(id)->reg##_REG = ((IBA(id)->reg##_REG & ~(I2C_##reg##_REG_##field##_Msk)) | \

((I2C_##reg##_REG_##field##_Msk) & ((val) << (I2C_##reg##_REG_##field##_Pos))))

Write a value to an I2C register field.

Parameters

[in]	id	I2C controller instance
[in]	reg	the I2C register
[in]	field	the I2C register field
[in]	val	value to be written

See also: HW_I2C_REG_GETF

◆ I2C_FIFO_DEPTH

#define I2C_FIFO_DEPTH (4)

TX/RX FIFO depth.

◆ I2C_SETUP

#define I2C_SETUP	(	id,
		seq
	)

Value:

do {                         \
                hw_i2c_disable(id);  \
                seq;                 \
                hw_i2c_enable(id);   \
        } while (0);

Wrapper to perform controller setup.

Controller will be disabled, then any code given as seq is executed and controller is enabled again.

Typedef Documentation

◆ hw_i2c_complete_cb

typedef void(* hw_i2c_complete_cb) (HW_I2C_ID id, void *cb_data, uint16_t len, bool success)

Callback called upon completion of read or write in non-blocking mode (FIFO or DMA)

Parameters

[in]	id	I2C controller instance
[in]	cb_data	data passed by user along with callback
[in]	len	number of bytes transferred. In case of write failure this number is equal to the number of bytes written to I2C TX FIFO until the failure occurred.
[in]	success	operation status

◆ hw_i2c_dma_prio_t

typedef hw_dma_periph_prio_t hw_i2c_dma_prio_t

I2C DMA priority configuration.

Note: DMA channel priorities are configured to their default values when use_prio = false

◆ hw_i2c_event_cb

typedef void(* hw_i2c_event_cb) (HW_I2C_ID id, HW_I2C_EVENT event)

Callback called on event when in slave mode.

Parameters

[in]	id	I2C controller instance
[in]	event	event identifier

◆ hw_i2c_interrupt_cb

typedef void(* hw_i2c_interrupt_cb) (HW_I2C_ID id, uint16_t mask)

Callback called on interrupt from I2C controller.

Parameters

[in]	id	I2C controller instance
[in]	mask	interrupt events mask

Enumeration Type Documentation

◆ HW_I2C_ABORT_SOURCE

enum HW_I2C_ABORT_SOURCE

I2C abort source.

Enumerator
HW_I2C_ABORT_NONE	no abort occured
HW_I2C_ABORT_7B_ADDR_NO_ACK	address byte of 7-bit address was not acknowledged by any slave
HW_I2C_ABORT_10B_ADDR1_NO_ACK	1st address byte of the 10-bit address was not acknowledged by any slave
HW_I2C_ABORT_10B_ADDR2_NO_ACK	2nd address byte of the 10-bit address was not acknowledged by any slave
HW_I2C_ABORT_TX_DATA_NO_ACK	data were not acknowledged by slave
HW_I2C_ABORT_GENERAL_CALL_NO_ACK	General Call sent but no slave acknowledged
HW_I2C_ABORT_GENERAL_CALL_READ	trying to read from bus after General Call
HW_I2C_ABORT_START_BYTE_ACK	START condition acknowledged by slave
HW_I2C_ABORT_10B_READ_NO_RESTART	read command in 10-bit addressing mode with RESTART disabled
HW_I2C_ABORT_MASTER_DISABLED	master operation initiated with master mode disabled
HW_I2C_ABORT_ARBITRATION_LOST	bus arbitration lost
HW_I2C_ABORT_SLAVE_FLUSH_TX_FIFO	(slave mode) request for data with data already in TX FIFO - used to flush data in TX FIFO
HW_I2C_ABORT_SLAVE_ARBITRATION_LOST	(slave mode) bus lost when transmitting to master
HW_I2C_ABORT_SLAVE_IN_TX	(slave mode) request for data replied with read request
HW_I2C_ABORT_USER_ABORT	transfer abort detected by master
HW_I2C_ABORT_SW_ERROR	abort due to software error

◆ HW_I2C_ADDRESSING

enum HW_I2C_ADDRESSING

I2C addressing mode.

Enumerator
HW_I2C_ADDRESSING_7B	7-bit addressing
HW_I2C_ADDRESSING_10B	10-bit addressing

◆ HW_I2C_DMA_TRANSFER

enum HW_I2C_DMA_TRANSFER

DMA transfer type.

◆ HW_I2C_EVENT

enum HW_I2C_EVENT

Callback events when working as slave.

Enumerator
HW_I2C_EVENT_READ_REQUEST	Data read request from master
HW_I2C_EVENT_DATA_READY	Data written by master
HW_I2C_EVENT_TX_ABORT	TX FIFO abort
HW_I2C_EVENT_RX_OVERFLOW	RX FIFO overflow, some data are lost
HW_I2C_EVENT_INVALID	Invalid event

◆ HW_I2C_INT

enum HW_I2C_INT

I2C interrupt source.

Can be used as bitmask.

Enumerator
HW_I2C_INT_RX_UNDERFLOW	attempt to read from empty RX FIFO has been made
HW_I2C_INT_RX_OVERFLOW	RX FIFO is full but new data are incoming and being discarded
HW_I2C_INT_RX_FULL	RX FIFO level is equal or above threshold set by hw_i2c_set_rx_fifo_threshold()
HW_I2C_INT_TX_OVERFLOW	attempt to write to TX FIFO which is already full
HW_I2C_INT_TX_EMPTY	TX FIFO level is equal or below threshold set by hw_i2c_set_tx_fifo_threshold()
HW_I2C_INT_READ_REQUEST	(slave only) I2C master attempts to read data
HW_I2C_INT_TX_ABORT	TX cannot be completed See also hw_get_abort_source() hw_i2c_reset_abort_source()
HW_I2C_INT_RX_DONE	(slave only) I2C master did not acknowledge transmitted byte
HW_I2C_INT_ACTIVITY	any I2C activity occurred
HW_I2C_INT_STOP_DETECTED	STOP condition occurred
HW_I2C_INT_START_DETECTED	START/RESTART condition occurred
HW_I2C_INT_GENERAL_CALL	(slave only) General Call address received

◆ HW_I2C_MODE

enum HW_I2C_MODE

I2C mode.

Enumerator
HW_I2C_MODE_MASTER	master mode
HW_I2C_MODE_SLAVE	slave mode

◆ HW_I2C_SPEED

enum HW_I2C_SPEED

I2C interface speed.

Enumerator
HW_I2C_SPEED_STANDARD	100kb/s
HW_I2C_SPEED_FAST	400kb/s
HW_I2C_SPEED_HIGH	3.4Mb/s

Function Documentation

◆ hw_i2c_configure()

void hw_i2c_configure	(	HW_I2C_ID	id,
		const i2c_config *	cfg
	)

Configure I2C controller.

Shortcut to configure most common I2C controller parameters.

Note: Even with cfg set to NULL, I2C clock (SCL) will be configured using default values.; For I2C MASTER mode it is recommended to disable the interface before calling this function.

Parameters

[in]	id	I2C controller instance
[in]	cfg	configuration

◆ hw_i2c_controler_is_busy()

__STATIC_INLINE bool hw_i2c_controler_is_busy ( HW_I2C_ID id )

Check controller activity.

Parameters

[in] id I2C controller instance

Returns: busy status

◆ hw_i2c_deinit()

void hw_i2c_deinit ( HW_I2C_ID id )

DeInitialize I2C controller.

Parameters

[in] id I2C controller instance

◆ hw_i2c_disable()

void hw_i2c_disable ( HW_I2C_ID id )

Disable I2C controller.

Parameters

[in] id I2C controller instance

◆ hw_i2c_disable_clk()

void hw_i2c_disable_clk ( const HW_I2C_ID id )

Disable I2C clock.

Note: The function is called by hw_i2c_deinit. No need to call it when using the hw_i2c_deinit interface.

Parameters

[in] id I2C controller instance.

◆ hw_i2c_dma_start()

void hw_i2c_dma_start ( HW_I2C_ID id )

Starts DMA transfer.

Should be called once I2C DMA is setup using hw_i2c_prepare_dma(). Once started, DMA transfer will only finish once previously specified number of bytes is read or written.

Parameters

[in] id I2C controller instance

See also: hw_i2c_prepare_dma

◆ hw_i2c_enable()

__STATIC_INLINE void hw_i2c_enable ( HW_I2C_ID id )

Enable I2C controller.

hw_i2c_init() shall be called before enabling I2C controller.

Parameters

[in] id I2C controller instance

◆ hw_i2c_enable_clk()

void hw_i2c_enable_clk ( const HW_I2C_ID id )

Enable I2C clock.

Note: This function is called by hw_i2c_init. No need to call it when using the hw_i2c_init interface.

Parameters

[in] id I2C controller instance.

◆ hw_i2c_flush_rx_fifo()

__STATIC_INLINE void hw_i2c_flush_rx_fifo ( HW_I2C_ID id )

Flushing RX FIFO.

Parameters

[in] id I2C controller instance

◆ hw_i2c_get_abort_source()

__STATIC_INLINE uint32_t hw_i2c_get_abort_source ( HW_I2C_ID id )

Get abort source.

This can be used to retrieve source of TX_ABORT interrupt. TX FIFO is flushed and remains in this state until cleared using hw_i2c_reset_abort_source().

Parameters

[in] id I2C controller instance

Returns: abort source bitmask

See also: I2C_ABORT_SOURCE; hw_i2c_reset_abort_source

◆ hw_i2c_get_enable_status()

__STATIC_INLINE uint16_t hw_i2c_get_enable_status ( HW_I2C_ID id )

Get I2C Controller Enable status.

Returns: The contents of the I2C_ENABLE_STATUS_REG

◆ hw_i2c_get_int_mask()

uint16_t hw_i2c_get_int_mask ( HW_I2C_ID id )

Get current bitmask of requested interrupt events.

Parameters

[in] id I2C controller instance

Returns: current bitmask

See also: I2C_INT

◆ hw_i2c_get_int_state()

__STATIC_INLINE uint16_t hw_i2c_get_int_state ( HW_I2C_ID id )

Get interrupt state.

Interrupt state returned includes only interrupts which are not masked. For raw interrupt status use hw_i2c_get_raw_int_state().

Parameters

[in] id I2C controller instance

Returns: interrupt state bitmask

See also: I2C_INT; hw_i2c_get_raw_int_state; hw_i2c_set_intr_mask

◆ hw_i2c_get_raw_int_state()

__STATIC_INLINE uint16_t hw_i2c_get_raw_int_state ( HW_I2C_ID id )

Get raw interrupt state.

Parameters

[in] id I2C controller instance

Returns: interrupt state bitmask

See also: I2C_INT; hw_i2c_get_int_state

◆ hw_i2c_get_rx_fifo_level()

__STATIC_INLINE uint8_t hw_i2c_get_rx_fifo_level ( HW_I2C_ID id )

Get number of bytes in RX FIFO.

Parameters

[in] id I2C controller instance

Returns: number of bytes

◆ hw_i2c_get_rx_fifo_threshold()

__STATIC_INLINE uint8_t hw_i2c_get_rx_fifo_threshold ( HW_I2C_ID id )

Get threshold level on RX FIFO.

Parameters

[in] id I2C controller instance

◆ hw_i2c_get_tx_fifo_level()

__STATIC_INLINE uint8_t hw_i2c_get_tx_fifo_level ( HW_I2C_ID id )

Get number of bytes in TX FIFO.

Parameters

[in] id I2C controller instance

Returns: number of bytes

◆ hw_i2c_get_tx_fifo_threshold()

__STATIC_INLINE uint8_t hw_i2c_get_tx_fifo_threshold ( HW_I2C_ID id )

Get threshold level on TX FIFO.

Parameters

[in] id I2C controller instance

◆ hw_i2c_init()

void hw_i2c_init	(	HW_I2C_ID	id,
		const i2c_config *	cfg
	)

Initialize I2C controller.

I2C controller is disabled, clock and interrupt for I2C component are enabled, all interrupts are masked though. cfg can be NULL if no configuration should be performed.

Note: Even with cfg set to NULL, I2C clock (SCL) will be configured using default values.; The I2C clock source is set to DIVN (16MHz, regardless of PLL or XTAL16M being used).

Parameters

[in]	id	I2C controller instance
[in]	cfg	configuration

◆ hw_i2c_is_clk_enabled()

bool hw_i2c_is_clk_enabled ( const HW_I2C_ID id )

Get the status of the I2C interface clock source.

Parameters

[in] id I2C controller instance.

Returns

Return values

false	if I2C interface clock source is disabled,
true	otherwise

◆ hw_i2c_is_enabled()

__STATIC_INLINE bool hw_i2c_is_enabled ( HW_I2C_ID id )

Get I2C controller enable status.

Parameters

[in] id I2C controller instance

Returns

Return values

true	if I2C controller is enabled,
false	otherwise

◆ hw_i2c_is_master()

__STATIC_INLINE uint8_t hw_i2c_is_master ( HW_I2C_ID id )

Get I2C controller master mode status.

Parameters

[in] id I2C controller instance

Returns: true if controller in master mode

◆ hw_i2c_is_master_busy()

__STATIC_INLINE bool hw_i2c_is_master_busy ( HW_I2C_ID id )

Check if controller is busy when operating in master mode.

Parameters

[in] id I2C controller instance

Returns: busy status

◆ hw_i2c_is_occupied()

bool hw_i2c_is_occupied ( HW_I2C_ID id )

Get I2C controller occupied status.

This function checks if the I2C controller is occupied by an ongoing operation waiting for an interrupt to hit in order to complete the operation.

Parameters

[in] id I2C controller instance

Returns: True if requested id is already occupied, false otherwise

◆ hw_i2c_is_rx_fifo_full()

__STATIC_INLINE bool hw_i2c_is_rx_fifo_full ( HW_I2C_ID id )

Check if RX FIFO queue is full.

This function should be used to check if RX FIFO is filled, i.e. subsequent data read will be discarded.

Parameters

[in] id I2C controller instance

Returns: RX FIFO full status

◆ hw_i2c_is_rx_fifo_not_empty()

__STATIC_INLINE bool hw_i2c_is_rx_fifo_not_empty ( HW_I2C_ID id )

Check if RX FIFO is not empty.

This function should be used to check if there are any data received in RX FIFO

Parameters

[in] id I2C controller instance

Returns: RX FIFO not empty status

◆ hw_i2c_is_slave_busy()

__STATIC_INLINE bool hw_i2c_is_slave_busy ( HW_I2C_ID id )

Check if controller is busy when operating in slave mode.

Parameters

[in] id I2C controller instance

Returns: busy status

◆ hw_i2c_is_tx_fifo_empty()

__STATIC_INLINE bool hw_i2c_is_tx_fifo_empty ( HW_I2C_ID id )

Check if TX FIFO queue is empty.

This function should be used to check if all data written to TX FIFO were transmitted.

Parameters

[in] id I2C controller instance

Returns: TX FIFO empty status

◆ hw_i2c_is_tx_fifo_not_full()

__STATIC_INLINE bool hw_i2c_is_tx_fifo_not_full ( HW_I2C_ID id )

Check if TX FIFO is not full.

This function should be used to check if data can be written to TX FIFO.

Parameters

[in] id I2C controller instance

Returns: TX FIFO not full status

◆ hw_i2c_master_abort_transfer()

__STATIC_INLINE void hw_i2c_master_abort_transfer ( HW_I2C_ID id )

Aborts I2C transfer.

This forces master to issue a STOP command and flush the TX fifo.

Parameters

[in] id I2C controller instance

Warning: Can be used only if controller is in master mode

◆ hw_i2c_prepare_dma()

void hw_i2c_prepare_dma	(	HW_I2C_ID	id,
		uint8_t	channel,
		void *	data,
		uint16_t	len,
		HW_I2C_DMA_TRANSFER	type,
		hw_i2c_complete_cb	cb,
		void *	cb_data,
		uint32_t	flags
	)

Prepares I2C DMA for transfer.

This "extended functionality" variant of hw_i2c_prepare_dma() adds the notify_on_stop parameter.

Use hw_i2c_dma_start() to start actual data transfer.

channel specifies either of channels in RX/TX pair used for transfer, i.e. channel=0|1 means channels 0 and 1 will be used, channel=2|3 means channels 2 and 3 will be used and so on. Once DMA is prepared, no other application should make changes to either of channels.

data buffer elements are 16-bit wide, this high byte should be 0 for writing and discarded when reading.

Callback is called once DMA transfer between buffer and RX/TX FIFOs is completed which means that there could still be activity on I2C bus. Application can check when transfer is completed using other means, i.e. STOP_DETECTED interrupt.

Parameters

[in]	id	I2C controller instance
[in]	channel	DMA channel
[in]	data	buffer to read from or write to, depends on `type`
[in]	len	length of `buffer`
[in]	type	type of transfer
[in]	cb	callback for transfer completed
[in]	cb_data	data to pass to `cb`
[in]	flags	Possible values for flags are: HW_I2C_F_NONE This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_WAIT_FOR_STOP `cb` will be called when STOP condition is generated. STOP condition will be generated at the end of the transaction. If HW_I2C_F_WAIT_FOR_STOP flag is not set `cb` will be called when the last byte has been written to the Tx FIFO. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

See also: hw_i2c_dma_start

◆ hw_i2c_read_buffer_async()

int hw_i2c_read_buffer_async	(	HW_I2C_ID	id,
		uint8_t *	data,
		uint16_t	len,
		hw_i2c_complete_cb	cb,
		void *	cb_data,
		uint32_t	flags
	)

Read multiple bytes from I2C slave asynchronously.

This function will read multiple bytes from bus taking care of RX FIFO control. This call is non-blocking and specified callback is called upon completion, with the operation status. The operation completes when the complete buffer is filled, or in case of a failure. In case of failure the failure cause must be read from the cb by calling hw_i2c_get_abort_source().

Parameters

[in]	id	I2C controller
[in,out]	data	Address of the buffer where data are stored
[in]	len	Length of the data buffer
[in]	cb	Callback to be called upon completion
[in]	cb_data	Data to pass to cb
[in]	flags	Possible values for flags are: HW_I2C_F_NONE This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

Returns: number of requested bytes in case of success, -1 otherwise.

Note: This function should be used only when operating in master mode.

Warning: This function registers an internal interrupt handler, which overrides any previously installed handler.

See also: hw_i2c_register_int

◆ hw_i2c_read_buffer_dma()

void hw_i2c_read_buffer_dma	(	HW_I2C_ID	id,
		uint8_t	channel,
		uint8_t *	data,
		uint16_t	len,
		hw_i2c_complete_cb	cb,
		void *	cb_data,
		uint32_t	flags
	)

Read multiple bytes from I2C bus using DMA.

This function uses the common callback type, which provides a way to signal whether the read finished successfully.

Shortcut for calling hw_i2c_prepare_dma() and hw_i2c_dma_start().

Parameters

[in]	id	I2C controller instance
[in]	channel	DMA channel
[out]	data	buffer to put data read from I2C bus
[in]	len	length of `buffer`
[in]	cb	callback for transfer completed
[in]	cb_data	data to pass to `cb`
[in]	flags	Possible values for flags are: HW_I2C_F_NONE This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

See also: hw_i2c_prepare_dma; hw_i2c_dma_start

◆ hw_i2c_read_buffer_sync()

size_t hw_i2c_read_buffer_sync	(	HW_I2C_ID	id,
		uint8_t *	data,
		uint16_t	len,
		HW_I2C_ABORT_SOURCE *	abrt_code,
		uint32_t	flags
	)

Read multiple bytes from I2C slave synchronously.

This function will read multiple bytes from bus taking care of RX FIFO control. This call blocks until the operation completes. The operation completes when the complete buffer is filled, or in case of a failure. Failures are cleared by the function before returning.

Parameters

[in]	id	I2C controller
[in,out]	data	Address of the buffer where data are stored
[in]	len	Length of the data buffer
[in,out]	abrt_code	If not NULL, the status of the operation based on HW_I2C_ABORT_SOURCE enumeration will be stored here
[in]	flags	Possible values for flags are: HW_I2C_F_NONE This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

Returns: The number of bytes read

Note: This function should be used only when operating in master mode.

◆ hw_i2c_read_byte()

__STATIC_INLINE uint8_t hw_i2c_read_byte ( HW_I2C_ID id )

Read single byte from RX FIFO.

It is caller's responsibility to ensure there is data to read in RX FIFO before calling this function by checking either hw_i2c_get_rx_fifo_level() or hw_i2c_rx_fifo_not_empty().

This function can be used in both master and slave modes.

Parameters

[in] id I2C controller instance

Returns: read byte

See also: hw_i2c_get_rx_fifo_level; hw_i2c_rx_fifo_not_empty

◆ hw_i2c_read_byte_trigger()

__STATIC_INLINE void hw_i2c_read_byte_trigger ( HW_I2C_ID id )

Initiate reading from I2C bus.

No data is read via this call, only START/RESTART condition is generated on bus if required. Actual data is read by controller and put in RX FIFO which can be read using hw_i2c_read_byte().

This function should be only used when operating in master mode.

Parameters

[in] id I2C controller instance

See also: hw_i2c_read_byte

◆ hw_i2c_register_int()

void hw_i2c_register_int	(	HW_I2C_ID	id,
		hw_i2c_interrupt_cb	cb,
		uint16_t	mask
	)

Register interrupt handler.

Parameters

[in]	id	I2C controller instance
[in]	cb	callback function
[in]	mask	initial bitmask of requested interrupt events

See also: hw_i2c_set_int_mask

◆ hw_i2c_register_slave_dma_read_callback()

void hw_i2c_register_slave_dma_read_callback ( HW_I2C_ID id )

Register proper handling for DMA read in slave mode.

This function must be called after DMA has been setup for reading in slave mode.

Parameters

[in] id I2C controller instance

See also: hw_i2c_read_buffer_dma; hw_i2c_prepare_dma

◆ hw_i2c_reset_abort_source()

__STATIC_INLINE void hw_i2c_reset_abort_source ( HW_I2C_ID id )

Reset abort source.

This clears TX_ABORT interrupt status and unlocks TX FIFO.

Note: this is an alias for hw_i2c_reset_int_tx_abort()

Parameters

[in] id I2C controller instance

See also: I2C_ABORT_SOURCE; hw_i2c_reset_int_tx_abort

◆ hw_i2c_reset_dma_cb()

void hw_i2c_reset_dma_cb ( HW_I2C_ID id )

Reset DMA callback.

This function sets DMA callback to NULL.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_activity()

__STATIC_INLINE void hw_i2c_reset_int_activity ( HW_I2C_ID id )

Reset ACTIVITY interrupt state.

Should be used to reset ACTIVITY interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_all()

__STATIC_INLINE void hw_i2c_reset_int_all ( HW_I2C_ID id )

Reset all interrupt state.

This does reset all interrupts which can be reset by software and TX_ABORT status.

Warning: Although this also clears TX_ABORT it does not reset flushed state on TX FIFO. This has; to be cleared manually using hw_i2c_reset_abort_source().

Parameters

[in] id I2C controller instance

See also: hw_i2c_reset_abort_source

◆ hw_i2c_reset_int_gen_call()

__STATIC_INLINE void hw_i2c_reset_int_gen_call ( HW_I2C_ID id )

Reset GENERAL_CALL interrupt state.

Should be used to reset GENERAL_CALL interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_read_request()

__STATIC_INLINE void hw_i2c_reset_int_read_request ( HW_I2C_ID id )

Reset READ_REQUEST interrupt state.

Should be used to reset READ_REQUEST interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_rx_done()

__STATIC_INLINE void hw_i2c_reset_int_rx_done ( HW_I2C_ID id )

Reset RX_DONE interrupt state.

Should be used to reset RX_DONE interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_rx_overflow()

__STATIC_INLINE void hw_i2c_reset_int_rx_overflow ( HW_I2C_ID id )

Reset RX_OVERFLOW interrupt state.

Should be used to reset RX_OVERFLOW interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_rx_underflow()

__STATIC_INLINE void hw_i2c_reset_int_rx_underflow ( HW_I2C_ID id )

Reset RX_UNDERFLOW interrupt state.

Should be used to reset RX_UNDERFLOW interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_start_detected()

__STATIC_INLINE void hw_i2c_reset_int_start_detected ( HW_I2C_ID id )

Reset START_DETECTED interrupt state.

Should be used to reset START_DETECTED interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_stop_detected()

__STATIC_INLINE void hw_i2c_reset_int_stop_detected ( HW_I2C_ID id )

Reset STOP_DETECTED interrupt state.

Should be used to reset STOP_DETECTED interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_tx_abort()

__STATIC_INLINE void hw_i2c_reset_int_tx_abort ( HW_I2C_ID id )

Reset TX_ABORT interrupt state.

Should be used to reset TX_ABORT interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_reset_int_tx_overflow()

__STATIC_INLINE void hw_i2c_reset_int_tx_overflow ( HW_I2C_ID id )

Reset TX_OVERFLOW interrupt state.

Should be used to reset TX_OVERFLOW interrupt.

Parameters

[in] id I2C controller instance

◆ hw_i2c_set_general_call_ack_enabled()

__STATIC_INLINE void hw_i2c_set_general_call_ack_enabled	(	HW_I2C_ID	id,
		bool	ack
	)

Set support for general call acknowledgment.

When enabled, controller will send ACK for general call address. This applies only to controller working in slave mode.

Parameters

[in]	id	I2C controller instance
[in]	ack	acknowledgment status

◆ hw_i2c_set_general_call_enabled()

__STATIC_INLINE void hw_i2c_set_general_call_enabled	(	HW_I2C_ID	id,
		bool	enabled
	)

Set whether General Call should be used to address slaves.

Can only be changed when controller is disabled.

Parameters

[in]	id	I2C controller instance
[in]	enabled	General Call status to be set

◆ hw_i2c_set_int_mask()

void hw_i2c_set_int_mask	(	HW_I2C_ID	id,
		uint16_t	mask
	)

Set bitmask of requested interrupt events.

Parameters

[in]	id	I2C controller instance
[in]	mask	bitmask of requested interrupt events

See also: I2C_INT

◆ hw_i2c_set_mode()

__STATIC_INLINE void hw_i2c_set_mode	(	HW_I2C_ID	id,
		HW_I2C_MODE	mode
	)

Set I2C controller mode.

Can be only set when controller is disabled.

Parameters

[in]	id	I2C controller instance
[in]	mode	mode to be set

◆ hw_i2c_set_restart_enabled()

__STATIC_INLINE void hw_i2c_set_restart_enabled	(	HW_I2C_ID	id,
		bool	enabled
	)

Set whether RESTART conditions may be sent when acting as master.

Parameters

[in]	id	I2C controller instance
[in]	enabled	RESTART status to be set

◆ hw_i2c_set_rx_fifo_threshold()

__STATIC_INLINE void hw_i2c_set_rx_fifo_threshold	(	HW_I2C_ID	id,
		uint8_t	level
	)

Set threshold level on RX FIFO.

An interrupt will be generated once number of entries in RX FIFO is greater than level. This cannot be set to value greater than HW_I2C_FIFO_DEPTH.

Parameters

[in]	id	I2C controller instance
[in]	level	threshold

◆ hw_i2c_set_slave_address()

__STATIC_INLINE void hw_i2c_set_slave_address	(	HW_I2C_ID	id,
		uint16_t	address
	)

Set slave address in slave mode.

Can be only set when controller is disabled.

Parameters

[in]	id	I2C controller instance
[in]	address	slave address

◆ hw_i2c_set_slave_addressing_mode()

__STATIC_INLINE void hw_i2c_set_slave_addressing_mode	(	HW_I2C_ID	id,
		HW_I2C_ADDRESSING	addr_mode
	)

Set slave addressing mode in slave mode.

Can be only set when controller is disabled.

Parameters

[in]	id	I2C controller instance
[in]	addr_mode	mode of addressing

◆ hw_i2c_set_slave_callback()

void hw_i2c_set_slave_callback	(	HW_I2C_ID	id,
		hw_i2c_event_cb	cb
	)

Setup callback function for operation in slave mode.

Parameters

[in]	id	I2C controller instance
[in]	cb	callback for events

◆ hw_i2c_set_speed()

__STATIC_INLINE void hw_i2c_set_speed	(	HW_I2C_ID	id,
		HW_I2C_SPEED	speed
	)

Set I2C interface bus speed.

Can be only set when controller is disabled.

Parameters

[in]	id	I2C controller instance
[in]	speed	speed to be set

◆ hw_i2c_set_target_address()

__STATIC_INLINE void hw_i2c_set_target_address	(	HW_I2C_ID	id,
		uint16_t	address
	)

Set target slave address in master mode.

Parameters

[in]	id	I2C controller instance
[in]	address	slave address

◆ hw_i2c_set_target_addressing_mode()

__STATIC_INLINE void hw_i2c_set_target_addressing_mode	(	HW_I2C_ID	id,
		HW_I2C_ADDRESSING	addr_mode
	)

Set target slave addressing mode in master mode.

Can only be changed when controller is disabled.

Parameters

[in]	id	I2C controller instance
[in]	addr_mode	mode of addressing

◆ hw_i2c_set_tx_fifo_threshold()

__STATIC_INLINE void hw_i2c_set_tx_fifo_threshold	(	HW_I2C_ID	id,
		uint8_t	level
	)

Set threshold level on TX FIFO.

An interrupt will be generated once number of entries in TX FIFO is less or equal to level. This cannot be set to value greater than HW_I2C_FIFO_DEPTH.

Parameters

[in]	id	I2C controller instance
[in]	level	threshold

◆ hw_i2c_setup_master()

void hw_i2c_setup_master	(	HW_I2C_ID	id,
		HW_I2C_ADDRESSING	addr_mode,
		uint16_t	address
	)

Setup controller for operation in master mode.

Shortcut for calling hw_i2c_set_mode(), hw_i2c_set_target_addressing_mode() and hw_i2c_set_target_address().

Note: It is recommended to disable the interface before calling this function.

Parameters

[in]	id	I2C controller instance
[in]	addr_mode	mode of addressing
[in]	address	target slave address

◆ hw_i2c_setup_slave()

void hw_i2c_setup_slave	(	HW_I2C_ID	id,
		HW_I2C_ADDRESSING	addr_mode,
		uint16_t	address,
		hw_i2c_event_cb	cb
	)

Setup controller for operation in slave mode.

Shortcut for calling hw_i2c_set_mode(), hw_i2c_set_slave_addressing_mode() and hw_i2c_set_slave_address().

Parameters

[in]	id	I2C controller instance
[in]	addr_mode	mode of addressing
[in]	address	slave address
[in]	cb	callback for events

See also: hw_i2c_set_mode; hw_i2c_set_slave_addressing_mode; hw_i2c_set_slave_address

◆ hw_i2c_unregister_int()

void hw_i2c_unregister_int ( HW_I2C_ID id )

Unregister interrupt handler.

This function disables all I2C interrupts by masking them. In addition it clears any pending ones on the ARM core. The status of RAW_INTR_STAT_REG remains unchanged.

Parameters

[in] id I2C controller instance

◆ hw_i2c_write_buffer_async()

int hw_i2c_write_buffer_async	(	HW_I2C_ID	id,
		const uint8_t *	data,
		uint16_t	len,
		hw_i2c_complete_cb	cb,
		void *	cb_data,
		uint32_t	flags
	)

Write multiple bytes to I2C slave asynchronously.

Writes array of data to a slave device on the I2C bus via the TX FIFO. This call is non-blocking and specified callback is called upon completion, with the operation status. In case of failure the failure cause must be read from the cb by calling hw_i2c_get_abort_source().

Parameters

[in]	id	I2C controller instance
[in]	data	Address of the buffer containing the data to write
[in]	len	Length of the data buffer
[in]	cb	Callback to be called upon completion
[in]	cb_data	Data to pass to cb
[in]	flags	Possible values for flags are: HW_I2C_F_NONE The cb will be called as soon as the last byte of data is written to the Tx FIFO. Possible Tx failure after this point must be checked by the caller. This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_WAIT_FOR_STOP The callback will be called when all bytes have been transmitted and a STOP condition has been generated. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

Returns: 0 in case of success, -1 otherwise.

Note: This function should be used only when operating in master mode.

Warning: This function registers an internal interrupt handler, which overrides any previously installed handler.

See also: hw_i2c_register_int

◆ hw_i2c_write_buffer_dma()

void hw_i2c_write_buffer_dma	(	HW_I2C_ID	id,
		uint8_t	channel,
		const uint16_t *	data,
		uint16_t	len,
		hw_i2c_complete_cb	cb,
		void *	cb_data,
		uint32_t	flags
	)

Write multiple bytes on I2C bus using DMA.

Shortcut for calling hw_i2c_prepare_dma() and hw_i2c_dma_start().

Parameters

[in]	id	I2C controller instance
[in]	channel	DMA channel
[in]	data	buffer to write data to
[in]	len	length of `buffer`
[in]	cb	callback for transfer completed
[in]	cb_data	data to pass to `cb`
[in]	flags	Possible values for flags are: HW_I2C_F_NONE This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_WAIT_FOR_STOP `cb` will be called when STOP condition is generated. STOP condition will be generated at the end of the transaction. If HW_I2C_F_WAIT_FOR_STOP flag is not set `cb` will be called when the last byte has been written to the Tx FIFO. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

See also: hw_i2c_prepare_dma; hw_i2c_dma_start

◆ hw_i2c_write_buffer_sync()

size_t hw_i2c_write_buffer_sync	(	HW_I2C_ID	id,
		const uint8_t *	data,
		uint16_t	len,
		HW_I2C_ABORT_SOURCE *	abrt_code,
		uint32_t	flags
	)

Write multiple bytes to I2C slave synchronously.

Writes array of data to a slave device on the I2C bus via the TX FIFO. This call blocks until the operation completes. In case of failure the function stores the Tx error code to the abrt_code parameter -if provided- and clears the Tx Abort register.

Parameters

[in]	id	I2C controller instance
[in]	data	Address of the buffer containing the data to write
[in]	len	Length of the data buffer
[in,out]	abrt_code	If not NULL, the status of the operation based on HW_I2C_ABORT_SOURCE enumeration will be stored here
[in]	flags	Possible values for flags are: HW_I2C_F_NONE The function will return only when all bytes have been transmitted. Possible Tx failure after this point must be checked by the caller. This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_WAIT_FOR_STOP The function will return only when all bytes have been transmitted and a STOP condition has been generated. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

Returns: The number of bytes written to the Tx FIFO. It is strongly recommended to check the value of abrt_code to make sure that the number of bytes returned were actually transmitted to the I2C bus.

Note: This function should be used only when operating in master mode.

◆ hw_i2c_write_byte()

__STATIC_INLINE void hw_i2c_write_byte	(	HW_I2C_ID	id,
		uint8_t	byte
	)

Write single byte into TX FIFO.

It is caller's responsibility to ensure there is free space in TX FIFO before calling this function - either hw_i2c_is_tx_fifo_not_full() or hw_i2c_get_tx_fifo_level() can be used for this purpose.

This function can be used in both master and slave modes.

Parameters

[in]	id	I2C controller instance
[in]	byte	data to write

Warning: This function does not check for errors during transmission. Use hw_i2c_write_buffer_sync() or hw_i2c_write_buffer_async() instead

◆ hw_i2c_write_then_read_async()

int hw_i2c_write_then_read_async	(	HW_I2C_ID	id,
		const uint8_t *	w_data,
		uint16_t	w_len,
		uint8_t *	r_data,
		uint16_t	r_len,
		hw_i2c_complete_cb	cb,
		void *	cb_data,
		uint32_t	flags
	)

Write then read multiple bytes from I2C slave.

This function allows to perform typical I2C transaction. This call is non-blocking and specified callback is called upon completion, with the operation status. In case of failure the failure cause must be read from the cb by calling hw_i2c_get_abort_source().

Parameters

[in]	id	I2C controller
[in]	w_data	Address of the buffer containing the data to write
[in]	w_len	Length of the buffer containing the data to write
[in,out]	r_data	Address of the buffer where data will be stored
[in]	r_len	Length of the buffer where data will be stored
[in]	cb	Callback to be called upon completion
[in]	cb_data	Data to pass to cb
[in]	flags	Possible values for flags are: HW_I2C_F_NONE This flag can be used for consecutive calls where the transaction can resume without stop/start conditions in between. HW_I2C_F_ADD_STOP STOP condition will be generated at the end of the transaction. HW_I2C_F_ADD_RESTART RESTART condition will be generated at the beginning of the transaction.

Returns: 0 in case of success, -1 otherwise.

Note: This function should be used only when operating in master mode.

Warning: This function registers an internal interrupt handler, which overrides any previously installed handler.

See also: hw_i2c_register_int

Files

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ HW_I2C1

◆ HW_I2C_F_ADD_RESTART

◆ HW_I2C_F_ADD_STOP

◆ HW_I2C_F_NONE

◆ HW_I2C_F_WAIT_FOR_STOP

◆ HW_I2C_I2C1_MADDR

◆ HW_I2C_REG_GETF

◆ HW_I2C_REG_SET_FIELD

◆ HW_I2C_REG_SETF

◆ I2C_FIFO_DEPTH

◆ I2C_SETUP

Typedef Documentation

◆ hw_i2c_complete_cb

◆ hw_i2c_dma_prio_t

◆ hw_i2c_event_cb

◆ hw_i2c_interrupt_cb

Enumeration Type Documentation

◆ HW_I2C_ABORT_SOURCE

◆ HW_I2C_ADDRESSING

◆ HW_I2C_DMA_TRANSFER

◆ HW_I2C_EVENT

◆ HW_I2C_INT

◆ HW_I2C_MODE

◆ HW_I2C_SPEED

Function Documentation

◆ hw_i2c_configure()

◆ hw_i2c_controler_is_busy()

◆ hw_i2c_deinit()

◆ hw_i2c_disable()

◆ hw_i2c_disable_clk()

◆ hw_i2c_dma_start()

◆ hw_i2c_enable()

◆ hw_i2c_enable_clk()

◆ hw_i2c_flush_rx_fifo()

◆ hw_i2c_get_abort_source()

◆ hw_i2c_get_enable_status()

◆ hw_i2c_get_int_mask()

◆ hw_i2c_get_int_state()

◆ hw_i2c_get_raw_int_state()

◆ hw_i2c_get_rx_fifo_level()

◆ hw_i2c_get_rx_fifo_threshold()

◆ hw_i2c_get_tx_fifo_level()

◆ hw_i2c_get_tx_fifo_threshold()

◆ hw_i2c_init()

◆ hw_i2c_is_clk_enabled()

◆ hw_i2c_is_enabled()

◆ hw_i2c_is_master()

◆ hw_i2c_is_master_busy()

◆ hw_i2c_is_occupied()

◆ hw_i2c_is_rx_fifo_full()

◆ hw_i2c_is_rx_fifo_not_empty()

◆ hw_i2c_is_slave_busy()

◆ hw_i2c_is_tx_fifo_empty()

◆ hw_i2c_is_tx_fifo_not_full()

◆ hw_i2c_master_abort_transfer()

◆ hw_i2c_prepare_dma()

◆ hw_i2c_read_buffer_async()

◆ hw_i2c_read_buffer_dma()

◆ hw_i2c_read_buffer_sync()

◆ hw_i2c_read_byte()

◆ hw_i2c_read_byte_trigger()

◆ hw_i2c_register_int()

◆ hw_i2c_register_slave_dma_read_callback()

◆ hw_i2c_reset_abort_source()

◆ hw_i2c_reset_dma_cb()

◆ hw_i2c_reset_int_activity()

◆ hw_i2c_reset_int_all()

◆ hw_i2c_reset_int_gen_call()

◆ hw_i2c_reset_int_read_request()

◆ hw_i2c_reset_int_rx_done()

◆ hw_i2c_reset_int_rx_overflow()

◆ hw_i2c_reset_int_rx_underflow()