42 #ifndef _QSPI_MACRONIX_V2_H_
43 #define _QSPI_MACRONIX_V2_H_
47 #define QSPI_MACRONIX_MANUFACTURER_ID (0xC2)
48 #define QSPI_MACRONIX_MX25U_TYPE (0x25)
49 #define QSPI_MACRONIX_MX25R_TYPE (0x28)
51 #define QSPI_MACRONIX_READ_CONFIG_REG_OPCODE (0x15)
52 #define QSPI_MACRONIX_READ_SECURITY_REG_OPCODE (0x2B)
54 #define QSPI_MACRONIX_PAGE_PROGRAM_4IO_OPCODE (0x38)
56 #define QSPI_MACRONIX_SUSPEND_OPCODE (0xB0)
57 #define QSPI_MACRONIX_RESUME_OPCODE (0x30)
59 #define QSPI_MACRONIX_STATUS_REG_QUAD_ENABLE_BIT (6)
60 #define QSPI_MACRONIX_STATUS_REG_QUAD_ENABLE_MASK (1 << QSPI_MACRONIX_STATUS_REG_QUAD_ENABLE_BIT)
62 #define QSPI_MACRONIX_STATUS_REG3_ADDR_MODE_BIT (0)
63 #define QSPI_MACRONIX_STATUS_REG3_ADDR_MODE_MASK (1 << QSPI_MACRONIX_STATUS_REG3_ADDR_MODE_BIT)
65 #define QSPI_MACRONIX_STATUS_REG3_DRV_STRENGTH_BITS (5)
66 #define QSPI_MACRONIX_STATUS_REG3_DRV_STRENGTH_MASK (3 << QSPI_MACRONIX_STATUS_REG3_DRV_STRENGTH_BITS)
68 #define QSPI_MACRONIX_SECURITY_REG_ERASE_SUSPEND_BIT (3)
69 #define QSPI_MACRONIX_SECURITY_REG_ERASE_SUSPEND_MASK (1 << QSPI_MACRONIX_SECURITY_REG_ERASE_SUSPEND_BIT)
71 #define QSPI_MACRONIX_SECURITY_REG_PROGRAM_SUSPEND_BIT (2)
72 #define QSPI_MACRONIX_SECURITY_REG_PROGRAM_SUSPEND_MASK (1 << QSPI_MACRONIX_SECURITY_REG_PROGRAM_SUSPEND_BIT)
74 #define QSPI_MACRONIX_SECURITY_REG_SUSPEND_MASK (QSPI_MACRONIX_SECURITY_REG_ERASE_SUSPEND_MASK | \
75 QSPI_MACRONIX_SECURITY_REG_PROGRAM_SUSPEND_MASK)
77 __UNUSED __RETAINED_CODE
static uint8_t qspi_macronix_read_register(
HW_QSPIC_ID id, uint8_t opcode, uint8_t mask)
79 __DBG_QSPI_VOLATILE__ uint8_t reg_val;
81 ASSERT_WARNING((opcode == QSPI_READ_STATUS_REG_OPCODE) ||
82 (opcode == QSPI_MACRONIX_READ_CONFIG_REG_OPCODE) ||
83 (opcode == QSPI_MACRONIX_READ_SECURITY_REG_OPCODE));
90 return (reg_val & mask);
95 __UNUSED __RETAINED_CODE
static void qspi_macronix_write_status_and_config_reg(
HW_QSPIC_ID id, uint8_t status_reg, uint8_t config_reg)
99 __DBG_QSPI_VOLATILE__ uint16_t regs = ((((uint16_t) (status_reg)) << 8) & 0xFF00) | config_reg;
109 return qspi_macronix_read_register(
id, QSPI_READ_STATUS_REG_OPCODE, 0xFF);
112 __UNUSED __RETAINED_CODE
static void qspi_macronix_write_status_reg(
HW_QSPIC_ID id, uint8_t status_reg)
114 __DBG_QSPI_VOLATILE__ uint8_t config_reg;
116 config_reg = qspi_macronix_read_register(
id, QSPI_MACRONIX_READ_CONFIG_REG_OPCODE, 0xFF);
117 qspi_macronix_write_status_and_config_reg(
id, status_reg, config_reg);
122 __DBG_QSPI_VOLATILE__ uint8_t is_suspended;
124 is_suspended = qspi_macronix_read_register(
id, QSPI_MACRONIX_READ_SECURITY_REG_OPCODE,
125 QSPI_MACRONIX_SECURITY_REG_SUSPEND_MASK);
126 return (
bool) is_suspended;
133 is_busy = (
HW_QSPI_BUSY_LEVEL) (qspi_macronix_read_status_reg(
id) & QSPI_STATUS_REG_BUSY_MASK);
135 return (
bool) (is_busy == busy_level);