hw_bod_da1459x.h

Go to the documentation of this file.

 
#ifndef HW_BOD_DA1459x_H_
#define HW_BOD_DA1459x_H_
 
 
#include "sdk_defs.h"
 
typedef enum {
        HW_BOD_CHANNEL_1V8         = REG_POS(CRG_TOP, BOD_CTRL_REG, BOD_DIS_VDDIO_COMP),   
        HW_BOD_CHANNEL_VDCDC       = REG_POS(CRG_TOP, BOD_CTRL_REG, BOD_DIS_VDCDC_COMP),   
        HW_BOD_CHANNEL_VDD         = REG_POS(CRG_TOP, BOD_CTRL_REG, BOD_DIS_VDD_COMP)      
} HW_BOD_CHANNEL;
 
#if dg_configUSE_BOD
 
typedef enum {
        HW_BOD_VDD_LEVEL_SLEEP_0V70        = 700,
        HW_BOD_VDD_LEVEL_ACTIVE_0V78       = 780,
        HW_BOD_VDD_LEVEL_ACTIVE_1V05       = 1050,
        HW_BOD_VDD_LEVEL_UNDEF             = UINT16_MAX,
} HW_BOD_VDD_LVL;
 
__STATIC_FORCEINLINE void hw_bod_activate_channel(HW_BOD_CHANNEL channel)
{
        switch (channel) {
        case HW_BOD_CHANNEL_1V8:
                REG_CLR_BIT(CRG_TOP, BOD_CTRL_REG, BOD_VDDIO_MASK);
                while (REG_GETF(CRG_TOP, STARTUP_STATUS_REG, BOD_VDDIO_MASK_SYNC_RD));
                break;
        case HW_BOD_CHANNEL_VDCDC:
                REG_CLR_BIT(CRG_TOP, BOD_CTRL_REG, BOD_VDCDC_MASK);
                while (REG_GETF(CRG_TOP, STARTUP_STATUS_REG, BOD_VDCDC_MASK_SYNC_RD));
                break;
        case HW_BOD_CHANNEL_VDD:
                REG_CLR_BIT(CRG_TOP, BOD_CTRL_REG, BOD_VDD_MASK);
                while (REG_GETF(CRG_TOP, STARTUP_STATUS_REG, BOD_VDDD_MASK_SYNC_RD));
                break;
        default:
                /* Invalid channel, we should not reach here. */
                ASSERT_WARNING(0);
        }
}
 
__STATIC_FORCEINLINE void hw_bod_deactivate_channel(HW_BOD_CHANNEL channel)
{
        switch (channel) {
        case HW_BOD_CHANNEL_1V8:
                REG_SET_BIT(CRG_TOP, BOD_CTRL_REG, BOD_VDDIO_MASK);
                while (!REG_GETF(CRG_TOP, STARTUP_STATUS_REG, BOD_VDDIO_MASK_SYNC_RD));
                break;
        case HW_BOD_CHANNEL_VDCDC:
                REG_SET_BIT(CRG_TOP, BOD_CTRL_REG, BOD_VDCDC_MASK);
                while (!REG_GETF(CRG_TOP, STARTUP_STATUS_REG, BOD_VDCDC_MASK_SYNC_RD));
                break;
        case HW_BOD_CHANNEL_VDD:
                REG_SET_BIT(CRG_TOP, BOD_CTRL_REG, BOD_VDD_MASK);
                while (!REG_GETF(CRG_TOP, STARTUP_STATUS_REG, BOD_VDDD_MASK_SYNC_RD));
                break;
        default:
                /* Invalid channel, we should not reach here. */
                ASSERT_WARNING(0);
        }
}
 
void hw_bod_set_channel_voltage_level(HW_BOD_CHANNEL channel, HW_BOD_VDD_LVL level);
 
HW_BOD_VDD_LVL hw_bod_get_channel_voltage_level(HW_BOD_CHANNEL channel);
 
void hw_bod_configure(void);
 
#endif /* dg_configUSE_BOD */
 
bool hw_bod_get_status(HW_BOD_CHANNEL channel);
 
void hw_bod_deactivate(void);
 
 
#endif /* HW_BOD_DA1459x_H_ */