DMA Controller. More...

Files
file	hw_dma.h
	Definition of API for the DMA Low Level Driver.

Data Structures
struct	DMA_setup
	DMA parameters structure. More...

struct	hw_dma_periph_prio_t
	DMA peripherals priority structure. More...

Typedefs
typedef uint32_t	dma_size_t
	DMA transfer size type. More...

typedef void(*	hw_dma_transfer_cb) (void *user_data, dma_size_t len)
	DMA channel transfer callback. More...

Enumerations
enum	HW_DMA_CHANNEL { HW_DMA_CHANNEL_0 = 0, HW_DMA_CHANNEL_1 = 1, HW_DMA_CHANNEL_2 = 2, HW_DMA_CHANNEL_3 = 3, HW_DMA_CHANNEL_4 = 4, HW_DMA_CHANNEL_5 = 5, HW_DMA_CHANNEL_INVALID }
	DMA channel number. More...

enum	HW_DMA_STATE { HW_DMA_STATE_DISABLED = 0x0, HW_DMA_STATE_ENABLED = 0x1 }
	DMA channel enable/disable. More...

enum	HW_DMA_BW { HW_DMA_BW_BYTE = 0x0, HW_DMA_BW_HALFWORD = 0x2, HW_DMA_BW_WORD = 0x4 }
	DMA channel bus width transfer. More...

enum	HW_DMA_IRQ_STATE { HW_DMA_IRQ_STATE_DISABLED = 0x0, HW_DMA_IRQ_STATE_ENABLED = 0x8 }
	DMA channel interrupt enable/disable. More...

enum	HW_DMA_DREQ { HW_DMA_DREQ_START = 0x0, HW_DMA_DREQ_TRIGGERED = DMA_DMA0_CTRL_REG_DREQ_MODE_Msk }
	DMA request input multiplexer controlled. More...

enum	HW_DMA_BURST_MODE { HW_DMA_BURST_MODE_DISABLED = 0x0, HW_DMA_BURST_MODE_4x = 0x2000, HW_DMA_BURST_MODE_8x = 0x4000 }
	DMA channel burst mode. More...

enum	HW_DMA_BINC { HW_DMA_BINC_FALSE = 0x0, HW_DMA_BINC_TRUE = DMA_DMA0_CTRL_REG_BINC_Msk }
	Increment destination address mode. More...

enum	HW_DMA_AINC { HW_DMA_AINC_FALSE = 0x0, HW_DMA_AINC_TRUE = DMA_DMA0_CTRL_REG_AINC_Msk }
	Increment of source address mode. More...

enum	HW_DMA_MODE { HW_DMA_MODE_NORMAL = 0x0, HW_DMA_MODE_CIRCULAR = DMA_DMA0_CTRL_REG_CIRCULAR_Msk }
	Channel mode. More...

enum	HW_DMA_PRIO { HW_DMA_PRIO_0 = 0x000, HW_DMA_PRIO_1 = 0x080, HW_DMA_PRIO_2 = 0x100, HW_DMA_PRIO_3 = 0x180, HW_DMA_PRIO_4 = 0x200, HW_DMA_PRIO_5 = 0x280, HW_DMA_PRIO_6 = 0x300, HW_DMA_PRIO_7 = 0x380 }
	Channel priority. More...

enum	HW_DMA_IDLE { HW_DMA_IDLE_BLOCKING_MODE = 0x000, HW_DMA_IDLE_INTERRUPTING_MODE = DMA_DMA0_CTRL_REG_DMA_IDLE_Msk }
	DMA idle mode. More...

enum	HW_DMA_INIT { HW_DMA_INIT_AX_BX_AY_BY = 0x0000, HW_DMA_INIT_AX_BX_BY = DMA_DMA0_CTRL_REG_DMA_INIT_Msk }
	DMA init mode. More...

enum	HW_DMA_TRIG
	Channel request trigger. More...

Functions
void	hw_dma_channel_initialization (DMA_setup *channel_setup)
	Initialize DMA Channel. More...

void	hw_dma_channel_update_source (HW_DMA_CHANNEL channel, void *addr, dma_size_t length, hw_dma_transfer_cb cb)
	Update DMA source address and length. More...

void	hw_dma_channel_update_destination (HW_DMA_CHANNEL channel, void *addr, dma_size_t length, hw_dma_transfer_cb cb)
	Update DMA destination address and length. More...

void	hw_dma_channel_update_int_ix (HW_DMA_CHANNEL channel, uint16_t int_ix)
	Update DMA interrupt trigger index. More...

void	hw_dma_channel_enable (HW_DMA_CHANNEL channel_number, HW_DMA_STATE dma_on)
	Enable or disable a DMA channel. More...

void	hw_dma_channel_stop (HW_DMA_CHANNEL channel_number)
	Stop DMA channel if operation is in progress. More...

dma_size_t	hw_dma_transfered_bytes (HW_DMA_CHANNEL channel_number)
	Read number of transmitted bytes so far. More...

__STATIC_INLINE void	hw_dma_freeze (void)
	Freeze DMA. More...

__STATIC_INLINE void	hw_dma_unfreeze (void)
	Unfreeze DMA. More...

__STATIC_INLINE bool	hw_dma_is_aes_key_protection_enabled (void)
	Check if the aes key read protection is enabled. More...

__STATIC_INLINE bool	hw_dma_secure_channel_is_free (void)
	Check if the DMA secure channel is free. If any encryption protection is enabled (OQSPIF or AES), this functionality affects the secure DMA channel. Secure transfer requires this channel to be configured in a specific way. Hence, is strongly advised to avoid using this channel for other purposes. More...

__STATIC_INLINE bool	hw_dma_bus_error_detected (HW_DMA_CHANNEL channel_number)
	Check if a bus error response has been detected on a specific DMA channel. More...

bool	hw_dma_is_channel_active (HW_DMA_CHANNEL channel_number)
	Check if the corresponding DMA channel is active. More...

__RETAINED_CODE bool	hw_dma_channel_active (void)
	Check if any DMA channel is active. More...

Detailed Description

DMA Controller.

Typedef Documentation

◆ dma_size_t

typedef uint32_t dma_size_t

DMA transfer size type.

◆ hw_dma_transfer_cb

typedef void(* hw_dma_transfer_cb) (void *user_data, dma_size_t len)

DMA channel transfer callback.

This function is called by the DMA driver when the interrupt is fired.

Parameters

[in]	user_data	transfered data
[in]	len	length of transfered data

Enumeration Type Documentation

◆ HW_DMA_AINC

enum HW_DMA_AINC

Increment of source address mode.

Enumerator
HW_DMA_AINC_FALSE	Do not increment
HW_DMA_AINC_TRUE	Increment according value of BW

◆ HW_DMA_BINC

enum HW_DMA_BINC

Increment destination address mode.

Enumerator
HW_DMA_BINC_FALSE	Do not increment
HW_DMA_BINC_TRUE	Increment according value of BW

◆ HW_DMA_BURST_MODE

enum HW_DMA_BURST_MODE

DMA channel burst mode.

Enumerator
HW_DMA_BURST_MODE_DISABLED	DMA burst mode is disabled
HW_DMA_BURST_MODE_4x	DMA burst mode enabled, burst size of 4 data units is used
HW_DMA_BURST_MODE_8x	DMA burst mode enabled, burst size of 8 data units is used

◆ HW_DMA_BW

enum HW_DMA_BW

DMA channel bus width transfer.

Enumerator
HW_DMA_BW_BYTE	Byte
HW_DMA_BW_HALFWORD	Halfword
HW_DMA_BW_WORD	Word

◆ HW_DMA_CHANNEL

enum HW_DMA_CHANNEL

DMA channel number.

Enumerator
HW_DMA_CHANNEL_0	Channel number 0
HW_DMA_CHANNEL_1	Channel number 1
HW_DMA_CHANNEL_2	Channel number 2
HW_DMA_CHANNEL_3	Channel number 3
HW_DMA_CHANNEL_4	Channel number 4
HW_DMA_CHANNEL_5	Channel number 5
HW_DMA_CHANNEL_INVALID	Invalid Channel number

◆ HW_DMA_DREQ

enum HW_DMA_DREQ

DMA request input multiplexer controlled.

Enumerator
HW_DMA_DREQ_START	DMA channel starts immediately
HW_DMA_DREQ_TRIGGERED	DMA channel must be triggered by peripheral DMA request

◆ HW_DMA_IDLE

enum HW_DMA_IDLE

DMA idle mode.

In blocking mode the DMA performs a fast back-to-back copy, disabling bus access for any bus master with lower priority. In interrupting mode the DMA inserts a wait cycle after each store allowing the CR16 to steal cycles or cache to perform a burst read.

Note: if DREQ_MODE = 1, DMA_IDLE does not have any effect

Enumerator
HW_DMA_IDLE_BLOCKING_MODE	Blocking mode
HW_DMA_IDLE_INTERRUPTING_MODE	Interrupting mode

◆ HW_DMA_INIT

enum HW_DMA_INIT

DMA init mode.

Enumerator
HW_DMA_INIT_AX_BX_AY_BY	DMA performs copy A1 to B1, A2 to B2
HW_DMA_INIT_AX_BX_BY	DMA performs copy A1 to B1, B2

◆ HW_DMA_IRQ_STATE

enum HW_DMA_IRQ_STATE

DMA channel interrupt enable/disable.

Enumerator
HW_DMA_IRQ_STATE_DISABLED	Disable interrupt on this channel
HW_DMA_IRQ_STATE_ENABLED	Enable interrupt on this channel

◆ HW_DMA_MODE

enum HW_DMA_MODE

Channel mode.

In normal mode the DMA transfer stops the transfer after length DMAx_LEN_REG. In circular mode the DMA channel repeats the transfer after length DMAx_LEN_REG with the initial register values DMAx_A_START_REG, DMAx_B_START_REG, DMAx_LEN_REG, DMAx_INT_REG.

Note: only works if DREQ_MODE = 1

Enumerator
HW_DMA_MODE_NORMAL	Normal mode
HW_DMA_MODE_CIRCULAR	Circular mode

◆ HW_DMA_PRIO

enum HW_DMA_PRIO

Channel priority.

Set priority level of DMA channel to determine which DMA channel will be activated in case more than one DMA channel requests DMA.

Enumerator
HW_DMA_PRIO_0	Lowest priority
HW_DMA_PRIO_1	..
HW_DMA_PRIO_2	..
HW_DMA_PRIO_3	..
HW_DMA_PRIO_4	..
HW_DMA_PRIO_5	..
HW_DMA_PRIO_6	..
HW_DMA_PRIO_7	Highest priority

◆ HW_DMA_STATE

enum HW_DMA_STATE

DMA channel enable/disable.

Enumerator
HW_DMA_STATE_DISABLED	DMA disabled
HW_DMA_STATE_ENABLED	DMA enabled

◆ HW_DMA_TRIG

enum HW_DMA_TRIG

Channel request trigger.

Function Documentation

◆ hw_dma_bus_error_detected()

__STATIC_INLINE bool hw_dma_bus_error_detected ( HW_DMA_CHANNEL channel_number )

Check if a bus error response has been detected on a specific DMA channel.

Parameters

[in] channel_number DMA channel number

Returns: true, if a bus error response has been detected else false.

◆ hw_dma_channel_active()

__RETAINED_CODE bool hw_dma_channel_active ( void )

Check if any DMA channel is active.

Returns: true, if a channel is active else false.

◆ hw_dma_channel_enable()

void hw_dma_channel_enable	(	HW_DMA_CHANNEL	channel_number,
		HW_DMA_STATE	dma_on
	)

Enable or disable a DMA channel.

Parameters

[in]	channel_number	DMA Channel Number to start/stop
[in]	dma_on	enable/disable DMA channel

◆ hw_dma_channel_initialization()

void hw_dma_channel_initialization ( DMA_setup * channel_setup )

Initialize DMA Channel.

Parameters

[in] channel_setup pointer to struct of type DMA_Setup

◆ hw_dma_channel_stop()

void hw_dma_channel_stop ( HW_DMA_CHANNEL channel_number )

Stop DMA channel if operation is in progress.

If no transfer is in progress nothing happens. If there is outstanding DMA transfer it will be stopped and callback will be called with count of data already transfered

Parameters

[in] channel_number DMA channel number to stop

◆ hw_dma_channel_update_destination()

void hw_dma_channel_update_destination	(	HW_DMA_CHANNEL	channel,
		void *	addr,
		dma_size_t	length,
		hw_dma_transfer_cb	cb
	)

Update DMA destination address and length.

When DMA is configured for some peripheral, it could be enough to setup only destination address and data length. Other parameters most likely do not change for same type of transmission for values that ware specified in hw_dma_channel_initialization(). This function should speed up DMA start time when only address and size changes from previous transmission.

Parameters

[in]	channel	DMA channel number to modify
[in]	addr	new source address
[in]	length	new data transfer length
[in]	cb	function to call after transmission finishes

◆ hw_dma_channel_update_int_ix()

void hw_dma_channel_update_int_ix	(	HW_DMA_CHANNEL	channel,
		uint16_t	int_ix
	)

Update DMA interrupt trigger index.

DMA channel can trigger an interrupt after arbitrary transfer has finished. Usually interrupt is triggered after transmission finishes but for cyclic mode, where DMA never stops, it is convenient trigger interrupt at other times. This function allows to specify the number of transfers after which the interrupt is triggered.

Parameters

[in]	channel	DMA channel number to modify
[in]	int_ix	Number of transfers until the interrupt is triggered

◆ hw_dma_channel_update_source()

void hw_dma_channel_update_source	(	HW_DMA_CHANNEL	channel,
		void *	addr,
		dma_size_t	length,
		hw_dma_transfer_cb	cb
	)

Update DMA source address and length.

When DMA is configured for some peripheral, it could be enough to setup only source address and data length. Other parameters most likely do not change for same type of transmission for values that ware specified in hw_dma_channel_initialization(). This function should speed up DMA start time when only address and size changes from previous transmission.

Parameters

[in]	channel	DMA channel number to modify
[in]	addr	new source address
[in]	length	new data transfer length
[in]	cb	function to call after transmission finishes

◆ hw_dma_freeze()

__STATIC_INLINE void hw_dma_freeze ( void )

Freeze DMA.

◆ hw_dma_is_aes_key_protection_enabled()

__STATIC_INLINE bool hw_dma_is_aes_key_protection_enabled ( void )

Check if the aes key read protection is enabled.

Returns: true if aes key read protection is enabled, otherwise false

◆ hw_dma_is_channel_active()

bool hw_dma_is_channel_active ( HW_DMA_CHANNEL channel_number )

Check if the corresponding DMA channel is active.

Parameters

[in] channel_number DMA channel

Returns: true if the channel is active else false

◆ hw_dma_secure_channel_is_free()

__STATIC_INLINE bool hw_dma_secure_channel_is_free ( void )

Check if the DMA secure channel is free. If any encryption protection is enabled (OQSPIF or AES), this functionality affects the secure DMA channel. Secure transfer requires this channel to be configured in a specific way. Hence, is strongly advised to avoid using this channel for other purposes.

Returns: true if channel is free and can be used for general DMA purpose, otherwise false

Note: The encryption protection is enabled by the bootrom, if the corresponding sticky bit of the Configuration Script (CS) in OTP is enabled(in eflash for DA1459X).

◆ hw_dma_transfered_bytes()

dma_size_t hw_dma_transfered_bytes ( HW_DMA_CHANNEL channel_number )

Read number of transmitted bytes so far.

Use this function to see how many bytes were transfered via DMA channel so far. This number can changed very soon.

Parameters

[in] channel_number DMA channel number

Returns: number of bytes already transfered (when transfer is in progress), 0 - if transfer is already finished, undefined if called or not started channel

◆ hw_dma_unfreeze()

__STATIC_INLINE void hw_dma_unfreeze ( void )

Unfreeze DMA.

Files

Data Structures

Typedefs

Enumerations

Functions

Detailed Description

Typedef Documentation

◆ dma_size_t

◆ hw_dma_transfer_cb

Enumeration Type Documentation

◆ HW_DMA_AINC

◆ HW_DMA_BINC

◆ HW_DMA_BURST_MODE

◆ HW_DMA_BW

◆ HW_DMA_CHANNEL

◆ HW_DMA_DREQ

◆ HW_DMA_IDLE

◆ HW_DMA_INIT

◆ HW_DMA_IRQ_STATE

◆ HW_DMA_MODE

◆ HW_DMA_PRIO

◆ HW_DMA_STATE

◆ HW_DMA_TRIG

Function Documentation

◆ hw_dma_bus_error_detected()

◆ hw_dma_channel_active()

◆ hw_dma_channel_enable()

◆ hw_dma_channel_initialization()

◆ hw_dma_channel_stop()

◆ hw_dma_channel_update_destination()

◆ hw_dma_channel_update_int_ix()

◆ hw_dma_channel_update_source()

◆ hw_dma_freeze()

◆ hw_dma_is_aes_key_protection_enabled()

◆ hw_dma_is_channel_active()

◆ hw_dma_secure_channel_is_free()

◆ hw_dma_transfered_bytes()

◆ hw_dma_unfreeze()