Definition of API for the QSPI Low Level Driver. More...

#include <stdbool.h>
#include <stdint.h>
#include <sdk_defs.h>

Data Structures
union	hw_qspi_data_t
	This union is used in order to allow different size access when reading/writing to QSPIC_READDATA_REG, QSPIC_WRITEDATA_REG, QSPIC_DUMMYDATA_REG because. More...

struct	hw_qspi_config_t
	QSPIC configuration structure. More...

struct	hw_qspi_read_instr_config_t
	Read instruction configuration structure (auto access mode) More...

struct	hw_qspi_erase_instr_config_t
	QSPIC Erase instruction configuration structure (auto access mode) More...

struct	hw_qspi_read_status_instr_config_t
	QSPIC read status instruction configuration structure (auto access mode) More...

struct	hw_qspi_write_enable_instr_config_t
	QSPIC write enable instruction configuration structure (auto access mode) More...

struct	hw_qspi_page_program_instr_config_t
	QSPIC Page Program instruction configuration structure (manual access mode) More...

struct	hw_qspi_suspend_resume_instr_config_t
	QSPIC Erase suspend/resume instruction structure (auto access mode) More...

Macros
#define	HW_QSPIC_REG_GETF(id, reg, field)
	Get the value of a field of a QSPIC register. More...

#define	HW_QSPIC_REG_SETF(id, reg, field, new_val)
	Set the value of a field of a QSPIC register. More...

#define	HW_QSPIC_REG_SET_BIT(id, reg, field) QSPIBA(id)->QSPIC_##reg##_REG \|= (1 << QSPIC_QSPIC_##reg##_REG_##QSPIC_##field##_Pos)
	Set a bit of a QSPIC register. More...

#define	HW_QSPIC_REG_CLR_BIT(id, reg, field) QSPIBA(id)->QSPIC_##reg##_REG &= ~QSPIC_QSPIC_##reg##_REG_##QSPIC_##field##_Msk
	Clear a bit of a QSPIC register. More...

Typedefs
typedef void *	HW_QSPIC_ID
	QSPI Controller ID. More...

Enumerations
enum	HW_QSPI_ACCESS_MODE { HW_QSPI_ACCESS_MODE_MANUAL = 0, HW_QSPI_ACCESS_MODE_AUTO = 1 }
	QSPIC memory access mode. More...

enum	HW_QSPI_ADDR_SIZE { HW_QSPI_ADDR_SIZE_24 = 0, HW_QSPI_ADDR_SIZE_32 = 1 }
	QSPIC memory address size. More...

enum	HW_QSPI_BUS_MODE { HW_QSPI_BUS_MODE_SINGLE = 0, HW_QSPI_BUS_MODE_DUAL = 1, HW_QSPI_BUS_MODE_QUAD = 2 }
	QSPIC bus mode. More...

enum	HW_QSPI_BUS_STATUS { HW_QSPI_BUS_STATUS_IDLE = 0, HW_QSPI_BUS_STATUS_ACTIVE = 1 }
	QSPIC Bus status. More...

enum	HW_QSPI_BUSY_LEVEL { HW_QSPI_BUSY_LEVEL_LOW = 0, HW_QSPI_BUSY_LEVEL_HIGH = 1 }
	QSPIC device busy status setting. More...

enum	HW_QSPI_CLK_DIV { HW_QSPI_CLK_DIV_1 = 0, HW_QSPI_CLK_DIV_2 = 1, HW_QSPI_CLK_DIV_4 = 2, HW_QSPI_CLK_DIV_8 = 3 }
	QSPIC clock divider. More...

enum	HW_QSPI_CLK_MODE { HW_QSPI_CLK_MODE_LOW = 0, HW_QSPI_CLK_MODE_HIGH = 1 }
	QSPIC clock mode. More...

enum	HW_QSPI_CONTINUOUS_MODE { HW_QSPI_CONTINUOUS_MODE_DISABLE = 0, HW_QSPI_CONTINUOUS_MODE_ENABLE = 1 }
	QSPIC continuous mode. More...

enum	HW_QSPI_DRIVE_CURRENT { HW_QSPI_DRIVE_CURRENT_4 = 0, HW_QSPI_DRIVE_CURRENT_8 = 1, HW_QSPI_DRIVE_CURRENT_12 = 2, HW_QSPI_DRIVE_CURRENT_16 = 3 }
	QSPIC pads drive current strength. More...

enum	HW_QSPI_EXTRA_BYTE { HW_QSPI_EXTRA_BYTE_DISABLE = 0, HW_QSPI_EXTRA_BYTE_ENABLE = 1 }
	QSPIC extra byte setting in auto access mode. More...

enum	HW_QSPI_EXTRA_BYTE_HALF { HW_QSPI_EXTRA_BYTE_HALF_DISABLE = 0, HW_QSPI_EXTRA_BYTE_HALF_ENABLE = 1 }
	QSPIC extra byte half setting in auto access mode. More...

enum	HW_QSPI_HREADY_MODE { HW_QSPI_HREADY_MODE_WAIT = 0, HW_QSPI_HREADY_MODE_NO_WAIT = 1 }
	QSPIC HREADY signal mode when accessing the WRITEDATA, READDATA and DUMMYDATA registers. More...

enum	HW_QSPI_IO_DIR { HW_QSPI_IO_DIR_AUTO_SEL = 0, HW_QSPI_IO_DIR_OUTPUT = 1 }
	QSPIC pad direction. More...

enum	HW_QSPI_IO_VALUE { HW_QSPI_IO_VALUE_LOW = 0, HW_QSPI_IO_VALUE_HIGH = 1 }
	QSPIC IO2/IO3 pad value. More...

enum	HW_QSPI_READ_PIPE { HW_QSPI_READ_PIPE_DISABLE = 0, HW_QSPI_READ_PIPE_ENABLE = 1 }
	QSPIC read pipe setting. More...

enum	HW_QSPI_READ_PIPE_DELAY { HW_QSPI_READ_PIPE_DELAY_0 = 0, HW_QSPI_READ_PIPE_DELAY_1 = 1, HW_QSPI_READ_PIPE_DELAY_2 = 2, HW_QSPI_READ_PIPE_DELAY_3 = 3, HW_QSPI_READ_PIPE_DELAY_4 = 4, HW_QSPI_READ_PIPE_DELAY_5 = 5, HW_QSPI_READ_PIPE_DELAY_6 = 6, HW_QSPI_READ_PIPE_DELAY_7 = 7 }
	QSPIC Read pipe clock delay in relation to the falling edge of QSPI_SCK. More...

enum	HW_QSPI_SAMPLING_EDGE { HW_QSPI_SAMPLING_EDGE_POS = 0, HW_QSPI_SAMPLING_EDGE_NEG = 1 }
	QSPIC clock edge setting for the sampling of the incoming data when the read pipe is disabled. More...

enum	HW_QSPI_SLEW_RATE { HW_QSPI_SLEW_RATE_0 = 0, HW_QSPI_SLEW_RATE_1 = 1, HW_QSPI_SLEW_RATE_2 = 2, HW_QSPI_SLEW_RATE_3 = 3 }
	QSPIC pads slew rate. More...

enum	HW_QSPI_ERASE_STATUS { HW_QSPI_ERASE_STATUS_NO = 0, HW_QSPI_ERASE_STATUS_PENDING = 1, HW_QSPI_ERASE_STATUS_RUNNING = 2, HW_QSPI_ERASE_STATUS_SUSPENDED = 3, HW_QSPI_ERASE_STATUS_FINISHING = 4 }
	The status of sector/block erasing. More...

Functions
__STATIC_FORCEINLINE void	hw_qspi_clock_enable (HW_QSPIC_ID id)
	Enable QSPI controller clock. More...

__STATIC_FORCEINLINE void	hw_qspi_clock_disable (HW_QSPIC_ID id)
	Disable QSPI controller clock. More...

__STATIC_FORCEINLINE void	hw_qspi_cs_enable (HW_QSPIC_ID id)
	Enable CS on QSPI bus in manual access mode. More...

__STATIC_FORCEINLINE void	hw_qspi_cs_disable (HW_QSPIC_ID id)
	Disable CS on QSPI bus in manual access mode. More...

__STATIC_FORCEINLINE HW_QSPI_BUS_STATUS	hw_qspi_get_bus_status (HW_QSPIC_ID id)
	Get QSPIC Bus status. More...

__STATIC_FORCEINLINE void	hw_qspi_set_div (HW_QSPIC_ID id, HW_QSPI_CLK_DIV div)
	Set QSPIC clock divider. More...

__STATIC_FORCEINLINE HW_QSPI_CLK_DIV	hw_qspi_get_div (HW_QSPIC_ID id)
	Get QSPIC clock divider. More...

__STATIC_FORCEINLINE void	hw_qspi_set_manual_access_bus_mode (HW_QSPIC_ID id, HW_QSPI_BUS_MODE bus_mode)
	Set QSPIC bus mode in manual access mode. More...

__STATIC_FORCEINLINE void	hw_qspi_set_access_mode (HW_QSPIC_ID id, HW_QSPI_ACCESS_MODE access_mode)
	Set QSPIC access mode. More...

__STATIC_FORCEINLINE HW_QSPI_ACCESS_MODE	hw_qspi_get_access_mode (HW_QSPIC_ID id)
	Get QSPIC access mode. More...

__STATIC_FORCEINLINE void	hw_qspi_set_clock_mode (HW_QSPIC_ID id, HW_QSPI_CLK_MODE clk_mode)
	Set QSPIC clock mode. More...

__STATIC_FORCEINLINE HW_QSPI_CLK_MODE	hw_qspi_get_clock_mode (HW_QSPIC_ID id)
	Get QSPIC clock mode. More...

__STATIC_FORCEINLINE void	hw_qspi_set_io2_direction (HW_QSPIC_ID id, HW_QSPI_IO_DIR dir)
	Set QSPI_IO2 direction. More...

__STATIC_FORCEINLINE HW_QSPI_IO_DIR	hw_qspi_get_io2_direction (HW_QSPIC_ID id)
	Get QSPI_IO2 direction. More...

__STATIC_FORCEINLINE void	hw_qspi_set_io3_direction (HW_QSPIC_ID id, HW_QSPI_IO_DIR dir)
	Set QSPI_IO3 direction. More...

__STATIC_FORCEINLINE HW_QSPI_IO_DIR	hw_qspi_get_io3_direction (HW_QSPIC_ID id)
	Get QSPI_IO3 direction. More...

__STATIC_FORCEINLINE void	hw_qspi_set_io2_value (HW_QSPIC_ID id, HW_QSPI_IO_VALUE value)
	Set the value of QSPI_IO2 pad when QSPI_IO2 direction is output. More...

__STATIC_FORCEINLINE HW_QSPI_IO_VALUE	hw_qspi_get_io2_value (HW_QSPIC_ID id)
	Get the value of QSPI_IO2 pad when QSPI_IO2 direction is output. More...

__STATIC_FORCEINLINE void	hw_qspi_set_io3_value (HW_QSPIC_ID id, HW_QSPI_IO_VALUE value)
	Set the value of QSPI_IO3 pad when QSPI_IO3 direction is output. More...

__STATIC_FORCEINLINE HW_QSPI_IO_VALUE	hw_qspi_get_io3_value (HW_QSPIC_ID id)
	Get the value of QSPI_IO3 pad when QSPI_IO3 direction is output. More...

__STATIC_FORCEINLINE void	hw_qspi_set_io (HW_QSPIC_ID id, HW_QSPI_BUS_MODE bus_mode)
	Set the direction and the level of QSPIC IOs based on the Bus Mode. More...

__STATIC_FORCEINLINE void	hw_qspi_set_hready_mode (HW_QSPIC_ID id, HW_QSPI_HREADY_MODE mode)
	Set QSPIC HReady signal mode. More...

__STATIC_FORCEINLINE HW_QSPI_HREADY_MODE	hw_qspi_get_hready_mode (HW_QSPIC_ID id)
	Get QSPIC HReady signal mode. More...

__STATIC_FORCEINLINE void	hw_qspi_set_read_sampling_edge (HW_QSPIC_ID id, HW_QSPI_SAMPLING_EDGE edge)
	Set QSPIC read sampling edge. More...

__STATIC_FORCEINLINE HW_QSPI_SAMPLING_EDGE	hw_qspi_get_read_sampling_edge (HW_QSPIC_ID id)
	Get QSPIC read sampling edge. More...

__STATIC_FORCEINLINE void	hw_qspi_set_read_pipe (HW_QSPIC_ID id, HW_QSPI_READ_PIPE read_pipe)
	Set QSPIC data read pipe status. More...

__STATIC_FORCEINLINE HW_QSPI_READ_PIPE	hw_qspi_get_read_pipe (HW_QSPIC_ID id)
	Get QSPIC read pipe status. More...

__STATIC_FORCEINLINE void	hw_qspi_set_read_pipe_clock_delay (HW_QSPIC_ID id, HW_QSPI_READ_PIPE_DELAY delay)
	Set the QSPIC read pipe clock delay. More...

__STATIC_FORCEINLINE HW_QSPI_READ_PIPE_DELAY	hw_qspi_get_read_pipe_clock_delay (HW_QSPIC_ID id)
	Get QSPIC read pipe clock delay. More...

__STATIC_FORCEINLINE void	hw_qspi_set_address_size (HW_QSPIC_ID id, HW_QSPI_ADDR_SIZE addr_size)
	Set QSPIC address size. More...

__STATIC_FORCEINLINE HW_QSPI_ADDR_SIZE	hw_qspi_get_address_size (HW_QSPIC_ID id)
	Get QSPIC address size. More...

__STATIC_FORCEINLINE void	hw_qspi_set_slew_rate (HW_QSPIC_ID id, HW_QSPI_SLEW_RATE slew_rate)
	Set slew rate of QSPIC pads. More...

__STATIC_FORCEINLINE HW_QSPI_SLEW_RATE	hw_qspi_get_slew_rate (HW_QSPIC_ID id)
	Get slew rate of QSPIC pads. More...

__STATIC_FORCEINLINE void	hw_qspi_set_drive_current (HW_QSPIC_ID id, HW_QSPI_DRIVE_CURRENT drive_current)
	Set drive current of QSPIC pads. More...

__STATIC_FORCEINLINE HW_QSPI_DRIVE_CURRENT	hw_qspi_get_drive_current (HW_QSPIC_ID id)
	Get drive current of QSPIC pads. More...

__STATIC_FORCEINLINE void	hw_qspi_set_dummy_bytes (HW_QSPIC_ID id, uint8_t dummy_bytes)
	Set the number of dummy bytes in auto access mode. More...

__STATIC_FORCEINLINE uint8_t	hw_qspi_get_dummy_bytes (HW_QSPIC_ID id)
	Get the number of dummy bytes in auto access mode. More...

__STATIC_FORCEINLINE void	hw_qspi_set_read_cs_idle_delay (HW_QSPIC_ID id, uint16_t cs_idle_delay_nsec, uint32_t clk_freq_hz)
	Set the minimum number of clocks cycles that CS stays in idle mode, between two consecutive read commands. More...

__STATIC_FORCEINLINE void	hw_qspi_set_erase_cs_idle_delay (HW_QSPIC_ID id, uint16_t cs_idle_delay_nsec, uint32_t clk_freq_hz)
	Set the minimum number of clocks cycles that CS stays in idle mode, between a write enable, erase, erase suspend and erase resume instruction and the next consecutive command. More...

__STATIC_FORCEINLINE uint32_t	hw_qspi_read32 (HW_QSPIC_ID id)
	Generate 32 bits data transfer from the external device to the QSPIC (manual mode) More...

__STATIC_FORCEINLINE uint16_t	hw_qspi_read16 (HW_QSPIC_ID id)
	Generate 16 bits data transfer from the external device to the QSPIC (manual mode) More...

__STATIC_FORCEINLINE uint8_t	hw_qspi_read8 (HW_QSPIC_ID id)
	Generate 8 bits data transfer from the external device to the QSPIC (manual mode) More...

__STATIC_FORCEINLINE void	hw_qspi_write32 (HW_QSPIC_ID id, uint32_t data)
	Generate 32 bits data transfer from the QSPIC to the external device (manual mode) More...

__STATIC_FORCEINLINE void	hw_qspi_write16 (HW_QSPIC_ID id, uint16_t data)
	Generate 16 bits data transfer from the QSPIC to the external device (manual mode) More...

__STATIC_FORCEINLINE void	hw_qspi_write8 (HW_QSPIC_ID id, uint8_t data)
	Generate 8 bits data transfer from the QSPIC to the external device (manual mode) More...

__STATIC_FORCEINLINE void	hw_qspi_dummy32 (HW_QSPIC_ID id)
	Generate clock pulses on the SPI bus for a 32-bit transfer. More...

__STATIC_FORCEINLINE void	hw_qspi_dummy16 (HW_QSPIC_ID id)
	Generate clock pulses on the SPI bus for a 16-bit transfer. More...

__STATIC_FORCEINLINE void	hw_qspi_dummy8 (HW_QSPIC_ID id)
	Generate clock pulses on the SPI bus for an 8-bit transfer. More...

__RETAINED_CODE void	hw_qspi_init (HW_QSPIC_ID id, const hw_qspi_config_t *cfg)
	Initialize the QSPI controller (QSPIC) More...

__STATIC_FORCEINLINE void	hw_qspi_read_instr_init (HW_QSPIC_ID id, const hw_qspi_read_instr_config_t *cfg, uint8_t dummy_bytes, uint32_t sys_clk_freq_hz)
	Initialize the read instruction of the QSPIC. More...

__STATIC_FORCEINLINE void	hw_qspi_erase_instr_init (HW_QSPIC_ID id, const hw_qspi_erase_instr_config_t *cfg, uint32_t sys_clk_freq_hz)
	Initialize the erase instruction of the QSPIC. More...

__STATIC_FORCEINLINE void	hw_qspi_read_status_instr_init (HW_QSPIC_ID id, const hw_qspi_read_status_instr_config_t *cfg, uint32_t sys_clk_freq_hz)
	Initialize the read status register instruction of the QSPIC. More...

__STATIC_FORCEINLINE void	hw_qspi_write_enable_instr_init (HW_QSPIC_ID id, const hw_qspi_write_enable_instr_config_t *cfg)
	Initialize the write enable instruction of the QSPIC. More...

__STATIC_FORCEINLINE void	hw_qspi_suspend_resume_instr_init (HW_QSPIC_ID id, const hw_qspi_suspend_resume_instr_config_t *cfg)
	Initialize the program and erase suspend/resume instruction of the QSPIC. More...

__STATIC_FORCEINLINE void	hw_qspi_exit_continuous_mode_instr_init (HW_QSPIC_ID id, HW_QSPI_CONTINUOUS_MODE mode, HW_QSPI_ADDR_SIZE addr_size)
	Initialize the exit from continuous mode instruction of the QSPIC. More...

__STATIC_FORCEINLINE void	hw_qspi_set_erase_address (HW_QSPIC_ID id, uint32_t erase_addr)
	Set the address of the block/sector that is requested to be erased. More...

__STATIC_FORCEINLINE void	hw_qspi_trigger_erase (HW_QSPIC_ID id)
	Trigger erase block/sector. More...

__STATIC_FORCEINLINE HW_QSPI_ERASE_STATUS	hw_qspi_get_erase_status (HW_QSPIC_ID id)
	Get erase status. More...

__RETAINED_CODE void	hw_qspi_erase_block (HW_QSPIC_ID id, uint32_t addr)
	Erase block/sector of flash memory. More...

__STATIC_FORCEINLINE void	hw_qspi_set_extra_byte (HW_QSPIC_ID id, uint8_t extra_byte, HW_QSPI_BUS_MODE bus_mode, bool half_disable_out)
	Set an extra byte to use with read instructions. More...

__STATIC_FORCEINLINE void	hw_qspi_exit_continuous_mode_sequence_enable (HW_QSPIC_ID id)
	Enable the 'exit from continuous read mode' sequence in automode. More...

__STATIC_FORCEINLINE void	hw_qspi_exit_continuous_mode_sequence_disable (HW_QSPIC_ID id)
	Disable the 'exit from continuous read mode' sequence in automode. More...

Detailed Description

Definition of API for the QSPI Low Level Driver.

This software ("Software") is supplied by Renesas Electronics Corporation and/or its affiliates ("Renesas"). Renesas grants you a personal, non-exclusive, non-transferable, revocable, non-sub-licensable right and license to use the Software, solely if used in or together with Renesas products. You may make copies of this Software, provided this copyright notice and disclaimer ("Notice") is included in all such copies. Renesas reserves the right to change or discontinue the Software at any time without notice.

THE SOFTWARE IS PROVIDED "AS IS". RENESAS DISCLAIMS ALL WARRANTIES OF ANY KIND, WHETHER EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. TO THE MAXIMUM EXTENT PERMITTED UNDER LAW, IN NO EVENT SHALL RENESAS BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE, EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. USE OF THIS SOFTWARE MAY BE SUBJECT TO TERMS AND CONDITIONS CONTAINED IN AN ADDITIONAL AGREEMENT BETWEEN YOU AND RENESAS. IN CASE OF CONFLICT BETWEEN THE TERMS OF THIS NOTICE AND ANY SUCH ADDITIONAL LICENSE AGREEMENT, THE TERMS OF THE AGREEMENT SHALL TAKE PRECEDENCE. BY CONTINUING TO USE THIS SOFTWARE, YOU AGREE TO THE TERMS OF THIS NOTICE.IF YOU DO NOT AGREE TO THESE TERMS, YOU ARE NOT PERMITTED TO USE THIS SOFTWARE.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description