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SmartSnippets DA1459x SDK
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DW registers (DW) More...
#include <DA1459x-00.h>
Data Fields | |
| __IOM uint32_t | AHB_DMA_PL1_REG |
| __IOM uint32_t | AHB_DMA_PL2_REG |
| __IOM uint32_t | AHB_DMA_PL3_REG |
| __IOM uint32_t | AHB_DMA_PL4_REG |
| __IOM uint32_t | AHB_DMA_DFLT_MASTER_REG |
| __IOM uint32_t | AHB_DMA_WTEN_REG |
| __IOM uint32_t | AHB_DMA_TCL_REG |
| __IOM uint32_t | AHB_DMA_CCLM1_REG |
| __IOM uint32_t | AHB_DMA_CCLM2_REG |
| __IOM uint32_t | AHB_DMA_CCLM3_REG |
| __IOM uint32_t | AHB_DMA_CCLM4_REG |
| __IOM uint32_t | AHB_DMA_VERSION_REG |
DW registers (DW)
| __IOM uint32_t DW_Type::AHB_DMA_CCLM1_REG |
(@ 0x00000054) RFTP Master clock tokens (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_CCLM2_REG |
(@ 0x00000058) GPDMA Master clock tokens (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_CCLM3_REG |
(@ 0x0000005C) CRYPTO-DMA Master clock tokens (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_CCLM4_REG |
(@ 0x00000060) DRA Master clock tokens (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_DFLT_MASTER_REG |
(@ 0x00000048) Default master ID number (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_PL1_REG |
< (@ 0x30020000) DW Structure
(@ 0x00000000) AHB-DMA layer priority level for RFTP (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_PL2_REG |
(@ 0x00000004) AHB-DMA layer priority level for GPDMA (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_PL3_REG |
(@ 0x00000008) AHB-DMA layer Priority level for CRYPTO-DMA (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_PL4_REG |
(@ 0x0000000C) AHB-DMA layer Priority level for DRA (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_TCL_REG |
(@ 0x00000050) Master clock refresh period (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_VERSION_REG |
(@ 0x00000090) Version ID (AHB DMA layer only)
| __IOM uint32_t DW_Type::AHB_DMA_WTEN_REG |
(@ 0x0000004C) Weighted-Token Arbitration Scheme Enable (AHB DMA layer only)
1.8.16