sdk_defs.h

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#ifndef __SDK_DEFS_H__
#define __SDK_DEFS_H__
 
#include <stddef.h>
 
#ifdef __cplusplus
 extern "C" {
#endif
 
#ifdef __GNUC__
#  define GCC_VERSION (__GNUC__ * 10000 \
                               + __GNUC_MINOR__ * 100 \
                               + __GNUC_PATCHLEVEL__)
/* assert gcc version is at least 4.9.3 */
#  if GCC_VERSION < 40903
#    error "Please use gcc version 4.9.3 or newer!"
#  endif
#endif
 
#   include "DA1459x-00.h"
 
#include "system_DA1459x.h"                         /* DA1459x System */
 
#define MTB_MASTER_REG                          ((uint32_t *) 0xE0043004)
#define MTB_MASTER_REG_DISABLE_VAL              (dg_configMTB_MASK)
 
 
/************************
 * Memory map
 ************************/
 
#define MEMORY_REMAPPED_BASE    0x00000000UL
 /* The max remapped  region size according to FLASH_REGION_SIZE register field */
#define MEMORY_REMAPPED_END     0x02000000UL
 
#define MEMORY_REMAPPED_SIZE    (MEMORY_REMAPPED_END - MEMORY_REMAPPED_BASE)
 
#define MEMORY_ROM_BASE         0x900000UL
#define MEMORY_ROM_END          (MEMORY_ROM_BASE + 0x48000L)
 
#define MEMORY_ROM_SIZE         (MEMORY_ROM_END - MEMORY_ROM_BASE)
 
#define MEMORY_SYSRAM_S_BASE    0x20000000UL
#define MEMORY_SYSRAM_S_END     (MEMORY_SYSRAM_S_BASE + 0x18000UL)
 
#define MEMORY_SYSRAM_S_SIZE    (MEMORY_SYSRAM_S_END - MEMORY_SYSRAM_S_BASE)
 
#define MEMORY_SYSRAM_BASE      0x00800000UL
#define MEMORY_SYSRAM_END       (MEMORY_SYSRAM_BASE + 0x18000UL)
 
#define MEMORY_SYSRAM_SIZE      (MEMORY_SYSRAM_END - MEMORY_SYSRAM_BASE)
 
#define MEMORY_CACHERAM_BASE    0x36000000UL
#define MEMORY_CACHERAM_END     0x36002000UL
#define MEMORY_CMAC_CACHERAM_BASE       0x40108000UL
#define MEMORY_CMAC_CACHERAM_END        0x4010A000UL
 
#define MEMORY_CACHERAM_SIZE    (MEMORY_CACHERAM_END - MEMORY_CACHERAM_BASE)
#define MEMORY_CMAC_CACHERAM_SIZE       (MEMORY_CMAC_CACHERAM_END - MEMORY_CMAC_CACHERAM_BASE)
 
#define MEMORY_QSPIF_BASE       (0x16000000UL)
#define MEMORY_QSPIF_END        (MEMORY_QSPIF_BASE + 0x2000000UL)
 
#define MEMORY_QSPIF_S_BASE     (0x32000000UL)
#define MEMORY_QSPIF_S_END      (MEMORY_QSPIF_S_BASE + 0x2000000UL)
 
#define MEMORY_QSPIF_SIZE       (MEMORY_QSPIF_END - MEMORY_QSPIF_BASE)
 
#define MEMORY_EFLASH_BASE (0xA00000UL)
#define MEMORY_EFLASH_END  (MEMORY_EFLASH_BASE + 0x40800UL)
 
#define MEMORY_EFLASH_S_BASE (0x31000000UL)
#define MEMORY_EFLASH_S_END  (MEMORY_EFLASH_S_BASE + 0x40800UL)
 
#define MEMORY_EFLASH_SIZE (MEMORY_EFLASH_END - MEMORY_EFLASH_BASE)
 
#if defined(NVMS_PRODUCT_HEADER_PART_START)
# if (dg_configCODE_LOCATION == NON_VOLATILE_IS_EMBEDDED_FLASH) || \
     (dg_configCODE_LOCATION == NON_VOLATILE_IS_QSPI_FLASH)
#  define PRIMARY_PRODUCT_HEADER_BASE     (NVMS_PRODUCT_HEADER_PART_START)
# else
#  undef PRIMARY_PRODUCT_HEADER_BASE
# endif
#else
# if (dg_configCODE_LOCATION == NON_VOLATILE_IS_EMBEDDED_FLASH)
#  define PRIMARY_PRODUCT_HEADER_BASE     (EFLASH_MEM1_VIRTUAL_BASE_ADDR + 0x1000)
# elif (dg_configCODE_LOCATION == NON_VOLATILE_IS_QSPI_FLASH)
#  define PRIMARY_PRODUCT_HEADER_BASE     (QSPI_MEM1_VIRTUAL_BASE_ADDR + 0x1000)
# else
#  undef PRIMARY_PRODUCT_HEADER_BASE
# endif
#endif
 
#if (dg_configCODE_LOCATION == NON_VOLATILE_IS_EMBEDDED_FLASH)
#  define BACKUP_PRODUCT_HEADER_BASE      (PRIMARY_PRODUCT_HEADER_BASE + 0x800)
#elif (dg_configCODE_LOCATION == NON_VOLATILE_IS_QSPI_FLASH)
#  define BACKUP_PRODUCT_HEADER_BASE      (PRIMARY_PRODUCT_HEADER_BASE + 0x1000)
#else
#  undef BACKUP_PRODUCT_HEADER_BASE
#endif
 
 
#define MEMORY_EFLASH_USER_DATA_KEYS_BASE               (0x00000800UL)
#define MEMORY_EFLASH_USER_DATA_KEYS_END                (0x00000900UL)
#define MEMORY_EFLASH_USER_DATA_KEYS_REVOCATION_BASE    (0x000007C0UL)
#define MEMORY_EFLASH_USER_DATA_KEYS_REVOCATION_END     (0x000007DFUL)
#define MEMORY_EFLASH_USER_DATA_KEY_SIZE                (0x20)
 
 
#define WITHIN_RANGE(_a, _s, _e)        (((uint32_t)(_a) >= (uint32_t)(_s)) && ((uint32_t)(_a) < (uint32_t)(_e)))
 
#define IS_REMAPPED_ADDRESS(_a)         WITHIN_RANGE((_a), MEMORY_REMAPPED_BASE, MEMORY_REMAPPED_END)
 
#define IS_ROM_ADDRESS(_a)              WITHIN_RANGE((_a), MEMORY_ROM_BASE, MEMORY_ROM_END)
 
#define IS_SYSRAM_ADDRESS(_a)           WITHIN_RANGE((_a), MEMORY_SYSRAM_BASE, MEMORY_SYSRAM_END)
 
#define IS_SYSRAM_S_ADDRESS(_a)         WITHIN_RANGE((_a), MEMORY_SYSRAM_S_BASE, MEMORY_SYSRAM_S_END)
 
#define IS_CACHERAM_ADDRESS(_a)         WITHIN_RANGE((_a), MEMORY_CACHERAM_BASE, MEMORY_CACHERAM_END)
 
#define IS_QSPIF_ADDRESS(_a)            WITHIN_RANGE((_a), MEMORY_QSPIF_BASE, MEMORY_QSPIF_END)
 
#define IS_QSPIF_S_ADDRESS(_a)            WITHIN_RANGE((_a), MEMORY_QSPIF_S_BASE, MEMORY_QSPIF_S_END)
 
#define IS_EFLASH_ADDRESS(_a)      WITHIN_RANGE((_a), MEMORY_EFLASH_BASE, MEMORY_EFLASH_END)
 
#define IS_EFLASH_S_ADDRESS(_a)      WITHIN_RANGE((_a), MEMORY_EFLASH_S_BASE, MEMORY_EFLASH_S_END)
 
#define FLASH_SECTOR_SIZE              (0x1000)
 
 
 
 
#define EFLASH_MEM1_VIRTUAL_BASE_ADDR               (0x00000000)
 
#define QSPI_MEM1_VIRTUAL_BASE_ADDR                 (((EFLASH_MEM1_VIRTUAL_BASE_ADDR + MEMORY_EFLASH_SIZE) \
                                                     & ~(FLASH_SECTOR_SIZE - 1)) + FLASH_SECTOR_SIZE)
 
#define __RETAINED                      __attribute__((section("retention_mem_zi")))    // RetRAM0
#define __RETAINED_1                    __attribute__((section("retention_mem_1_zi")))  // RetRAM1
 
#define __RETAINED_RW                   __attribute__((section("retention_mem_init")))
 
#define __RETAINED_UNINIT               __attribute__((section("retention_mem_uninit")))
 
#define __RETAINED_CONST_INIT           __attribute__((section("retention_mem_const")))
 
#ifdef CONFIG_USE_BLE
#define __RETAINED_CMI                  __attribute__((section("retention_mem_cmi_zi")))
#else
#define __RETAINED_CMI                  __RETAINED
#endif /* CONFIG_USE_BLE */
 
#define __RETAIN_CODE_ATTR              __attribute__((section("text_retained"))) __attribute__((noinline)) __attribute__((optimize ("no-tree-switch-conversion")))
# if dg_configREDUCE_RETAINED_CODE
// When the code is executed from eFlash if dg_configREDUCE_RETAINED_CODE == 1, the __ALWAYS_RETAINED_CODE attribute is used to selectively
// retain only the necessary functions in SysRAM. When dg_configREDUCE_RETAINED_CODE is set to 0, the system requires more functions to be retained in SysRAM.
// The __RETAINED_CODE and __ALWAYS_RETAINED_CODE attributes determine which functions will be retained.
// When the code is executed from QSPI the dg_configREDUCE_RETAINED_CODE can only be set to 0. The __RETAINED_CODE and __ALWAYS_RETAINED_CODE attributes determine which functions
// will be retained in RAM. Please refer to definition of dg_configREDUCE_RETAINED_CODE for more details.
#  if ((dg_configCODE_LOCATION == NON_VOLATILE_IS_EMBEDDED_FLASH) && \
     (dg_configEXEC_MODE == MODE_IS_CACHED))
#  define __RETAINED_CODE
#  define __ALWAYS_RETAINED_CODE        __RETAIN_CODE_ATTR
#  else /* RAM build */
#  define __RETAINED_CODE
#  define __ALWAYS_RETAINED_CODE
#  endif
# else /* dg_configREDUCE_RETAINED_CODE == 0 */
#  if (((dg_configCODE_LOCATION == NON_VOLATILE_IS_QSPI_FLASH) || \
    (dg_configCODE_LOCATION == NON_VOLATILE_IS_EMBEDDED_FLASH)) && \
    (dg_configEXEC_MODE == MODE_IS_CACHED))
#  define __RETAINED_CODE               __RETAIN_CODE_ATTR
#  define __ALWAYS_RETAINED_CODE        __RETAIN_CODE_ATTR
#  else /* RAM build */
#  define __RETAINED_CODE
#  define __ALWAYS_RETAINED_CODE
#  endif
# endif /* dg_configREDUCE_RETAINED_CODE */
 
 
# if dg_configRETAIN_HOT_CODE
# define __RETAINED_HOT_CODE             __RETAINED_CODE
# else
# define __RETAINED_HOT_CODE
# endif
 
#define __UNUSED                __attribute__((unused))
 
#define __LTO_EXT               __attribute__((externally_visible))
 
// Forward declaration
__ALWAYS_RETAINED_CODE void hw_sys_assert_trigger_gpio(void);
 
#if (dg_configIMAGE_SETUP == DEVELOPMENT_MODE)
void assertion_functions_set_to_uninit(void);
void assertion_functions_set_to_init(void);
 
#define ASSERT_WARNING(a)       if (!(a)) {                                                                     \
                                        extern __NO_RETURN void (*assert_warning_func)(void);                   \
                                        register unsigned r4 __asm__("r4") = (uint32_t)&assert_warning_func;    \
                                        __asm__ volatile (                                                      \
                                                "  .syntax unified  \n"                                         \
                                                "LDR r4, [r4, #0]\n"                                            \
                                                "BX  r4 \n"                                                     \
                                                :                                                               \
                                                : "r" (r4)                                                      \
                                                : "r0","r1","r2","r3" /* force the compiler to avoid R0-R3 */   \
                                        );                                                                      \
                                        __builtin_unreachable();                                                \
                                }
#else
#define ASSERT_WARNING(a)       do { if (!(a)); } while (0);
#endif /* dg_configIMAGE_SETUP */
#define ASSERT_WARNING_UNINIT(a) ASSERT_WARNING(a)
 
#if (dg_configIMAGE_SETUP == DEVELOPMENT_MODE)
#define ASSERT_ERROR(a)         ASSERT_WARNING(a)
#else
#define ASSERT_ERROR(a)         if (!(a)) {                                                                     \
                                        __asm__ volatile (                                                      \
                                                "  .syntax unified  \n"                                         \
                                                "CPSID I\n"                                                     \
                                                "BKPT  2\n"                                                     \
                                                :                                                               \
                                                :                                                               \
                                                : "memory"                                                      \
                                        );                                                                      \
                                        __builtin_unreachable();                                                \
                                }
#endif /* dg_configIMAGE_SETUP */
 
#define ASSERT_ERROR_UNINIT(a)  ASSERT_ERROR(a)
 
#define GLOBAL_INT_DISABLE()                                                            \
        do {                                                                            \
                unsigned int __l_irq_rest;                                              \
                __ASM volatile ("mrs   %0, primask  \n\t"                               \
                              "mov   r1, $1     \n\t"                                   \
                              "msr   primask, r1  \n\t"                                 \
                              : "=r" (__l_irq_rest)                                     \
                              :                                                         \
                              : "r1"                                                    \
                              );                                                        \
               DBG_CONFIGURE_HIGH(CMN_TIMING_DEBUG, CMNDBG_CRITICAL_SECTION);
 
#define GLOBAL_INT_RESTORE()                                                            \
                if (__l_irq_rest == 0) {                                                \
                        DBG_CONFIGURE_LOW(CMN_TIMING_DEBUG, CMNDBG_CRITICAL_SECTION);   \
                }                                                                       \
                __ASM volatile ("msr   primask, %0  \n\t"                               \
                                                          :                             \
                                                          : "r" (__l_irq_rest)          \
                                                          :                             \
                                                          );                            \
        } while (0)
 
#define containingoffset(address, type, field) ((type*)((uint8*)(address)-(size_t)(&((type*)0)->field)))
 
#define MIN(a, b)  (((a) < (b)) ? (a) : (b))
 
#define MAX(a, b)  (((a) > (b)) ? (a) : (b))
 
#if defined(__GNUC__)
#define SWAP16(a) __builtin_bswap16(a)
#else
#define SWAP16(a) ((a<<8) | (a>>8))
#endif
 
#if defined(__GNUC__)
#define SWAP32(a) __builtin_bswap32(a)
#else
#define SWAP32(a) ((a>>24 & 0xff) | (a>>8 & 0xff00) | (a<<8 & 0xff0000) | (a<<24 & 0xff000000))
#endif
 
#if defined(__GNUC__)
#define DEPRECATED __attribute__((deprecated))
#else
#pragma message "Deprecated macro must be implemented for this compiler"
#define DEPRECATED
#endif
 
#if defined(__GNUC__)
#define DEPRECATED_MSG(msg) __attribute__((deprecated(msg)))
#else
#pragma message "Deprecated macro must be implemented for this compiler"
#define DEPRECATED_MSG(msg)
#endif
 
#if defined(__GNUC__)
#define DEPRECATED_MACRO(macro, msg) DEPRECATED_MSG(msg) __STATIC_INLINE void macro(void) {}
#else
#pragma message "Deprecated macro must be implemented for this compiler"
#define DEPRECATED_MACRO(macro, msg)
#endif
 
/* The following exist in ROM code */
void __aeabi_memcpy(void *dest, const void *src, size_t n);
void __aeabi_memmove(void *dest, const void *src, size_t n);
void __aeabi_memset(void *dest, size_t n, int c);
 
#define OPT_MEMCPY      __aeabi_memcpy
 
#define OPT_MEMMOVE     __aeabi_memmove
 
#define OPT_MEMSET(s, c, n)      __aeabi_memset(s, n, c)
 
#define REG_MSK(base, reg, field) \
        (base ## _ ## reg ## _ ## field ## _Msk)
 
#define REG_POS(base, reg, field) \
        (base ## _ ## reg ## _ ## field ## _Pos)
 
#define REG_GET_FIELD(base, reg, field, var) \
        ((var & (base ## _ ## reg ## _ ## field ## _Msk)) >> \
                (base ## _ ## reg ## _ ## field ## _Pos))
 
#define REG_SET_FIELD(base, reg, field, var, val) \
        var = ((var & ~((base ## _ ## reg ## _ ## field ## _Msk))) | \
                (((val) << (base ## _ ## reg ## _ ## field ## _Pos)) & \
                (base ## _ ## reg ## _ ## field ## _Msk)))
 
#define RAW_SET_FIELD(mem, mask, val) \
        mem = ((mem & ~((mask))) | (((val) << (__builtin_ctz(mask))) & (mask)))
 
#define REG_CLR_FIELD(base, reg, field, var) \
        var &= ~(base ## _ ## reg ## _ ## field ## _Msk)
 
#define REG_GET_ADDR_INDEXED(base, reg, interval, index) \
        ((&base->reg) + (((intptr_t) index) * ((interval) / sizeof(base->reg))))
 
#define REG_GETF_INDEXED(base, reg, field, interval, index) \
        (((*REG_GET_ADDR_INDEXED(base, reg, interval, index)) & \
            (base ## _ ## reg ## _ ## field ## _Msk)) >> (base ## _ ## reg ## _ ## field ## _Pos))
 
#define REG_GETF(base, reg, field) \
        (((base->reg) & (base##_##reg##_##field##_Msk)) >> (base##_##reg##_##field##_Pos))
 
#define RAW_GETF(addr, mask) \
        ((*(volatile uint32_t *)(addr) & (mask)) >> (__builtin_ctz(mask)))
 
#define REG_SETF(base, reg, field, new_val) \
                base->reg = ((base->reg & ~(base##_##reg##_##field##_Msk)) | \
                ((base##_##reg##_##field##_Msk) & ((new_val) << (base##_##reg##_##field##_Pos))))
 
#define RAW_SETF(addr, mask, val) \
                (*(volatile uint32_t *)(addr)) = ((*(volatile uint32_t *)(addr) & ~(mask)) | \
                ((mask) & ((val) << __builtin_ctz(mask))))
 
#define REG_SET_BIT(base, reg, field) \
        do { \
                base->reg |= (1 << (base##_##reg##_##field##_Pos)); \
         } while (0)
 
#define REG_CLR_BIT(base, reg, field) \
        do { \
                base->reg &= ~(base##_##reg##_##field##_Msk); \
         } while (0)
 
#define REG_SET_MASKED(base, reg, mask, value) \
        do { \
                base->reg = (base->reg & ~(mask)) | ((value) & (mask)); \
        } while (0)
 
#define RAW_SET_MASKED(addr, mask, value) \
        do { \
                (*(volatile uint32_t *)(addr)) = ((*(volatile uint32_t *)(addr)) & ~(mask)) | ((value) & (mask)); \
        } while (0)
 
#define BITS16(base, reg, field, v) \
        ((uint16_t) (((uint16_t) (v) << (base ## _ ## reg ## _ ## field ## _Pos)) & \
                (base ## _ ## reg ## _ ## field ## _Msk)))
 
#define BITS32(base, reg, field, v) \
        ((uint32_t) (((uint32_t) (v) << (base ## _ ## reg ## _ ## field ## _Pos)) & \
                (base ## _ ## reg ## _ ## field ## _Msk)))
 
#define GETBITS16(base, reg, v, field) \
        ((uint16_t) (((uint16_t) (v)) & (base ## _ ## reg ## _ ## field ## _Msk)) >> \
                (base ## _ ## reg ## _ ## field ## _Pos))
 
#define GETBITS32(base, reg, v, field) \
        ((uint32_t) (((uint32_t) (v)) & (base ## _ ## reg ## _ ## field ## _Msk)) >> \
                (base ## _ ## reg ## _ ## field ## _Pos))
 
#define ENABLE_DEBUGGER \
        do { \
                REG_SET_BIT(CRG_TOP, SYS_CTRL_REG, DEBUGGER_ENABLE); \
        } while (0)
 
#define ENABLE_CMAC_DEBUGGER \
        do { \
                CRG_TOP->SYS_CTRL_REG |= (1 << (6UL)); \
        } while (0)
 
#define DISABLE_DEBUGGER \
        do { \
                REG_CLR_BIT(CRG_TOP, SYS_CTRL_REG, DEBUGGER_ENABLE); \
        } while (0)
 
#define DISABLE_CMAC_DEBUGGER \
        do { \
                CRG_TOP->SYS_CTRL_REG &= ~(0x40UL); \
        } while (0)
 
#define SWRESET \
        do { \
                REG_SET_BIT(CRG_TOP, SYS_CTRL_REG, SW_RESET); \
        } while (0)
 
#define BIT0        0x01
#define BIT1        0x02
#define BIT2        0x04
#define BIT3        0x08
#define BIT4        0x10
#define BIT5        0x20
#define BIT6        0x40
#define BIT7        0x80
 
#define BIT8      0x0100
#define BIT9      0x0200
#define BIT10     0x0400
#define BIT11     0x0800
#define BIT12     0x1000
#define BIT13     0x2000
#define BIT14     0x4000
#define BIT15     0x8000
 
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
 
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
 
typedef unsigned char      uint8;   //  8 bits
typedef char               int8;    //  8 bits
typedef unsigned short     uint16;  // 16 bits
typedef short              int16;   // 16 bits
typedef unsigned long      uint32;  // 32 bits
typedef long               int32;   // 32 bits
typedef unsigned long long uint64;  // 64 bits
typedef long long          int64;   // 64 bits
 
/* See also "Data Types" on pag. 21 of the (Doulos) Cortex-M0 / SoC 1.0 training documentation. */
typedef unsigned char      BYTE;     //  8 bits = Byte
typedef unsigned short     HWORD;    // 16 bits = Halfword
typedef unsigned long      WORD;     // 32 bits = Word
typedef long long          DWORD;    // 64 bits = Doubleword
 
#define ARRAY_LENGTH(array) (sizeof((array))/sizeof((array)[0]))
 
#define NSEC_TO_CLK_CYCLES(nsec, clk_freq_hz)   ((((nsec) * ((clk_freq_hz) / 10000)) + 99999) / 100000)
 
 
#ifdef __cplusplus
}
#endif
 
#endif  /* __SDK_DEFS_H__ */