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SmartSnippets DA1459x SDK
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PCM interface. More...
Files | |
| file | hw_pcm.h |
| Definition of API for the PCM interface Low Level Driver. | |
Data Structures | |
| struct | hw_pcm_config_generic_pcm_t |
| PCM configuration in PCM mode. More... | |
| struct | hw_pcm_config_i2s_mode_t |
| PCM configuration in I2S mode. More... | |
| struct | hw_pcm_config_tdm_mode_t |
| PCM configuration in TDM mode. More... | |
| struct | hw_pcm_config_iom_mode_t |
| PCM configuration in IOM2 mode. More... | |
| struct | hw_pcm_config_t |
| PCM interface mode configuration. More... | |
| struct | hw_pcm_clk_cfg_t |
| PCM interface clock configuration. More... | |
Macros | |
| #define | HW_PCM_CRG_REG_GETF(reg, field) REG_GETF(CRG_AUD, PCM_##reg##_REG, field) |
| Get the value of a field of a PCM register of CRG. More... | |
| #define | HW_PCM_CRG_REG_SETF(reg, field, val) REG_SETF(CRG_AUD, PCM_##reg##_REG, field, val) |
| Set the value of a field of a PCM register of CRG. More... | |
| #define | HW_PCM_CRG_REG_SET_BIT(reg, field) REG_SET_BIT(CRG_AUD, PCM_##reg##_REG, field) |
| Set a bit of a PCM register of CRG. More... | |
| #define | HW_PCM_CRG_REG_CLR_BIT(reg, field) REG_CLR_BIT(CRG_AUD, PCM_##reg##_REG, field) |
| Clear a bit of a PCM register of CRG. More... | |
| #define | HW_PCM_SRC_REG_GETF(reg, field) REG_GETF(PCM1, PCM1_##reg##_REG, field) |
| Get the value of a field of a PCM register of SRC. More... | |
| #define | HW_PCM_SRC_REG_SETF(reg, field, val) REG_SETF(PCM1, PCM1_##reg##_REG, field, val) |
| Set the value of a field of a PCM register of SRC. More... | |
| #define | HW_PCM_SRC_REG_SET_BIT(reg, field) REG_SET_BIT(PCM1, PCM1_##reg##_REG, field) |
| Set a bit of a PCM register of SRC. More... | |
| #define | HW_PCM_SRC_REG_CLR_BIT(reg, field) REG_CLR_BIT(PCM1, PCM1_##reg##_REG, field) |
| Clear a bit of a PCM register of SRC. More... | |
Typedefs | |
| typedef void(* | hw_pcm_interrupt_cb_t) (void) |
| Application-defined callback type for the PCM interrupt. More... | |
Functions | |
| __STATIC_INLINE void | hw_pcm_clk_enable (void) |
| Enable the PCM interface clock source. | |
| __STATIC_INLINE void | hw_pcm_clk_disable (void) |
| Disable the PCM interface clock source. | |
| __STATIC_INLINE bool | hw_pcm_clk_is_enabled (void) |
| Get the status of the PCM interface clock source. More... | |
| __STATIC_INLINE void | hw_pcm_enable (void) |
| Enable the PCM interface. | |
| __STATIC_INLINE void | hw_pcm_disable (void) |
| Disable the PCM interface. | |
| __STATIC_INLINE bool | hw_pcm_is_enabled (void) |
| Get the status of the PCM interface. More... | |
| __STATIC_INLINE uint8_t | hw_pcm_get_channel_delay () |
| Get PCM channel delay. More... | |
| __STATIC_INLINE bool | hw_pcm_get_fsc_edge (void) |
| Get PCM FSC edge. More... | |
| __STATIC_INLINE uint8_t | hw_pcm_get_fsc_length (void) |
| Get PCM FSC length. More... | |
| __STATIC_INLINE uint16_t | hw_pcm_get_fsc_div (void) |
| Get PCM FSC divider. More... | |
| __STATIC_INLINE bool | hw_pcm_get_fsc_delay (void) |
| Get PCM FSC delay. More... | |
| __STATIC_INLINE bool | hw_pcm_get_clk_polarity (void) |
| Get PCM clock polarity. More... | |
| __STATIC_INLINE bool | hw_pcm_get_fsc_polarity (void) |
| Get PCM FSC polarity. More... | |
| __STATIC_INLINE bool | hw_pcm_get_clk_per_bit (void) |
| Get PCM clock cycles per data bit. More... | |
| __STATIC_INLINE HW_PCM_INPUT_MUX | hw_pcm_get_pcm_input_mux (void) |
| Get input for the PCM1_MUX_IN multiplexer. More... | |
| __STATIC_INLINE HW_PCM_DO_OUTPUT_MODE | hw_pcm_get_output_mode (void) |
| Get PCM DO output mode. More... | |
| __STATIC_INLINE HW_PCM_MODE | hw_pcm_get_mode (void) |
| Get PCM master/slave mode. More... | |
| __STATIC_INLINE void | hw_pcm_set_mode (HW_PCM_MODE mode) |
| Set PCM master/slave mode. More... | |
| HW_PCM_ERROR_CODE | hw_pcm_init_clk (hw_pcm_clk_cfg_t *pcm_clk) |
| Initialize PCM clock registers. More... | |
| void | hw_pcm_init (hw_pcm_config_t *config) |
| Set initialization of PCM interface. More... | |
| __STATIC_INLINE void | hw_pcm_set_channel_delay (uint8_t delay) |
| Set PCM channel delay. More... | |
| __STATIC_INLINE void | hw_pcm_set_fsc_edge (HW_PCM_FSC_EDGE edge) |
| Set PCM FSC edge. More... | |
| __STATIC_INLINE void | hw_pcm_set_fsc_length (uint8_t length) |
| Set PCM FSC length. More... | |
| __STATIC_INLINE void | hw_pcm_set_fsc_div (uint16_t div) |
| Set PCM FSC divider. More... | |
| __STATIC_INLINE void | hw_pcm_set_fsc_delay (HW_PCM_FSC_DELAY delay) |
| Set PCM FSC delay. More... | |
| __STATIC_INLINE void | hw_pcm_set_clk_polarity (HW_PCM_CLK_POLARITY pol) |
| Set PCM clock polarity. More... | |
| __STATIC_INLINE void | hw_pcm_set_pcm_input_mux (HW_PCM_INPUT_MUX input) |
| Set input for the PCM1_MUX_IN multiplexer. More... | |
| __STATIC_INLINE void | hw_pcm_set_fsc_polarity (HW_PCM_FSC_POLARITY pol) |
| Set PCM FSC polarity. More... | |
| __STATIC_INLINE void | hw_pcm_set_clk_per_bit (HW_PCM_CYCLE_PER_BIT cycles) |
| Set PCM clock cycles per data bit. More... | |
| __STATIC_INLINE void | hw_pcm_set_output_mode (HW_PCM_DO_OUTPUT_MODE mode) |
| Set PCM DO output mode. More... | |
| __STATIC_INLINE uint32_t | hw_pcm_input_read (HW_PCM_INPUT input) |
| Read PCM input (RX) register. More... | |
| __STATIC_INLINE void | hw_pcm_output_write (HW_PCM_OUTPUT output, const uint32_t data) |
| Write PCM output (TX) register. More... | |
| void | hw_pcm_register_interrupt (hw_pcm_interrupt_cb_t cb) |
| Register PCM interrupt handler. More... | |
| void | hw_pcm_unregister_interrupt (void) |
| Unregister interrupt PCM handler. More... | |
PCM interface.
| #define HW_PCM_CRG_REG_CLR_BIT | ( | reg, | |
| field | |||
| ) | REG_CLR_BIT(CRG_AUD, PCM_##reg##_REG, field) |
Clear a bit of a PCM register of CRG.
| [in] | reg | is the register to access |
| [in] | field | is the register field to write |
| #define HW_PCM_CRG_REG_GETF | ( | reg, | |
| field | |||
| ) | REG_GETF(CRG_AUD, PCM_##reg##_REG, field) |
Get the value of a field of a PCM register of CRG.
| [in] | reg | is the register to access |
| [in] | field | is the register field to read |
| #define HW_PCM_CRG_REG_SET_BIT | ( | reg, | |
| field | |||
| ) | REG_SET_BIT(CRG_AUD, PCM_##reg##_REG, field) |
Set a bit of a PCM register of CRG.
| [in] | reg | is the register to access |
| [in] | field | is the register field to write |
| #define HW_PCM_CRG_REG_SETF | ( | reg, | |
| field, | |||
| val | |||
| ) | REG_SETF(CRG_AUD, PCM_##reg##_REG, field, val) |
Set the value of a field of a PCM register of CRG.
| [in] | reg | is the register to access |
| [in] | field | is the register field to write |
| [in] | val | is the value to write |
| #define HW_PCM_SRC_REG_CLR_BIT | ( | reg, | |
| field | |||
| ) | REG_CLR_BIT(PCM1, PCM1_##reg##_REG, field) |
Clear a bit of a PCM register of SRC.
| [in] | reg | is the register to access |
| [in] | field | is the register field to write |
| #define HW_PCM_SRC_REG_GETF | ( | reg, | |
| field | |||
| ) | REG_GETF(PCM1, PCM1_##reg##_REG, field) |
Get the value of a field of a PCM register of SRC.
| [in] | reg | is the register to access |
| [in] | field | is the register field to read |
| #define HW_PCM_SRC_REG_SET_BIT | ( | reg, | |
| field | |||
| ) | REG_SET_BIT(PCM1, PCM1_##reg##_REG, field) |
Set a bit of a PCM register of SRC.
| [in] | reg | is the register to access |
| [in] | field | is the register field to write |
| #define HW_PCM_SRC_REG_SETF | ( | reg, | |
| field, | |||
| val | |||
| ) | REG_SETF(PCM1, PCM1_##reg##_REG, field, val) |
Set the value of a field of a PCM register of SRC.
| [in] | reg | is the register to access |
| [in] | field | is the register field to write |
| [in] | val | is the value to write |
| typedef void(* hw_pcm_interrupt_cb_t) (void) |
Application-defined callback type for the PCM interrupt.
| enum HW_PCM_CLK_POLARITY |
| enum HW_PCM_CLOCK |
| enum HW_PCM_CYCLE_PER_BIT |
| enum HW_PCM_ERROR_CODE |
PCM error code.
| enum HW_PCM_FSC_DELAY |
| enum HW_PCM_FSC_EDGE |
| enum HW_PCM_FSC_POLARITY |
| enum HW_PCM_INPUT |
| enum HW_PCM_INPUT_MUX |
| enum HW_PCM_MODE |
| enum HW_PCM_OUTPUT |
| __STATIC_INLINE bool hw_pcm_clk_is_enabled | ( | void | ) |
Get the status of the PCM interface clock source.
| false | if PCM interface clock source is disabled, |
| true | otherwise |
| __STATIC_INLINE uint8_t hw_pcm_get_channel_delay | ( | ) |
Get PCM channel delay.
| __STATIC_INLINE bool hw_pcm_get_clk_per_bit | ( | void | ) |
Get PCM clock cycles per data bit.
| HW_PCM_ONE_CYCLE_PER_BIT | = One clock cycle per data bit |
| HW_PCM_TWO_CYCLE_PER_BIT | = Two clock cycles per data bit |
| __STATIC_INLINE bool hw_pcm_get_clk_polarity | ( | void | ) |
Get PCM clock polarity.
| HW_PCM_CLK_POLARITY_NORMAL | or |
| HW_PCM_CLK_POLARITY_INVERTED |
| __STATIC_INLINE bool hw_pcm_get_fsc_delay | ( | void | ) |
Get PCM FSC delay.
| __STATIC_INLINE uint16_t hw_pcm_get_fsc_div | ( | void | ) |
Get PCM FSC divider.
| __STATIC_INLINE bool hw_pcm_get_fsc_edge | ( | void | ) |
Get PCM FSC edge.
| HW_PCM_FSC_EDGE_RISING | or |
| HW_PCM_FSC_EDGE_RISING_AND_FALLING |
| __STATIC_INLINE uint8_t hw_pcm_get_fsc_length | ( | void | ) |
Get PCM FSC length.
| __STATIC_INLINE bool hw_pcm_get_fsc_polarity | ( | void | ) |
Get PCM FSC polarity.
| HW_PCM_FSC_POLARITY_NORMAL | or |
| HW_PCM_FSC_POLARITY_INVERTED |
| __STATIC_INLINE HW_PCM_MODE hw_pcm_get_mode | ( | void | ) |
Get PCM master/slave mode.
| master | or |
| slave |
| __STATIC_INLINE HW_PCM_DO_OUTPUT_MODE hw_pcm_get_output_mode | ( | void | ) |
Get PCM DO output mode.
| HW_PCM_DO_OUTPUT_PUSH_PULL | or |
| HW_PCM_DO_OUTPUT_OPEN_DRAIN |
| __STATIC_INLINE HW_PCM_INPUT_MUX hw_pcm_get_pcm_input_mux | ( | void | ) |
Get input for the PCM1_MUX_IN multiplexer.
| void hw_pcm_init | ( | hw_pcm_config_t * | config | ) |
Set initialization of PCM interface.
call hw_pcm_enable() once PCM interface initialization is done
| [in] | config | configuration of PCM interface in specific mode (generic PCM, I2S, TDM, IOM) |
| HW_PCM_ERROR_CODE hw_pcm_init_clk | ( | hw_pcm_clk_cfg_t * | pcm_clk | ) |
Initialize PCM clock registers.
| [in,out] | pcm_clk | PCM clock configuration |
| HW_PCM_ERROR_NO_ERROR | on success, else |
| error |
| __STATIC_INLINE uint32_t hw_pcm_input_read | ( | HW_PCM_INPUT | input | ) |
Read PCM input (RX) register.
| [in] | input | The input register, HW_PCM_INPUT_REG_1 or HW_PCM_INPUT_REG_2 |
| __STATIC_INLINE bool hw_pcm_is_enabled | ( | void | ) |
Get the status of the PCM interface.
| false | if PCM interface is disabled, |
| true | otherwise |
| __STATIC_INLINE void hw_pcm_output_write | ( | HW_PCM_OUTPUT | output, |
| const uint32_t | data | ||
| ) |
Write PCM output (TX) register.
| [in] | output | The output register, |
| HW_PCM_OUTPUT_REG_1 | or |
| HW_PCM_OUTPUT_REG_2 |
| [in] | data | data to write to output register |
| void hw_pcm_register_interrupt | ( | hw_pcm_interrupt_cb_t | cb | ) |
Register PCM interrupt handler.
A callback function is registered to be called when an interrupt is generated. Interrupt is automatically enabled after calling this function. If no callback is specified, interrupt will be automatically cleared by the driver.
| [in] | cb | Callback defined by the application. |
| __STATIC_INLINE void hw_pcm_set_channel_delay | ( | uint8_t | delay | ) |
Set PCM channel delay.
| [in] | delay | channel delay is the multiples (N) of 8 bits
|
| __STATIC_INLINE void hw_pcm_set_clk_per_bit | ( | HW_PCM_CYCLE_PER_BIT | cycles | ) |
Set PCM clock cycles per data bit.
| [in] | cycles | The number of clock cycles per data bit: |
| HW_PCM_ONE_CYCLE_PER_BIT | = One clock cycle per data bit |
| HW_PCM_TWO_CYCLE_PER_BIT | = Two clock cycles per data bit |
| __STATIC_INLINE void hw_pcm_set_clk_polarity | ( | HW_PCM_CLK_POLARITY | pol | ) |
Set PCM clock polarity.
| [in] | pol | Polarity of PCM_CLK, |
| HW_PCM_CLK_POLARITY_NORMAL | or |
| HW_PCM_CLK_POLARITY_INVERTED |
| __STATIC_INLINE void hw_pcm_set_fsc_delay | ( | HW_PCM_FSC_DELAY | delay | ) |
Set PCM FSC delay.
| [in] | delay | Start position of FSC is programmable. If delay is HW_PCM_FSC_STARTS_1_CYCLE_BEFORE_MSB_BIT then FSC starts one clock cycle before first bit of channel 0. If delay is HW_PCM_FSC_STARTS_SYNCH_TO_MSB_BIT then FSC starts synchronously to the first bit of channel 0. |
| __STATIC_INLINE void hw_pcm_set_fsc_div | ( | uint16_t | div | ) |
Set PCM FSC divider.
| [in] | div | The FSC divider. Values must be in the range of 8..0x1000. If PCM_CLK_BIT=1, divider must always be even. |
| __STATIC_INLINE void hw_pcm_set_fsc_edge | ( | HW_PCM_FSC_EDGE | edge | ) |
Set PCM FSC edge.
| [in] | edge | The FSC edge, HW_PCM_FSC_EDGE_RISING or HW_PCM_FSC_EDGE_RISING_AND_FALLING |
| __STATIC_INLINE void hw_pcm_set_fsc_length | ( | uint8_t | length | ) |
Set PCM FSC length.
| [in] | length | The FSC length is the multiples (N) of 8. Values must be in the range of 0..8. if 0 then FSC length is equal to 1 data bit. |
| __STATIC_INLINE void hw_pcm_set_fsc_polarity | ( | HW_PCM_FSC_POLARITY | pol | ) |
Set PCM FSC polarity.
| [in] | pol | The polarity of FSC, |
| HW_PCM_FSC_POLARITY_NORMAL | or |
| HW_PCM_FSC_POLARITY_INVERTED |
| __STATIC_INLINE void hw_pcm_set_mode | ( | HW_PCM_MODE | mode | ) |
Set PCM master/slave mode.
| [in] | mode | PCM mode |
| master | or |
| slave |
| __STATIC_INLINE void hw_pcm_set_output_mode | ( | HW_PCM_DO_OUTPUT_MODE | mode | ) |
Set PCM DO output mode.
| [in] | mode | output mode can be |
| HW_PCM_DO_OUTPUT_PUSH_PULL | or |
| HW_PCM_DO_OUTPUT_OPEN_DRAIN |
| __STATIC_INLINE void hw_pcm_set_pcm_input_mux | ( | HW_PCM_INPUT_MUX | input | ) |
Set input for the PCM1_MUX_IN multiplexer.
| [in] | input | The input for PCM is HW_PCM_INPUT_MUX enum value |
| void hw_pcm_unregister_interrupt | ( | void | ) |
Unregister interrupt PCM handler.
Interrupt is automatically disabled after calling this function.
1.8.16