hw_pcm_clk_cfg_t Struct Reference

PCM interface clock configuration. More...

#include <hw_pcm.h>

Data Fields
HW_PCM_CLOCK	clock
uint8_t	sample_rate
uint16_t	bit_depth
uint8_t	chs
uint16_t	ch_delay
HW_PCM_CYCLE_PER_BIT	cycle_per_bit
uint8_t	slot
uint16_t	fsc_div
HW_PCM_CLK_GENERATION	div

Detailed Description

PCM interface clock configuration.

Field Documentation

bit_depth

uint16_t hw_pcm_clk_cfg_t::bit_depth

number of bit samples

ch_delay

uint16_t hw_pcm_clk_cfg_t::ch_delay

channel delay in multiples of 8 bit

chs

uint8_t hw_pcm_clk_cfg_t::chs

audio channels

clock

HW_PCM_CLOCK hw_pcm_clk_cfg_t::clock

PCM clock source, either div1 or divN

cycle_per_bit

HW_PCM_CYCLE_PER_BIT hw_pcm_clk_cfg_t::cycle_per_bit

1 or 2 clock cycle per data bit

div

HW_PCM_CLK_GENERATION hw_pcm_clk_cfg_t::div

desired divisor type, fractional or integer only

fsc_div

uint16_t hw_pcm_clk_cfg_t::fsc_div

fsc divider calculated by (bits_depth * chs + channel_delay * 8 * slot ) * cycles_per_bits

sample_rate

uint8_t hw_pcm_clk_cfg_t::sample_rate

sample rate in kHz

slot

uint8_t hw_pcm_clk_cfg_t::slot

the number of times channel delay (offset) is added

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The documentation for this struct was generated from the following file:

• sdk/bsp/peripherals/include/hw_pcm.h