SmartSnippets DA1459x SDK
Files | Macros | Functions

Platform definitions. More...

Files

file  sdk_defs.h
 Central include header file with platform definitions.
 

Macros

#define MTB_MASTER_REG   ((uint32_t *) 0xE0043004)
 MTB-related macros. More...
 
#define MEMORY_REMAPPED_BASE   0x00000000UL
 Remapped device base address.
 
#define MEMORY_REMAPPED_SIZE   (MEMORY_REMAPPED_END - MEMORY_REMAPPED_BASE)
 Remapped device memory size.
 
#define MEMORY_ROM_BASE   0x900000UL
 ROM base address.
 
#define MEMORY_ROM_SIZE   (MEMORY_ROM_END - MEMORY_ROM_BASE)
 ROM memory size.
 
#define MEMORY_SYSRAM_S_BASE   0x20000000UL
 OTP memory base address. More...
 
#define MEMORY_SYSRAM_S_SIZE   (MEMORY_SYSRAM_S_END - MEMORY_SYSRAM_S_BASE)
 SYSTEM RAM size.
 
#define MEMORY_SYSRAM_BASE   0x00800000UL
 SYSTEM RAM (code) base address.
 
#define MEMORY_SYSRAM_SIZE   (MEMORY_SYSRAM_END - MEMORY_SYSRAM_BASE)
 SYSTEM RAM (code) size.
 
#define MEMORY_CACHERAM_BASE   0x36000000UL
 CACHE RAM base address.
 
#define MEMORY_CACHERAM_SIZE   (MEMORY_CACHERAM_END - MEMORY_CACHERAM_BASE)
 CACHE RAM size.
 
#define MEMORY_QSPIF_BASE   (0x16000000UL)
 QSPI Flash base address. More...
 
#define MEMORY_QSPIF_S_BASE   (0x32000000UL)
 
#define MEMORY_QSPIF_SIZE   (MEMORY_QSPIF_END - MEMORY_QSPIF_BASE)
 QSPI Flash memory size.
 
#define MEMORY_EFLASH_BASE   (0xA00000UL)
 
#define MEMORY_EFLASH_S_BASE   (0x31000000UL)
 
#define MEMORY_EFLASH_SIZE   (MEMORY_EFLASH_END - MEMORY_EFLASH_BASE)
 eFlash memory size.
 
#define PRIMARY_PRODUCT_HEADER_BASE   (EFLASH_MEM1_VIRTUAL_BASE_ADDR + 0x1000)
 Primary product header base address.
 
#define BACKUP_PRODUCT_HEADER_BASE   (PRIMARY_PRODUCT_HEADER_BASE + 0x800)
 Backup product header base address.
 
#define MEMORY_EFLASH_USER_DATA_KEYS_BASE   (0x00000800UL)
 TRNG FIFO address. More...
 
#define IS_REMAPPED_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_REMAPPED_BASE, MEMORY_REMAPPED_END)
 Address is in the remapped memory region.
 
#define IS_ROM_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_ROM_BASE, MEMORY_ROM_END)
 Address is in the ROM region.
 
#define IS_SYSRAM_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_SYSRAM_BASE, MEMORY_SYSRAM_END)
 Address is in the OTP memory region. More...
 
#define IS_SYSRAM_S_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_SYSRAM_S_BASE, MEMORY_SYSRAM_S_END)
 Address is in the SYSTEM RAM (code) region.
 
#define IS_CACHERAM_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_CACHERAM_BASE, MEMORY_CACHERAM_END)
 Address is in the CACHE RAM region.
 
#define IS_QSPIF_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_QSPIF_BASE, MEMORY_QSPIF_END)
 Address is in the QSPI Flash memory region.
 
#define IS_QSPIF_S_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_QSPIF_S_BASE, MEMORY_QSPIF_S_END)
 Address is in the QSPI AHB-S(ystem) memory region.
 
#define IS_EFLASH_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_EFLASH_BASE, MEMORY_EFLASH_END)
 Address is in eFlash memory code region.
 
#define IS_EFLASH_S_ADDRESS(_a)   WITHIN_RANGE((_a), MEMORY_EFLASH_S_BASE, MEMORY_EFLASH_S_END)
 Address is in eFlash memory data region.
 
#define FLASH_SECTOR_SIZE   (0x1000)
 The Sector Size of QSPI flash memories.
 
#define EFLASH_MEM1_VIRTUAL_BASE_ADDR   (0x00000000)
 The Virtual Base Address to access the Embedded Flash memory. More...
 
#define QSPI_MEM1_VIRTUAL_BASE_ADDR
 The Virtual Base Address to access the QSPI Flash memory connected to QSPIC. More...
 
#define __RETAINED   __attribute__((section("retention_mem_zi")))
 Zero-initialized data retained memory attribute.
 
#define __RETAINED_RW   __attribute__((section("retention_mem_init")))
 Initialized data retained memory attribute.
 
#define __RETAINED_UNINIT   __attribute__((section("retention_mem_uninit")))
 Uninitialized data retained memory attribute. Used for variables that should not be initialized during startup.
 
#define __RETAINED_CONST_INIT   __attribute__((section("retention_mem_const")))
 Constant data retained memory attribute.
 
#define __RETAINED_CMI   __RETAINED
 Zero-initialized data retained memory attribute visible by CMAC.
 
#define __RETAIN_CODE_ATTR   __attribute__((section("text_retained"))) __attribute__((noinline)) __attribute__((optimize ("no-tree-switch-conversion")))
 Text retained memory attribute.
 
#define __UNUSED   __attribute__((unused))
 Attribute to silence warnings about unused parameters/variables/function.
 
#define __LTO_EXT   __attribute__((externally_visible))
 Attribute to tell the compiler to consider a symbol as externally visible (for LTO)
 
#define ASSERT_ERROR(a)   ASSERT_WARNING(a)
 Assert as error macro. More...
 
#define GLOBAL_INT_DISABLE()
 Macro to disable all interrupts. More...
 
#define GLOBAL_INT_RESTORE()
 Macro to restore all interrupts. More...
 
#define MIN(a, b)   (((a) < (b)) ? (a) : (b))
 Macro the minimum of two values. More...
 
#define MAX(a, b)   (((a) > (b)) ? (a) : (b))
 Macro the maximum of two values. More...
 
#define SWAP16(a)   __builtin_bswap16(a)
 Macro to swap the bytes of a 16-bit variable. More...
 
#define SWAP32(a)   __builtin_bswap32(a)
 Macro to swap the bytes of a 32-bit variable. More...
 
#define OPT_MEMCPY   __aeabi_memcpy
 Optimized memcpy.
 
#define OPT_MEMMOVE   __aeabi_memmove
 Optimized memmove.
 
#define OPT_MEMSET(s, c, n)   __aeabi_memset(s, n, c)
 Optimized memset.
 
#define REG_MSK(base, reg, field)   (base ## _ ## reg ## _ ## field ## _Msk)
 Access register field mask. More...
 
#define REG_POS(base, reg, field)   (base ## _ ## reg ## _ ## field ## _Pos)
 Access register field position. More...
 
#define REG_GET_FIELD(base, reg, field, var)
 Access register field value. More...
 
#define REG_SET_FIELD(base, reg, field, var, val)
 Set register field value. More...
 
#define RAW_SET_FIELD(mem, mask, val)   mem = ((mem & ~((mask))) | (((val) << (__builtin_ctz(mask))) & (mask)))
 Set memory field value. More...
 
#define REG_CLR_FIELD(base, reg, field, var)   var &= ~(base ## _ ## reg ## _ ## field ## _Msk)
 Clear register field value. More...
 
#define REG_GET_ADDR_INDEXED(base, reg, interval, index)   ((&base->reg) + (((intptr_t) index) * ((interval) / sizeof(base->reg))))
 Get the address of a register value by index (provided a register interval) More...
 
#define REG_GETF_INDEXED(base, reg, field, interval, index)
 Return the value of a register field by index (provided a register interval). More...
 
#define REG_GETF(base, reg, field)   (((base->reg) & (base##_##reg##_##field##_Msk)) >> (base##_##reg##_##field##_Pos))
 Return the value of a register field. More...
 
#define RAW_GETF(addr, mask)   ((*(volatile uint32_t *)(addr) & (mask)) >> (__builtin_ctz(mask)))
 Return the value of a memory field using a mask. More...
 
#define REG_SETF(base, reg, field, new_val)
 Set the value of a register field. More...
 
#define RAW_SETF(addr, mask, val)
 Set the value of a memory field. More...
 
#define REG_SET_BIT(base, reg, field)
 Set a bit of a register. More...
 
#define REG_CLR_BIT(base, reg, field)
 Clear a bit of a register. More...
 
#define REG_SET_MASKED(base, reg, mask, value)
 Sets register bits, indicated by the mask, to a value. More...
 
#define RAW_SET_MASKED(addr, mask, value)
 Sets memory bits, indicated by the mask, to a value. More...
 
#define BITS16(base, reg, field, v)
 Sets 16-bit wide register bits, indicated by the field, to a value v.
 
#define BITS32(base, reg, field, v)
 Sets 32-bit wide register bits, indicated by the field, to a value v.
 
#define GETBITS16(base, reg, v, field)
 Reads 16-bit wide register bits, indicated by the field, to a variable v.
 
#define GETBITS32(base, reg, v, field)
 Reads 32-bit wide register bits, indicated by the field, to a variable v.
 
#define ENABLE_DEBUGGER
 Macro to enable the debugger. More...
 
#define ENABLE_CMAC_DEBUGGER
 Macro to enable the CMAC debugger. More...
 
#define DISABLE_DEBUGGER
 Macro to disable the debugger. More...
 
#define DISABLE_CMAC_DEBUGGER
 Macro to disable the CMAC debugger. More...
 
#define SWRESET
 Macro to cause a software reset. More...
 
#define ARRAY_LENGTH(array)   (sizeof((array))/sizeof((array)[0]))
 Macro to get the number of elements in an array. More...
 
#define NSEC_TO_CLK_CYCLES(nsec, clk_freq_hz)   ((((nsec) * ((clk_freq_hz) / 10000)) + 99999) / 100000)
 Macro to convert time in nsec to clock cycles. More...
 

Functions

void assertion_functions_set_to_uninit (void)
 Assert as warning macro. More...
 

Detailed Description

Platform definitions.

Macro Definition Documentation

◆ ARRAY_LENGTH

#define ARRAY_LENGTH (   array)    (sizeof((array))/sizeof((array)[0]))

Macro to get the number of elements in an array.

Parameters
[in]arrayThe array

◆ ASSERT_ERROR

#define ASSERT_ERROR (   a)    ASSERT_WARNING(a)

Assert as error macro.

◆ DISABLE_CMAC_DEBUGGER

#define DISABLE_CMAC_DEBUGGER
Value:
do { \
CRG_TOP->SYS_CTRL_REG &= ~(0x40UL); \
} while (0)

Macro to disable the CMAC debugger.

◆ DISABLE_DEBUGGER

#define DISABLE_DEBUGGER
Value:
do { \
REG_CLR_BIT(CRG_TOP, SYS_CTRL_REG, DEBUGGER_ENABLE); \
} while (0)

Macro to disable the debugger.

◆ EFLASH_MEM1_VIRTUAL_BASE_ADDR

#define EFLASH_MEM1_VIRTUAL_BASE_ADDR   (0x00000000)

The Virtual Base Address to access the Embedded Flash memory.

◆ ENABLE_CMAC_DEBUGGER

#define ENABLE_CMAC_DEBUGGER
Value:
do { \
CRG_TOP->SYS_CTRL_REG |= (1 << (6UL)); \
} while (0)

Macro to enable the CMAC debugger.

◆ ENABLE_DEBUGGER

#define ENABLE_DEBUGGER
Value:
do { \
REG_SET_BIT(CRG_TOP, SYS_CTRL_REG, DEBUGGER_ENABLE); \
} while (0)

Macro to enable the debugger.

◆ GLOBAL_INT_DISABLE

#define GLOBAL_INT_DISABLE ( )
Value:
do { \
unsigned int __l_irq_rest; \
__ASM volatile ("mrs %0, primask \n\t" \
"mov r1, $1 \n\t" \
"msr primask, r1 \n\t" \
: "=r" (__l_irq_rest) \
: \
: "r1" \
); \
DBG_CONFIGURE_HIGH(CMN_TIMING_DEBUG, CMNDBG_CRITICAL_SECTION);

Macro to disable all interrupts.

This macro must always be used with GLOBAL_INT_RESTORE(). E.g.

... code to be executed with interrupts disabled ...
GLOBAL_INT_RESTORE();
See also
GLOBAL_INT_RESTORE

◆ GLOBAL_INT_RESTORE

#define GLOBAL_INT_RESTORE ( )
Value:
if (__l_irq_rest == 0) { \
DBG_CONFIGURE_LOW(CMN_TIMING_DEBUG, CMNDBG_CRITICAL_SECTION); \
} \
__ASM volatile ("msr primask, %0 \n\t" \
: \
: "r" (__l_irq_rest) \
: \
); \
} while (0)

Macro to restore all interrupts.

This macro must always be used after GLOBAL_INT_DISABLE(). E.g.

... code to be executed with interrupts disabled ...
GLOBAL_INT_RESTORE();
See also
GLOBAL_INT_DISABLE

◆ IS_SYSRAM_ADDRESS

#define IS_SYSRAM_ADDRESS (   _a)    WITHIN_RANGE((_a), MEMORY_SYSRAM_BASE, MEMORY_SYSRAM_END)

Address is in the OTP memory region.

Address is in the SYSTEM RAM region

◆ MAX

#define MAX (   a,
 
)    (((a) > (b)) ? (a) : (b))

Macro the maximum of two values.

Parameters
[in]aFirst value
[in]bSecond value

◆ MEMORY_EFLASH_BASE

#define MEMORY_EFLASH_BASE   (0xA00000UL)

eFlash AHB-C(ode) bus (cached). Accesses through this bus are restricted according to CACHE_FLASH_REG.

◆ MEMORY_EFLASH_S_BASE

#define MEMORY_EFLASH_S_BASE   (0x31000000UL)

eFlash AHB-S(system) bus (Not cached). Accesses through this bus are not affected by CACHE_FLASH_REG.

◆ MEMORY_EFLASH_USER_DATA_KEYS_BASE

#define MEMORY_EFLASH_USER_DATA_KEYS_BASE   (0x00000800UL)

TRNG FIFO address.

OTP User Data Encryption Keys memory base address

◆ MEMORY_QSPIF_BASE

#define MEMORY_QSPIF_BASE   (0x16000000UL)

QSPI Flash base address.

QSPI AHB-C(ode) bus (cached). Accesses through this bus are restricted according to CACHE_FLASH_REG.

◆ MEMORY_QSPIF_S_BASE

#define MEMORY_QSPIF_S_BASE   (0x32000000UL)

QSPI AHB-S(system) bus (Not cached). Accesses through this bus are not affected by CACHE_FLASH_REG.

◆ MEMORY_SYSRAM_S_BASE

#define MEMORY_SYSRAM_S_BASE   0x20000000UL

OTP memory base address.

OTP memory size.

SYSTEM RAM base address.

◆ MIN

#define MIN (   a,
 
)    (((a) < (b)) ? (a) : (b))

Macro the minimum of two values.

Parameters
[in]aFirst value
[in]bSecond value

◆ MTB_MASTER_REG

#define MTB_MASTER_REG   ((uint32_t *) 0xE0043004)

MTB-related macros.

MTB_MASTER_REG: Address of MTB_MASTER register MTB_MASTER_REG_DISABLE_VAL: Value to be written to MTB_MASTER in order to disable the MTB

◆ NSEC_TO_CLK_CYCLES

#define NSEC_TO_CLK_CYCLES (   nsec,
  clk_freq_hz 
)    ((((nsec) * ((clk_freq_hz) / 10000)) + 99999) / 100000)

Macro to convert time in nsec to clock cycles.

Parameters
[in]nsecTime in nsec
[in]clk_freq_hzClock Frequency in Hz

◆ QSPI_MEM1_VIRTUAL_BASE_ADDR

#define QSPI_MEM1_VIRTUAL_BASE_ADDR
Value:

The Virtual Base Address to access the QSPI Flash memory connected to QSPIC.

Note
To ensure proper functioning, the QSPI virtual base address must be aligned with the QSPI flash sector size. Since the EFLASH size is not aligned with the QSPI flash sector size, this is handled by the macro.

◆ RAW_GETF

#define RAW_GETF (   addr,
  mask 
)    ((*(volatile uint32_t *)(addr) & (mask)) >> (__builtin_ctz(mask)))

Return the value of a memory field using a mask.

e.g.

uint32_t val;
val = RAW_GETF(0x50000000, 0x1UL);
...

◆ RAW_SET_FIELD

#define RAW_SET_FIELD (   mem,
  mask,
  val 
)    mem = ((mem & ~((mask))) | (((val) << (__builtin_ctz(mask))) & (mask)))

Set memory field value.

Sets a memory field value using a mask (aimed to be used with local variables). e.g.

uint32_t tmp = *(volatile uint32_t *)0x50000000;
RAW_SET_FIELD(tmp, 0x1UL, 1);
...

◆ RAW_SET_MASKED

#define RAW_SET_MASKED (   addr,
  mask,
  value 
)
Value:
do { \
(*(volatile uint32_t *)(addr)) = ((*(volatile uint32_t *)(addr)) & ~(mask)) | ((value) & (mask)); \
} while (0)

Sets memory bits, indicated by the mask, to a value.

e.g.

RAW_SET_MASKED(0x50000000, 0xFF00, 0x1818);

◆ RAW_SETF

#define RAW_SETF (   addr,
  mask,
  val 
)
Value:
(*(volatile uint32_t *)(addr)) = ((*(volatile uint32_t *)(addr) & ~(mask)) | \
((mask) & ((val) << __builtin_ctz(mask))))

Set the value of a memory field.

e.g.

RAW_SETF(0x50000000, 0x1UL, 1);
...

◆ REG_CLR_BIT

#define REG_CLR_BIT (   base,
  reg,
  field 
)
Value:
do { \
base->reg &= ~(base##_##reg##_##field##_Msk); \
} while (0)

Clear a bit of a register.

e.g.

REG_CLR_BIT(XX_BASE, YY_REG, FIELD_Z);
...

◆ REG_CLR_FIELD

#define REG_CLR_FIELD (   base,
  reg,
  field,
  var 
)    var &= ~(base ## _ ## reg ## _ ## field ## _Msk)

Clear register field value.

Clears a register field value (aimed to be used with local variables). e.g.

uint32_t tmp;
tmp = XX_BASE->YY_REG;
REG_CLR_FIELD(XX_BASE, YY_REG, FIELD_A, tmp);
REG_CLR_FIELD(XX_BASE, YY_REG, FIELD_B, tmp);
XX_BASE->YY_REG = tmp;
...

◆ REG_GET_ADDR_INDEXED

#define REG_GET_ADDR_INDEXED (   base,
  reg,
  interval,
  index 
)    ((&base->reg) + (((intptr_t) index) * ((interval) / sizeof(base->reg))))

Get the address of a register value by index (provided a register interval)

Note
The register interval should be an exact multiple of the register's base size. For example, if the register size is 32-bit, then the interval should be 0x4, 0x8, etc. Otherwise, the result will be undefined. The interval value must be in bytes. The index value (0,1,2...) is multiplied by the interval value (in bytes) to find the actual offset of the register.

Returns a register address value by index

◆ REG_GET_FIELD

#define REG_GET_FIELD (   base,
  reg,
  field,
  var 
)
Value:
((var & (base ## _ ## reg ## _ ## field ## _Msk)) >> \
(base ## _ ## reg ## _ ## field ## _Pos))

Access register field value.

Returns a register field value (aimed to be used with local variables). e.g.

uint32_t tmp;
int counter;
tmp = XX_BASE->YY_REG;
counter = REG_GET_FIELD(XX_BASE, YY_REG, FIELD_Z, tmp);
...

◆ REG_GETF

#define REG_GETF (   base,
  reg,
  field 
)    (((base->reg) & (base##_##reg##_##field##_Msk)) >> (base##_##reg##_##field##_Pos))

Return the value of a register field.

e.g.

uint32_t val;
val = REG_GETF(XX_BASE, YY_REG, FIELD_Z);
...

◆ REG_GETF_INDEXED

#define REG_GETF_INDEXED (   base,
  reg,
  field,
  interval,
  index 
)
Value:
(((*REG_GET_ADDR_INDEXED(base, reg, interval, index)) & \
(base ## _ ## reg ## _ ## field ## _Msk)) >> (base ## _ ## reg ## _ ## field ## _Pos))

Return the value of a register field by index (provided a register interval).

e.g.

uint32_t val;
uint16_t index = 2
val = REG_GETF_INDEXED(XX_BASE, YY_REG, FIELD_Z, 0x10, index)
...
Note
The register interval should be an exact multiple of the register's base size. For example, if the register size is 32-bit, then the interval should be 0x4, 0x8, etc. Otherwise, the result will be undefined. The interval value must be in bytes. The index value (0,1,2...) is multiplied by the interval value (in bytes) to find the actual offset of the register.

◆ REG_MSK

#define REG_MSK (   base,
  reg,
  field 
)    (base ## _ ## reg ## _ ## field ## _Msk)

Access register field mask.

Returns a register field mask (aimed to be used with local variables). e.g.

uint32_t tmp;
tmp = XX_BASE->YY_REG;
if (tmp & REG_MSK(XX_BASE, YY_REG, FIELD_Z)) {
...

◆ REG_POS

#define REG_POS (   base,
  reg,
  field 
)    (base ## _ ## reg ## _ ## field ## _Pos)

Access register field position.

Returns a register field position (aimed to be used with local variables).

◆ REG_SET_BIT

#define REG_SET_BIT (   base,
  reg,
  field 
)
Value:
do { \
base->reg |= (1 << (base##_##reg##_##field##_Pos)); \
} while (0)

Set a bit of a register.

e.g.

REG_SET_BIT(XX_BASE, YY_REG, FIELD_Z);
...

◆ REG_SET_FIELD

#define REG_SET_FIELD (   base,
  reg,
  field,
  var,
  val 
)
Value:
var = ((var & ~((base ## _ ## reg ## _ ## field ## _Msk))) | \
(((val) << (base ## _ ## reg ## _ ## field ## _Pos)) & \
(base ## _ ## reg ## _ ## field ## _Msk)))

Set register field value.

Sets a register field value (aimed to be used with local variables). e.g.

uint32_t tmp;
tmp = XX_BASE->YY_REG;
REG_SET_FIELD(XX_BASE, YY_REG, FIELD_A, tmp, 10);
REG_SET_FIELD(XX_BASE, YY_REG, FIELD_B, tmp, 2);
XX_BASE->YY_REG = tmp;
...

◆ REG_SET_MASKED

#define REG_SET_MASKED (   base,
  reg,
  mask,
  value 
)
Value:
do { \
base->reg = (base->reg & ~(mask)) | ((value) & (mask)); \
} while (0)

Sets register bits, indicated by the mask, to a value.

e.g.

REG_SET_MASKED(XX_BASE, YY_REG, 0xFF00, 0x1818);

◆ REG_SETF

#define REG_SETF (   base,
  reg,
  field,
  new_val 
)
Value:
base->reg = ((base->reg & ~(base##_##reg##_##field##_Msk)) | \
((base##_##reg##_##field##_Msk) & ((new_val) << (base##_##reg##_##field##_Pos))))

Set the value of a register field.

e.g.

REG_SETF(XX_BASE, YY_REG, FIELD_Z, new_value);
...

◆ SWAP16

#define SWAP16 (   a)    __builtin_bswap16(a)

Macro to swap the bytes of a 16-bit variable.

Parameters
[in]aThe 16-bit variable

◆ SWAP32

#define SWAP32 (   a)    __builtin_bswap32(a)

Macro to swap the bytes of a 32-bit variable.

Parameters
[in]aThe 32-bit variable

◆ SWRESET

#define SWRESET
Value:
do { \
REG_SET_BIT(CRG_TOP, SYS_CTRL_REG, SW_RESET); \
} while (0)

Macro to cause a software reset.

Function Documentation

◆ assertion_functions_set_to_uninit()

void assertion_functions_set_to_uninit ( void  )

Assert as warning macro.

Note
Active only while in development mode
REG_SET_MASKED
#define REG_SET_MASKED(base, reg, mask, value)
Sets register bits, indicated by the mask, to a value.
Definition: sdk_defs.h:794
REG_SETF
#define REG_SETF(base, reg, field, new_val)
Set the value of a register field.
Definition: sdk_defs.h:738
REG_CLR_BIT
#define REG_CLR_BIT(base, reg, field)
Clear a bit of a register.
Definition: sdk_defs.h:781
REG_SET_BIT
#define REG_SET_BIT(base, reg, field)
Set a bit of a register.
Definition: sdk_defs.h:766
EFLASH_MEM1_VIRTUAL_BASE_ADDR
#define EFLASH_MEM1_VIRTUAL_BASE_ADDR
The Virtual Base Address to access the Embedded Flash memory.
Definition: sdk_defs.h:297
RAW_SETF
#define RAW_SETF(addr, mask, val)
Set the value of a memory field.
Definition: sdk_defs.h:752
FLASH_SECTOR_SIZE
#define FLASH_SECTOR_SIZE
The Sector Size of QSPI flash memories.
Definition: sdk_defs.h:288
RAW_GETF
#define RAW_GETF(addr, mask)
Return the value of a memory field using a mask.
Definition: sdk_defs.h:725
REG_GETF_INDEXED
#define REG_GETF_INDEXED(base, reg, field, interval, index)
Return the value of a register field by index (provided a register interval).
Definition: sdk_defs.h:696
RAW_SET_MASKED
#define RAW_SET_MASKED(addr, mask, value)
Sets memory bits, indicated by the mask, to a value.
Definition: sdk_defs.h:807
REG_MSK
#define REG_MSK(base, reg, field)
Access register field mask.
Definition: sdk_defs.h:583
REG_GET_FIELD
#define REG_GET_FIELD(base, reg, field, var)
Access register field value.
Definition: sdk_defs.h:607
REG_GETF
#define REG_GETF(base, reg, field)
Return the value of a register field.
Definition: sdk_defs.h:711
REG_CLR_FIELD
#define REG_CLR_FIELD(base, reg, field, var)
Clear register field value.
Definition: sdk_defs.h:661
REG_GET_ADDR_INDEXED
#define REG_GET_ADDR_INDEXED(base, reg, interval, index)
Get the address of a register value by index (provided a register interval)
Definition: sdk_defs.h:674
REG_SET_FIELD
#define REG_SET_FIELD(base, reg, field, var, val)
Set register field value.
Definition: sdk_defs.h:626
GLOBAL_INT_DISABLE
#define GLOBAL_INT_DISABLE()
Macro to disable all interrupts.
Definition: sdk_defs.h:452
MEMORY_EFLASH_SIZE
#define MEMORY_EFLASH_SIZE
eFlash memory size.
Definition: sdk_defs.h:185
RAW_SET_FIELD
#define RAW_SET_FIELD(mem, mask, val)
Set memory field value.
Definition: sdk_defs.h:643