Clock Driver. More...

Modules
	CLOCK_TYPES
	Clock types.

Files
file	hw_clk.h
	Clock Driver header file.

file	hw_clk_da1459x.h
	Clock Driver header file.

Macros
#define	XTAL32M_USEC_TO_250K_CYCLES(x) ((uint16_t)((x * (dg_configRC32M_FREQ/1000000) + 127) / 128))
	Convert settling time (in usec) to XTAL32M_READY counter cycles (250kHz). More...

#define	XTALRDY_CYCLES_TO_LP_CLK_CYCLES(x, lp_freq) ((((uint32_t)(x)) * lp_freq + dg_configRC32M_FREQ_MIN/(128) - 1) / (dg_configRC32M_FREQ_MIN/128))
	Convert XTAL32M_READY counter cycles (250kHz) to LP clock cycles. More...

Typedefs
typedef enum ahbdiv_type	ahb_div_t
	The AMBA High-Performance Bus (AHB) clock divider.

typedef enum apbdiv_type	apb_div_t
	The AMBA Peripheral Bus (APB) clock divider.

typedef enum cal_clk_sel_type	cal_clk_t
	The type of clock to be calibrated.

typedef enum cal_ref_clk_sel_type	cal_ref_clk_t
	The reference clock used for calibration.

typedef enum sysclk_type	sys_clk_t
	The system clock type. More...

typedef enum rclp_mode_type	rclp_mode_t
	The RCLP mode. More...

typedef enum cpu_clk_type	cpu_clk_t
	The CPU clock type (speed) More...

Enumerations
enum	ahbdiv_type { ahb_div1 = 0, ahb_div2, ahb_div4, ahb_div8, ahb_div16 }
	The AMBA High-Performance Bus (AHB) clock divider. More...

enum	apbdiv_type { apb_div1 = 0, apb_div2, apb_div4, apb_div8 }
	The AMBA Peripheral Bus (APB) clock divider. More...

enum	cal_clk_sel_type
	The type of clock to be calibrated.

enum	cal_ref_clk_sel_type
	The reference clock used for calibration.

enum	sysclk_type { sysclk_RC32 = 0, sysclk_XTAL32M = 2, sysclk_DBLR64 = 4, sysclk_LP = 255 }
	The system clock type. More...

enum	rclp_mode_type { RCLP_DEFAULT = 0, RCLP_FORCE_SLOW = REG_MSK(CRG_TOP, CLK_RCLP_REG, RCLP_LOW_SPEED_FORCE), RCLP_FORCE_FAST = REG_MSK(CRG_TOP, CLK_RCLP_REG, RCLP_HIGH_SPEED_FORCE) }
	The RCLP mode. More...

enum	cpu_clk_type { cpuclk_2M = 2, cpuclk_4M = 4, cpuclk_8M = 8, cpuclk_16M = 16, cpuclk_32M = 32, cpuclk_64M = 64 }
	The CPU clock type (speed) More...

Functions
__STATIC_FORCEINLINE ahb_div_t	hw_clk_get_hclk_div (void)
	Get the divider of the AMBA High Speed Bus. More...

__STATIC_FORCEINLINE apb_div_t	hw_clk_get_pclk_div (void)
	Get the divider of the AMBA Peripheral Bus. More...

__STATIC_FORCEINLINE void	hw_clk_set_pclk_div (apb_div_t div)
	Set the divider of the AMBA Peripheral Bus. More...

__STATIC_INLINE void	hw_clk_set_lpclk (lp_clk_is_t mode)
	Set Low Power clock. More...

__STATIC_INLINE bool	hw_clk_lpclk_is (lp_clk_is_t clk)
	Check whether a clock is the Low Power clock. More...

__STATIC_INLINE lp_clk_is_t	hw_clk_get_lpclk (void)
	Return the clock used as the Low Power clock. More...

__STATIC_INLINE void	hw_clk_configure_lpclk (lp_clk_is_t clk)
	Configure a Low Power clock. This must be done only once since the register is retained. More...

__STATIC_INLINE void	hw_clk_enable_lpclk (lp_clk_is_t clk)
	Activate a Low Power clock. More...

__STATIC_INLINE void	hw_clk_disable_lpclk (lp_clk_is_t clk)
	Deactivate a Low Power clock. More...

__STATIC_FORCEINLINE uint32_t	hw_clk_get_sys_clk_freq (sys_clk_t sys_clk)
	Get the system clock frequency. More...

__RETAINED_CODE void	hw_clk_delay_usec (uint32_t usec)
	Add delay of N usecs. More...

__RETAINED_CODE uint32_t	hw_clk_get_sysclk_freq (void)
	Get current system clock's frequency. More...

__STATIC_INLINE bool	hw_clk_check_rc32_status (void)
	Check if the RC32M is enabled. More...

__STATIC_INLINE void	hw_clk_enable_rc32 (void)
	Activate the RC32M.

__STATIC_FORCEINLINE void	hw_clk_disable_rc32 (void)
	Deactivate the RC32M.

void	hw_clk_set_xtalm_settling_time (uint8_t cycles, bool high_clock)
	Set the XTAL32M settling time. More...

__STATIC_FORCEINLINE uint16_t	hw_clk_get_xtalm_settling_time (void)
	Get the XTAL32M settling time (in 250kHz clock cycles). More...

__STATIC_INLINE bool	hw_clk_check_xtalm_status (void)
	Check if the XTAL32M is enabled. More...

__STATIC_INLINE void	hw_clk_enable_xtalm (void)
	Activate the XTAL32M.

__STATIC_INLINE void	hw_clk_disable_xtalm (void)
	Deactivate the XTAL32M.

__STATIC_INLINE bool	hw_clk_is_xtalm_started (void)
	Check if the XTAL32M has settled. More...

__STATIC_FORCEINLINE sys_clk_is_t	hw_clk_get_sysclk (void)
	Return the clock used as the system clock. More...

__RETAINED_CODE sys_clk_t	hw_clk_get_system_clock (void)
	Get the current system clock. More...

__STATIC_INLINE bool	hw_clk_lp_is_xtal32k (void)
	Check whether the XTAL32K is the Low Power clock. More...

__STATIC_INLINE bool	hw_clk_lp_is_rclp (void)
	Check whether the RCLP is the Low Power clock. More...

__STATIC_INLINE bool	hw_clk_lp_is_rcx (void)
	Check whether the RCX is the Low Power clock. More...

__STATIC_INLINE bool	hw_clk_lp_is_external (void)
	Check whether the RCX is the Low Power clock. More...

__STATIC_INLINE void	hw_clk_lp_set_rcx (void)
	Set RCX as the Low Power clock. More...

__STATIC_INLINE void	hw_clk_lp_set_xtal32k (void)
	Set XTAL32K as the Low Power clock. More...

__STATIC_INLINE void	hw_clk_lp_set_ext32k (void)
	Set an external digital clock as the Low Power clock. More...

__STATIC_INLINE void	hw_clk_set_rclp_mode (rclp_mode_t mode)
	Configure RCLP. More...

__STATIC_INLINE rclp_mode_t	hw_clk_get_rclp_mode (void)
	Get RCLP mode of operation. More...

__STATIC_INLINE void	hw_clk_enable_rclp (void)
	Enable RCLP.

__STATIC_INLINE void	hw_clk_disable_rclp (void)
	Disable RCLP. More...

__STATIC_INLINE void	hw_clk_lp_set_rclp (void)
	Set RCLP as the Low Power clock. More...

__STATIC_INLINE void	hw_clk_configure_rcx (void)
	Configure RCX. This must be done only once since the register is retained.

__STATIC_INLINE void	hw_clk_enable_rcx (void)
	Enable RCX but does not set it as the LP clock.

__STATIC_INLINE void	hw_clk_disable_rcx (void)
	Disable RCX. More...

__STATIC_INLINE void	hw_clk_configure_xtal32k (void)
	Configure XTAL32K. This must be done only once since the register is retained.

__STATIC_INLINE void	hw_clk_enable_xtal32k (void)
	Enable XTAL32K but do not set it as the LP clock.

__STATIC_INLINE void	hw_clk_disable_xtal32k (void)
	Disable XTAL32K. More...

__STATIC_INLINE void	hw_clk_calibration_enable_irq (void)
	Enable the clock calibration interrupt. More...

__STATIC_INLINE void	hw_clk_calibration_clear_irq (void)
	Clear the clock calibration interrupt. More...

__STATIC_INLINE bool	hw_clk_calibration_status_irq (void)
	Read the status of the clock calibration interrupt. More...

__STATIC_INLINE bool	hw_clk_calibration_finished (void)
	Check the status of a requested calibration. More...

void	hw_clk_start_calibration (cal_clk_t clk_type, cal_ref_clk_t clk_ref_type, uint16_t cycles)
	Start calibration of a clock. More...

uint32_t	hw_clk_get_calibration_data (void)
	Return the calibration results. More...

__STATIC_INLINE void	hw_clk_set_sysclk (sys_clk_is_t mode)
	Set System clock. More...

__STATIC_FORCEINLINE void	hw_clk_set_hclk_div (ahb_div_t div)
	Set the divider of the AMBA High Speed Bus. More...

__STATIC_FORCEINLINE void	hw_clk_dblr_sys_on (void)
	Enable the Doubler.

__STATIC_FORCEINLINE void	hw_clk_dblr_sys_off (void)
	Disable the Doubler. More...

__STATIC_INLINE bool	hw_clk_check_dblr_status (void)
	Check if the Doubler is enabled. More...

__STATIC_INLINE bool	hw_clk_is_dblr_ready (void)
	Check if the Doubler is available. More...

__STATIC_INLINE void	hw_clk_enable_sysclk (sys_clk_is_t clk)
	Activate a System clock. More...

__STATIC_INLINE void	hw_clk_disable_sysclk (sys_clk_is_t clk)
	Deactivate a System clock. More...

__STATIC_INLINE bool	hw_clk_is_enabled_sysclk (sys_clk_is_t clk)
	Check if a System clock is enabled. More...

__STATIC_FORCEINLINE void	hw_clk_configure_ext32k_pins (void)
	Configure pin to connect an external digital clock.

int8_t	hw_clk_xtalm_configure_cur_set (void)
	Configure XTAL32M current setting. More...

void	hw_clk_xtalm_configure_irq (void)
	Configure XTAL32M IRQ counter start value. More...

__STATIC_INLINE void	hw_clk_xtalm_irq_enable (void)
	Enable XTAL32M interrupt generation. More...

Detailed Description

Clock Driver.

Macro Definition Documentation

◆ XTAL32M_USEC_TO_250K_CYCLES

#define XTAL32M_USEC_TO_250K_CYCLES ( x ) ((uint16_t)((x * (dg_configRC32M_FREQ/1000000) + 127) / 128))

Convert settling time (in usec) to XTAL32M_READY counter cycles (250kHz).

Note: The XTAL32M_READY IRQ counter is clocked by RC32M divided by either 128 or 1024 (depending on its configuration). This macro assumes the first case (which results in a clock frequency of ~250kHz).; The actual frequency of RC32M might be a little less than dg_configRC32M_FREQ, but we consider the worst case.

◆ XTALRDY_CYCLES_TO_LP_CLK_CYCLES

#define XTALRDY_CYCLES_TO_LP_CLK_CYCLES	(	x,
		lp_freq
	)	((((uint32_t)(x)) * lp_freq + dg_configRC32M_FREQ_MIN/(128) - 1) / (dg_configRC32M_FREQ_MIN/128))

Convert XTAL32M_READY counter cycles (250kHz) to LP clock cycles.

Note: The XTAL32M_READY IRQ counter is clocked by RC32M divided by either 128 or 1024 (depending on its configuration). This macro assumes the first case (which results in a clock frequency of ~250kHz).; The actual frequency of RC32M might be a little less than dg_configRC32M_FREQ, so we consider the worst case (dg_configRC32M_FREQ_MIN).

Typedef Documentation

◆ cpu_clk_t

typedef enum cpu_clk_type cpu_clk_t

The CPU clock type (speed)

◆ rclp_mode_t

typedef enum rclp_mode_type rclp_mode_t

The RCLP mode.

Note: Must only be used with functions hw_clk_set/get_rclp_mode()

◆ sys_clk_t

typedef enum sysclk_type sys_clk_t

The system clock type.

Note: Must only be used with functions cm_sys_clk_init/set()

Enumeration Type Documentation

◆ ahbdiv_type

enum ahbdiv_type

The AMBA High-Performance Bus (AHB) clock divider.

Enumerator
ahb_div1	Divide by 1.
ahb_div2	Divide by 2.
ahb_div4	Divide by 4.
ahb_div8	Divide by 8.
ahb_div16	Divide by 16.

◆ apbdiv_type

enum apbdiv_type

The AMBA Peripheral Bus (APB) clock divider.

Enumerator
apb_div1	Divide by 1.
apb_div2	Divide by 2.
apb_div4	Divide by 4.
apb_div8	Divide by 8.

◆ cpu_clk_type

enum cpu_clk_type

The CPU clock type (speed)

Enumerator
cpuclk_2M	2 MHz
cpuclk_4M	4 MHz
cpuclk_8M	8 MHz
cpuclk_16M	16 MHz
cpuclk_32M	32 MHz
cpuclk_64M	64 MHz

◆ rclp_mode_type

enum rclp_mode_type

The RCLP mode.

Note: Must only be used with functions hw_clk_set/get_rclp_mode()

Enumerator
RCLP_DEFAULT	32kHz/512kHz
RCLP_FORCE_SLOW	32kHz
RCLP_FORCE_FAST	512kHz

◆ sysclk_type

enum sysclk_type

The system clock type.

Note: Must only be used with functions cm_sys_clk_init/set()

Enumerator
sysclk_RC32	RC32.
sysclk_XTAL32M	32MHz
sysclk_DBLR64	64MHz
sysclk_LP	not applicable

Function Documentation

◆ hw_clk_calibration_clear_irq()

__STATIC_INLINE void hw_clk_calibration_clear_irq ( void )

Clear the clock calibration interrupt.

◆ hw_clk_calibration_enable_irq()

__STATIC_INLINE void hw_clk_calibration_enable_irq ( void )

Enable the clock calibration interrupt.

◆ hw_clk_calibration_finished()

__STATIC_INLINE bool hw_clk_calibration_finished ( void )

Check the status of a requested calibration.

Returns: true if the calibration has finished (or never run) else false.

◆ hw_clk_calibration_status_irq()

__STATIC_INLINE bool hw_clk_calibration_status_irq ( void )

Read the status of the clock calibration interrupt.

Returns: the status of the IRQ bit

◆ hw_clk_check_dblr_status()

__STATIC_INLINE bool hw_clk_check_dblr_status ( void )

Check if the Doubler is enabled.

Returns: true if the Doubler is enabled, else false.

◆ hw_clk_check_rc32_status()

__STATIC_INLINE bool hw_clk_check_rc32_status ( void )

Check if the RC32M is enabled.

Returns: true if the RC32M is enabled, else false.

◆ hw_clk_check_xtalm_status()

__STATIC_INLINE bool hw_clk_check_xtalm_status ( void )

Check if the XTAL32M is enabled.

Returns: true if the XTAL32M is enabled, else false.

◆ hw_clk_configure_lpclk()

__STATIC_INLINE void hw_clk_configure_lpclk ( lp_clk_is_t clk )

Configure a Low Power clock. This must be done only once since the register is retained.

Parameters

[in] clk The clock to configure.

◆ hw_clk_dblr_sys_off()

__STATIC_FORCEINLINE void hw_clk_dblr_sys_off ( void )

Disable the Doubler.

Warning: The System clock must have been set to XTAL32M before calling this function!

◆ hw_clk_delay_usec()

__RETAINED_CODE void hw_clk_delay_usec ( uint32_t usec )

Add delay of N usecs.

Parameters

[in] usec The number of usecs to wait for.

Returns: void

Warning: The minimum delay is HW_CLK_DELAY_OVERHEAD_CYCLES in system clock ticks. The resolution is HW_CLK_CYCLES_PER_DELAY_REP in system clock ticks. The system clock tick is calculated after applying the AHB divider.

◆ hw_clk_disable_lpclk()

__STATIC_INLINE void hw_clk_disable_lpclk ( lp_clk_is_t clk )

Deactivate a Low Power clock.

Parameters

[in] clk The clock to deactivate.

◆ hw_clk_disable_rclp()

__STATIC_INLINE void hw_clk_disable_rclp ( void )

Disable RCLP.

Warning: RCLP must not be the LP clock.

◆ hw_clk_disable_rcx()

__STATIC_INLINE void hw_clk_disable_rcx ( void )

Disable RCX.

Warning: RCX must not be the LP clock

◆ hw_clk_disable_sysclk()

__STATIC_INLINE void hw_clk_disable_sysclk ( sys_clk_is_t clk )

Deactivate a System clock.

Parameters

[in] clk The clock to deactivate.

◆ hw_clk_disable_xtal32k()

__STATIC_INLINE void hw_clk_disable_xtal32k ( void )

Disable XTAL32K.

Warning: XTAL32K must not be the LP clock.

◆ hw_clk_enable_lpclk()

__STATIC_INLINE void hw_clk_enable_lpclk ( lp_clk_is_t clk )

Activate a Low Power clock.

Parameters

[in] clk The clock to activate.

◆ hw_clk_enable_sysclk()

__STATIC_INLINE void hw_clk_enable_sysclk ( sys_clk_is_t clk )

Activate a System clock.

Parameters

[in] clk The clock to activate.

◆ hw_clk_get_calibration_data()

uint32_t hw_clk_get_calibration_data ( void )

Return the calibration results.

Returns: The number of cycles of the reference clock corresponding to the programmed (in hw_clk_start_calibration() cycles param) cycles of the clock to be calibrated. In the special case of EXTernal calibration, this function returns the number of cycles of DIVN that correspond to one positive pulse of the EXT source applied.

◆ hw_clk_get_hclk_div()

__STATIC_FORCEINLINE ahb_div_t hw_clk_get_hclk_div ( void )

Get the divider of the AMBA High Speed Bus.

Returns: The AMBA High Speed Bus divider

◆ hw_clk_get_lpclk()

__STATIC_INLINE lp_clk_is_t hw_clk_get_lpclk ( void )

Return the clock used as the Low Power clock.

Returns: The type of the Low Power clock

◆ hw_clk_get_pclk_div()

__STATIC_FORCEINLINE apb_div_t hw_clk_get_pclk_div ( void )

Get the divider of the AMBA Peripheral Bus.

Returns: The AMBA Peripheral Bus divider

◆ hw_clk_get_rclp_mode()

__STATIC_INLINE rclp_mode_t hw_clk_get_rclp_mode ( void )

Get RCLP mode of operation.

Returns: The mode of the RCLP.

◆ hw_clk_get_sys_clk_freq()

__STATIC_FORCEINLINE uint32_t hw_clk_get_sys_clk_freq ( sys_clk_t sys_clk )

Get the system clock frequency.

Parameters

[in] sys_clk The system clock

Returns: The system clock frequency

◆ hw_clk_get_sysclk()

__STATIC_FORCEINLINE sys_clk_is_t hw_clk_get_sysclk ( void )

Return the clock used as the system clock.

Returns: The type of the system clock

◆ hw_clk_get_sysclk_freq()

__RETAINED_CODE uint32_t hw_clk_get_sysclk_freq ( void )

Get current system clock's frequency.

Returns: The system clock's frequency in Hz

◆ hw_clk_get_system_clock()

__RETAINED_CODE sys_clk_t hw_clk_get_system_clock ( void )

Get the current system clock.

Returns: The current system clock.

Warning: This function returns a sys_clk_t enum, whereas the hw_clk_get_sysclk() a sys_clk_is_t. Consider calling the right function, based on which type of enumerator is needed.

◆ hw_clk_get_xtalm_settling_time()

__STATIC_FORCEINLINE uint16_t hw_clk_get_xtalm_settling_time ( void )

Get the XTAL32M settling time (in 250kHz clock cycles).

This function reads the start value of the XTAL32M_READY IRQ counter. If the fast clock configuration is used for the counter, the function returns the read value as is. Otherwise, the function adjusts the read value accordingly (so that it represents the equivalent start value in the fast clock case).

Returns: The number of 250kHz clock cycles required for XTAL32M to settle

◆ hw_clk_is_dblr_ready()

__STATIC_INLINE bool hw_clk_is_dblr_ready ( void )

Check if the Doubler is available.

Returns: true if the Doubler is available, else false.

◆ hw_clk_is_enabled_sysclk()

__STATIC_INLINE bool hw_clk_is_enabled_sysclk ( sys_clk_is_t clk )

Check if a System clock is enabled.

Returns: true if the System clock is enabled, else false.

◆ hw_clk_is_xtalm_started()

__STATIC_INLINE bool hw_clk_is_xtalm_started ( void )

Check if the XTAL32M has settled.

Returns: true if the XTAL32M has settled, else false.

◆ hw_clk_lp_is_external()

__STATIC_INLINE bool hw_clk_lp_is_external ( void )

Check whether the RCX is the Low Power clock.

Returns: true if RCX is the LP clock, else false.

◆ hw_clk_lp_is_rclp()

__STATIC_INLINE bool hw_clk_lp_is_rclp ( void )

Check whether the RCLP is the Low Power clock.

Returns: true if RCLP is the LP clock, else false.

◆ hw_clk_lp_is_rcx()

__STATIC_INLINE bool hw_clk_lp_is_rcx ( void )

Check whether the RCX is the Low Power clock.

Returns: true if RCX is the LP clock, else false.

◆ hw_clk_lp_is_xtal32k()

__STATIC_INLINE bool hw_clk_lp_is_xtal32k ( void )

Check whether the XTAL32K is the Low Power clock.

Returns: true if XTAL32K is the LP clock, else false.

◆ hw_clk_lp_set_ext32k()

__STATIC_INLINE void hw_clk_lp_set_ext32k ( void )

Set an external digital clock as the Low Power clock.

Note: Call with interrupts disabled to ensure that CLK_CTRL_REG read/modify/write operation is not interrupted

◆ hw_clk_lp_set_rclp()

__STATIC_INLINE void hw_clk_lp_set_rclp ( void )

Set RCLP as the Low Power clock.

Warning: The RCLP must have been enabled before calling this function!

Note: Call with interrupts disabled to ensure that CLK_CTRL_REG read/modify/write operation is not interrupted

◆ hw_clk_lp_set_rcx()

__STATIC_INLINE void hw_clk_lp_set_rcx ( void )

Set RCX as the Low Power clock.

Warning: The RCX must have been enabled before calling this function!

Note: Call with interrupts disabled to ensure that CLK_CTRL_REG read/modify/write operation is not interrupted

◆ hw_clk_lp_set_xtal32k()

__STATIC_INLINE void hw_clk_lp_set_xtal32k ( void )

Set XTAL32K as the Low Power clock.

Warning: The XTAL32K must have been enabled before calling this function!

Note: Call with interrupts disabled to ensure that CLK_CTRL_REG read/modify/write operation is not interrupted

◆ hw_clk_lpclk_is()

__STATIC_INLINE bool hw_clk_lpclk_is ( lp_clk_is_t clk )

Check whether a clock is the Low Power clock.

Parameters

[in] clk The clock to check.

Returns: true if clk is the Low Power clock, else false.

◆ hw_clk_set_hclk_div()

__STATIC_FORCEINLINE void hw_clk_set_hclk_div ( ahb_div_t div )

Set the divider of the AMBA High Speed Bus.

Parameters

div	The AMBA High Speed Bus divider

◆ hw_clk_set_lpclk()

__STATIC_INLINE void hw_clk_set_lpclk ( lp_clk_is_t mode )

Set Low Power clock.

Parameters

[in] mode The new low power clock.

◆ hw_clk_set_pclk_div()

__STATIC_FORCEINLINE void hw_clk_set_pclk_div ( apb_div_t div )

Set the divider of the AMBA Peripheral Bus.

Parameters

div	The AMBA Peripheral Bus divider

◆ hw_clk_set_rclp_mode()

__STATIC_INLINE void hw_clk_set_rclp_mode ( rclp_mode_t mode )

Configure RCLP.

Parameters

[in] mode The mode of the RCLP.

◆ hw_clk_set_sysclk()

__STATIC_INLINE void hw_clk_set_sysclk ( sys_clk_is_t mode )

Set System clock.

Parameters

[in] mode The new system clock.

Note: System clock switch to Doubler is only allowed when current system clock is XTAL32M. System clock switch from Doubler is only allowed when new system clock is XTAL32M.

◆ hw_clk_set_xtalm_settling_time()

void hw_clk_set_xtalm_settling_time	(	uint8_t	cycles,
		bool	high_clock
	)

Set the XTAL32M settling time.

This function configures the start value and the clock (fast or slow) for the XTAL32M_READY IRQ counter.

Parameters

cycles	Number of clock cycles
high_clock	If true, use 250kHz clock (RC32M divided by 128), else use 31.25kHz clock (RC32M divided by 1024).

◆ hw_clk_start_calibration()

void hw_clk_start_calibration	(	cal_clk_t	clk_type,
		cal_ref_clk_t	clk_ref_type,
		uint16_t	cycles
	)

Start calibration of a clock.

Parameters

[in]	clk_type	The clock to be calibrated. Must be enabled.
[in]	clk_ref_type	The reference clock to USE.
[in]	cycles	The number of cycles of the to-be-calibrated clock to be measured using the reference clock.

Warning: If clk_ref_type == CALIBRATE_REF_EXT, the clk_type is not used. Instead, the value returned by hw_clk_get_calibration_data() is the number of clock cycles of DIVN counted during a single pulse of the EXT clock source used. The EXT clock source must be applied to a pin with a PID equal to HW_GPIO_FUNC_UART_RX

◆ hw_clk_xtalm_configure_cur_set()

int8_t hw_clk_xtalm_configure_cur_set ( void )

Configure XTAL32M current setting.

Find and apply optimum value for XTAL32M_TRIM_REGXTAL32M_CUR_SET (depends on crystal loss). This minimizes phase noise and ensures that the oscillation stays stable.

Returns: If >= 0 , the optimum current setting, else error (see warnings below)

Warning: The sys_clk should be set to RC32M (i.e. XTAL32M should not be used) when calling this function (hw_clk_disable_xtalm() is also called before returning). Otherwise, the function returns -1.; The amplitude regulator should not be in HOLD mode when calling this function. Otherwise, the function returns -2.

Note: This function should be called at startup before using XTAL32M, in case there is no optimum value for CUR_SET already stored in the Configuration Script.

◆ hw_clk_xtalm_configure_irq()

void hw_clk_xtalm_configure_irq ( void )

Configure XTAL32M IRQ counter start value.

Note: At startup, the XTAL32M IRQ counter must be calculated and stored in the respective register XTAL32M_IRQ_CTRL_REG->XTAL32M_IRQ_CNT. The calculation of the correct start value is based on the IRQ counter captured upon XTAL32M settling (i.e XTAL32M_IRQ_STAT_REG->XTAL32M_IRQ_COUNT_CAP), after trim and preferred settings have been applied. Given that the 32M crystal is enabled by the booter, the SDK must first disable it, then wait 10ms for the oscillation to stop completely, and finally re-enable it to achieve a valid IRQ counter calculation. If the XTAL32M is configured as the system clock, the function switches the system clock to RC32M before stopping the crystal. The function leaves the system clock switched to RC32M and XTAL32M settled.

◆ hw_clk_xtalm_irq_enable()

__STATIC_INLINE void hw_clk_xtalm_irq_enable ( void )

Enable XTAL32M interrupt generation.

Modules

Files

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ XTAL32M_USEC_TO_250K_CYCLES

◆ XTALRDY_CYCLES_TO_LP_CLK_CYCLES

Typedef Documentation

◆ cpu_clk_t

◆ rclp_mode_t

◆ sys_clk_t

Enumeration Type Documentation

◆ ahbdiv_type

◆ apbdiv_type

◆ cpu_clk_type

◆ rclp_mode_type

◆ sysclk_type

Function Documentation

◆ hw_clk_calibration_clear_irq()

◆ hw_clk_calibration_enable_irq()

◆ hw_clk_calibration_finished()

◆ hw_clk_calibration_status_irq()

◆ hw_clk_check_dblr_status()

◆ hw_clk_check_rc32_status()

◆ hw_clk_check_xtalm_status()

◆ hw_clk_configure_lpclk()

◆ hw_clk_dblr_sys_off()

◆ hw_clk_delay_usec()

◆ hw_clk_disable_lpclk()

◆ hw_clk_disable_rclp()

◆ hw_clk_disable_rcx()

◆ hw_clk_disable_sysclk()

◆ hw_clk_disable_xtal32k()

◆ hw_clk_enable_lpclk()

◆ hw_clk_enable_sysclk()

◆ hw_clk_get_calibration_data()

◆ hw_clk_get_hclk_div()

◆ hw_clk_get_lpclk()

◆ hw_clk_get_pclk_div()

◆ hw_clk_get_rclp_mode()

◆ hw_clk_get_sys_clk_freq()

◆ hw_clk_get_sysclk()

◆ hw_clk_get_sysclk_freq()

◆ hw_clk_get_system_clock()

◆ hw_clk_get_xtalm_settling_time()

◆ hw_clk_is_dblr_ready()

◆ hw_clk_is_enabled_sysclk()

◆ hw_clk_is_xtalm_started()

◆ hw_clk_lp_is_external()

◆ hw_clk_lp_is_rclp()

◆ hw_clk_lp_is_rcx()

◆ hw_clk_lp_is_xtal32k()

◆ hw_clk_lp_set_ext32k()

◆ hw_clk_lp_set_rclp()

◆ hw_clk_lp_set_rcx()

◆ hw_clk_lp_set_xtal32k()

◆ hw_clk_lpclk_is()

◆ hw_clk_set_hclk_div()

◆ hw_clk_set_lpclk()

◆ hw_clk_set_pclk_div()

◆ hw_clk_set_rclp_mode()

◆ hw_clk_set_sysclk()

◆ hw_clk_set_xtalm_settling_time()

◆ hw_clk_start_calibration()

◆ hw_clk_xtalm_configure_cur_set()

◆ hw_clk_xtalm_configure_irq()

◆ hw_clk_xtalm_irq_enable()