hw_pdc.h File Reference

Definition of API for the Power Domains Controller Low Level Driver. More...

#include <sdk_defs.h>

Go to the source code of this file.

Data Structures
struct	hw_pdc_entry_t
	PDC entry. More...
struct	hw_pdc_lut_keep_t
	PDC entries that will be kept after deep sleep. More...

Macros
#define	HW_PDC_LUT_ENTRY_FIELD_MASK(field)   (PDC_PDC_CTRL0_REG_##field##_Msk)
	Get the mask of a field of a PDC LUT entry. More...
#define	HW_PDC_LUT_ENTRY_FIELD_POS(field)   (PDC_PDC_CTRL0_REG_##field##_Pos)
	Get the bit position of a field of a PDC LUT entry. More...
#define	HW_PDC_LUT_ENTRY_FIELD_VAL(field, val)   (((val) << HW_PDC_LUT_ENTRY_FIELD_POS(field)) & HW_PDC_LUT_ENTRY_FIELD_MASK(field))
	Prepare (i.e. shift and mask) a value to be used for a PDC LUT entry field. More...

Enumerations
enum	HW_PDC_TRIG_SELECT { HW_PDC_TRIG_SELECT_P0_GPIO = 0, HW_PDC_TRIG_SELECT_P1_GPIO = 1, HW_PDC_TRIG_SELECT_PERIPHERAL = 2, HW_PDC_TRIG_SELECT_MASTER = 3 }
	Selects which wakeup source bank is selected as a trigger in a PDC LUT entry. More...
enum	HW_PDC_PERIPH_TRIG_ID {   HW_PDC_PERIPH_TRIG_ID_TIMER = 0x0, HW_PDC_PERIPH_TRIG_ID_TIMER2 = 0x1, HW_PDC_PERIPH_TRIG_ID_TIMER3_QDEC = 0x2, HW_PDC_PERIPH_TRIG_ID_TIMER4 = 0x3,   HW_PDC_PERIPH_TRIG_ID_RTC_ALARM = 0x4, HW_PDC_PERIPH_TRIG_ID_RTC_TIMER = 0x5, HW_PDC_PERIPH_TRIG_ID_MAC_TIMER = 0x6, HW_PDC_PERIPH_TRIG_ID_XTAL32MRDY = 0x8,   HW_PDC_PERIPH_TRIG_ID_RFDIAG = 0x9, HW_PDC_PERIPH_TRIG_ID_COMBO = 0xA, HW_PDC_PERIPH_TRIG_ID_FCU_IRQ = 0xC, HW_PDC_PERIPH_TRIG_ID_FAST_WKUP = 0xD,   HW_PDC_PERIPH_TRIG_ID_MASTERONLY = 0xF }
	Peripheral PDC trigger IDs. More...
enum	HW_PDC_MASTER { HW_PDC_MASTER_INVALID = 0, HW_PDC_MASTER_CM33 = 1, HW_PDC_MASTER_CMAC = 2 }
	PDC master IDs. More...
enum	HW_PDC_LUT_ENTRY_EN { HW_PDC_LUT_ENTRY_EN_COM = PDC_PDC_CTRL0_REG_EN_COM_Msk, HW_PDC_LUT_ENTRY_EN_PER = PDC_PDC_CTRL0_REG_EN_PER_Msk, HW_PDC_LUT_ENTRY_EN_TMR = PDC_PDC_CTRL0_REG_EN_TMR_Msk, HW_PDC_LUT_ENTRY_EN_XTAL = PDC_PDC_CTRL0_REG_EN_XTAL_Msk }
	PDC LUT entry enable bits. More...
enum	HW_PDC_ERROR
	PDC LLD error codes.
enum	HW_PDC_BLOCKED_TRIG { HW_PDC_RESET_BLOCKED_TRIGGERS = 0, HW_PDC_PD_SYS_BLOCKED = REG_MSK(PDC, PDC_CONFIG_REG, PD_SYS_WKUP_CONFIG), HW_PDC_PD_RAD_BLOCKED = REG_MSK(PDC, PDC_CONFIG_REG, PD_RAD_WKUP_CONFIG), HW_PDC_ALL_BLOCKED_EXCEPT_FCU = REG_MSK(PDC, PDC_CONFIG_REG, TRIG_SELECT_CONFIG) }
	blocked PDC triggers More...

Functions
__STATIC_INLINE uint32_t	hw_pdc_read_entry (uint32_t idx)
	Read value from specific PDC LUT index. More...
__RETAINED_CODE uint32_t	hw_pdc_add_entry (uint32_t lut_entry)
	Add a PDC LUT entry dynamically. More...
uint32_t	hw_pdc_remove_entry (uint32_t idx)
	Remove a dynamically added PDC LUT entry. More...
__STATIC_INLINE uint32_t	hw_pdc_get_pending (void)
	Get all PDC LUT entries pending for any master.
__STATIC_INLINE uint32_t	hw_pdc_get_pending_cm33 (void)
	Get all PDC LUT entries pending for CM33.
__STATIC_INLINE uint32_t	hw_pdc_get_pending_cmac (void)
	Get all PDC LUT entries pending for CMAC.
__STATIC_INLINE void	hw_pdc_acknowledge (uint32_t idx)
	Acknowledge a PDC LUT entry. More...
void	hw_pdc_write_entry (uint32_t idx, uint32_t value)
	Write a value in specific PDC LUT index. More...
__STATIC_INLINE HW_PDC_ERROR	hw_pdc_set_pending (uint32_t idx)
	Set a PDC LUT entry as pending. More...
__STATIC_FORCEINLINE bool	hw_pdc_is_pending (uint32_t idx)
	Check if a PDC LUT entry is pending. More...
void	hw_pdc_ack_all_pending_cm33 (void)
	Acknowledge all PDC LUT entries pending for CM33.
void	hw_pdc_lut_reset (void)
	Reset PDC Lookup table. More...
void	hw_pdc_lut_keep (hw_pdc_lut_keep_t *keep)
	Keep only the selected PDC Lookup table entries. More...
uint32_t	hw_pdc_find_entry (uint32_t trig_select, uint32_t trig_id, uint32_t wakeup_master, uint32_t flags, uint32_t start)
	Get the first PDC LUT entry index matching specific criteria. More...
__STATIC_FORCEINLINE void	hw_pdc_set_blocked_triggers (HW_PDC_BLOCKED_TRIG blocked)
	Set PDC configuration register. More...
__STATIC_FORCEINLINE HW_PDC_BLOCKED_TRIG	hw_pdc_get_blocked_triggers ()
	get PDC configuration register More...

Detailed Description

Definition of API for the Power Domains Controller Low Level Driver.

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