p_dll.h

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#ifndef _P_DLL_H_
#define _P_DLL_H_
 
/*************************************************************************/
/* INCLUDE FILES                                                         */
/*************************************************************************/
 
 
#include "dbg_dll.h"
#include "ic_specifics.h"
 
#ifndef __bool_true_false_are_defined
    #define __bool_true_false_are_defined 1
    #ifndef __cplusplus /* In C++, 'bool', 'true' and 'false' and keywords */
        #define bool char
        #define true 1
        #define false 0
    #else
        #ifdef __GNUC__
            /* GNU C++ supports direct inclusion of stdbool.h to provide C99
                compatibility by defining _Bool */
            #define BOOL bool
        #endif
    #endif
#endif /* __bool_true_false_are_defined */
 
#define P_DLL_EXPORTS
#ifdef P_DLL_EXPORTS
    #define P_DLL_API __declspec(dllexport)
#else
    #define P_DLL_API __declspec(dllimport)
#endif
 
#define PDLL_UART_BAUD_RATE             115200  
#define MAX_DEVS_TO_SCAN                16      
#define BD_ADDR_SIZE                    6       
#define LOG_PARAM_STR_SIZE              32      
#define TEST_NAME_STR_SIZE              13      
#define HCI_UART_LOOP_70x_DATA_SIZE     252     
#define RF_RSSI_TEST_TX_PACKETS         500     
#define TIMESTAMP_SIZE                  480     
typedef enum __PDLL_RETURN_CODES
{
    PDLL_SUCCESS = 0,
    PDLL_PARAMS_ERROR,
    PDLL_RX_TIMEOUT,
    PDLL_TX_TIMEOUT,
    PDLL_UNEXPECTED_EVENT,
    PDLL_CANNOT_ALLOCATE_MEMORY,
    PDLL_INTERNAL_ERROR,
    PDLL_THREAD_CREATION_ERROR,
 
    PDLL_DBG_DLL_ERROR,
    PDLL_INVALID_DBG_PARAMS,
 
    PDLL_COM_PORT_START,
    PDLL_COM_PORT_OK,
    PDLL_COM_PORT_FAILED,
 
    PDLL_FW_VERSION_GET_START,
    PDLL_FW_VERSION_GET_OK,
 
    PDLL_RDTESTER_INIT_START,
    PDLL_RDTESTER_INIT_OK,
 
    PDLL_RDTESTER_UART_CONNECT_START,
    PDLL_RDTESTER_UART_CONNECT_OK,
 
    PDLL_RDTESTER_UART_LOOPBACK_START,
    PDLL_RDTESTER_UART_LOOPBACK_OK,
 
    PDLL_RDTESTER_VBAT_UART_CNTRL_START,
    PDLL_RDTESTER_VBAT_UART_CNTRL_OK,
 
    PDLL_RDTESTER_VPP_CNTRL_START,
    PDLL_RDTESTER_VPP_CNTRL_OK,
 
    PDLL_RDTESTER_RST_PULSE_START,
    PDLL_RDTESTER_RST_PULSE_OK,
 
    PDLL_RDTESTER_UART_PULSE_START,
    PDLL_RDTESTER_UART_PULSE_OK,
 
    PDLL_RDTESTER_XTAL_PULSE_START,
    PDLL_RDTESTER_XTAL_PULSE_OK,
 
    PDLL_RDTESTER_PULSE_WIDTH_START,
    PDLL_RDTESTER_PULSE_WIDTH_OK,
 
    PDLL_RDTESTER_VBAT_CNTRL_START,
    PDLL_RDTESTER_VBAT_CNTRL_OK,
 
    PDLL_RDTESTER_VBAT_UART_RST_CNTRL_START,
    PDLL_RDTESTER_VBAT_UART_RST_CNTRL_OK,
    PDLL_RDTESTER_INVALID_COMMAND,
 
    PDLL_XTAL_TRIM_START,
    PDLL_XTAL_TRIM_OK,
    PDLL_XTAL_TRIM_OUT_OF_RANGE,
    PDLL_XTAL_TRIM_FREQ_CAL_NOT_CONNECTED,
    PDLL_XTAL_TRIM_WRITE_FAILED,
 
    PDLL_XTAL_TRIM_READ_START,
    PDLL_XTAL_TRIM_READ_OK,
 
    PDLL_UART_RESYNC_START,
    PDLL_UART_RESYNC_OK,
    PDLL_UART_RESYNC_FAILED,
 
    PDLL_CONT_PKT_TX_START,
    PDLL_CONT_PKT_TX_STARTED_OK,
 
    PDLL_HCI_TEST_STOP_START,
    PDLL_HCI_TEST_STOPPED_OK,
 
    PDLL_PKT_TX_START,
    PDLL_PKT_TX_STARTED_OK,
    PDLL_PKT_TX_ENDED_OK,
 
    PDLL_PKT_RX_STATS_START,
    PDLL_PKT_RX_STATS_STARTED_OK,
 
    PDLL_PKT_RX_STATS_STOP_START,
    PDLL_PKT_RX_STATS_STOPPED_OK,
 
    PDLL_PKT_RX_START,
    PDLL_PKT_RX_STARTED_OK,
 
    PDLL_CUSTOM_ACTION_START,
    PDLL_CUSTOM_ACTION_OK,
 
    PDLL_BLE_SCAN_START,
    PDLL_BLE_SCAN_OK,
 
    PDLL_BLE_ADV_START,
    PDLL_BLE_ADV_START_OK,
 
    PDLL_BLE_ADV_STOP_START,
    PDLL_BLE_ADV_STOPPED_OK,
 
    PDLL_AUDIO_TONE_START,
    PDLL_AUDIO_TONE_STARTED_OK,
 
    PDLL_AUDIO_TONE_STOP,
    PDLL_AUDIO_TONE_STOPPED_OK,
 
    PDLL_AUDIO_TEST_START,
    PDLL_AUDIO_TEST_ALREADY_ACTIVE,
    PDLL_AUDIO_TEST_STARTED_OK,
 
    PDLL_AUDIO_TEST_STOP,
    PDLL_AUDIO_TEST_STOPPED_OK,
 
    PDLL_AUDIO_TEST_PASSED,
    PDLL_AUDIO_TEST_FAILED,
    PDLL_AUDIO_TEST_INVALID_COMMAND,
 
    PDLL_GPIO_TOGGLE_START,
    PDLL_GPIO_TOGGLE_ERROR,
    PDLL_GPIO_TOGGLE_FINISHED_OK,
 
    PDLL_GPIO_SET_START,
    PDLL_GPIO_SET_ERROR,
    PDLL_GPIO_SET_FINISHED_OK,
 
    PDLL_GPIO_GET_START,
    PDLL_GPIO_GET_ERROR,
    PDLL_GPIO_GET_FINISHED_OK,
 
    PDLL_GPIO_WD_START,
    PDLL_GPIO_WD_ERROR,
    PDLL_GPIO_WD_OK,
 
    PDLL_SENSOR_TEST_START,
    PDLL_SENSOR_TEST_OK,
 
    PDLL_SLEEP_START,
    PDLL_SLEEP_OK,
 
    PDLL_UART_LOOP_START,
    PDLL_UART_LOOP_FAILED,
    PDLL_UART_LOOP_OK,
 
    PDLL_EXT32Khz_TEST_START,
    PDLL_EXT32Khz_TEST_FAILED,
    PDLL_EXT32Khz_TEST_OK,
 
    PDLL_ADC_VBAT_START,
    PDLL_ADC_VBAT_OK,
 
    PDLL_SET_TX_PWR_START,
    PDLL_SET_TX_PWR_OK,
 
    PDLL_TIMESTAMP_RD_START,
    PDLL_TIMESTAMP_RD_OK,
 
    PDLL_RESET_MODE_START,
    PDLL_RESET_MODE_OK,
}PDLL_RET;
 
 
#define PDLL_HCI_STANDARD_ERROR_CODE_BASE       1000
typedef enum __pdll_test_id
{
    dut_com_init                = 0,    
    cont_pkt_tx                 = 1,    
    pkt_tx                      = 2,    
    stop_pkt_tx                 = 3,    
    start_pkt_rx_stats          = 4,    
    stop_pkt_rx_stats           = 5,    
    custom_test                 = 6,    
    xtal_trim                   = 7,    
    xtal_trim_val_read          = 8,    
    scan_test                   = 9,    
    rdtester_init               = 10,   
    rdtester_uart_connect       = 11,   
    rdtester_uart_loop          = 12,   
    rdtester_vbat_uart_ctrl     = 13,   
    rdtester_vpp_ctrl           = 14,   
    rdtester_rst_pulse          = 15,   
    rdtester_xtal_pulse_uart    = 16,   
    rdtester_xtal_pulse         = 17,   
    rdtester_pulse_width        = 18,   
    rdtester_vbat_ctrl          = 19,   
    rdtester_vbat_uart_rst_ctrl = 20,   
    uart_resync                 = 21,   
    audio_test                  = 22,   
    audio_tone                  = 23,   
    gpio_toggle                 = 24,   
    gpio_set                    = 25,   
    gpio_get                    = 26,   
    gpio_wd                     = 27,   
    sensor_test                 = 28,   
    sleep                       = 29,   
    uart_loop                   = 30,   
    ble_adv_start               = 31,   
    ble_adv_stop                = 32,   
    ext32Khz_test               = 33,   
    adc_vbat                    = 34,   
    set_tx_pwr                  = 36,   
    timestamp_rd                = 37,   
    INVALID_TEST                = 38    
}_pdll_test_id;
 
typedef enum __payload_type
{
    TX_TYPE_PSEUDO_RAND_9 = 0,
    TX_TYPE_ALT_BITS_1100,
    TX_TYPE_ALT_BITS_10,
    TX_TYPE_PSEUDO_RAND_15,
    TX_TYPE_ALL_BITS_1,
    TX_TYPE_ALL_BITS_0,
    TX_TYPE_ALT_BITS_0011,
    TX_TYPE_ALT_BITS_0101,
    INVALID_TX_PAYLOAD_TYPE
}_payload_type;
 
typedef enum __audio_test_op
{
    AUDIO_TEST_START = 1,
    AUDIO_TEST_STOP,
    INVALID_AUDIO_TEST
}_audio_test_op;
 
typedef enum __audio_tone_op
{
    AUDIO_TONE_START = 1,
    AUDIO_TONE_STOP,
    INVALID_AUDIO_TONE_OP
}_audio_tone_op;
 
typedef enum __sensor_iface
{
    SENSOR_IFACE_SPI = 0,
    SENSOR_IFACE_I2C,
    INVALID_SENSOR_IFACE
}_sensor_iface;
 
typedef enum __gpio_state
{
    GPIO_STATE_LOW = 0,
    GPIO_STATE_HIGH,
    INVALID_GPIO_STATE
}_gpio_state;
 
typedef enum __gpio_pwr_lvl
{
    GPIO_LVL_3V3 = 0,
    GPIO_LVL_1V8,
    INVALID_GPIO_LVL
}_gpio_pwr_lvl;
 
typedef enum __gpio_mode
{
    GPIO_MODE_INPUT = 0,
    GPIO_MODE_INPUT_PULLUP = 1,
    GPIO_MODE_INPUT_PULLDOWN = 2,
    GPIO_MODE_OUTPUT = 3,
    GPIO_MODE_OUTPUT_PUSH_PULL = 4,
    GPIO_MODE_OUTPUT_OPEN_DRAIN = 5,
    INVALID_GPIO_MODE
}_gpio_mode;
 
typedef enum __sleep_modes
{
    NO_SLEEP = 0,
    EXTENDED_SLEEP,
    DEEP_SLEEP,
    INVALID_SLEEP_MODE
}_sleep_modes;
 
typedef enum __baud_rate
{
    UART_BAUDRATE_9K6 = 0,
    UART_BAUDRATE_19K2,
    UART_BAUDRATE_57K6,
    UART_BAUDRATE_115K2,
    UART_BAUDRATE_1M,
    UART_BAUDRATE_2M,
}_baud_rate;
 
typedef enum __adv_channel
{
    ADV_CH37= 0x01,
    ADV_CH38 = 0x02,
    ADV_CH39 = 0x04,
    ADV_ALLCH= 0x07
}_adv_channel;
 
typedef enum __pdll_tx_pwr_lvl
{
    RF_TX_PWR_LVL_MIN_VAL       = 0U,       // -50 dBm
    RF_TX_PWR_LVL_MINUS_50d0    = 0U,       // -50 dBm
    RF_TX_PWR_LVL_MINUS_18d0    = 1U,       // -18 dBm
    RF_TX_PWR_LVL_MINUS_12d0    = 2U,       // -12 dBm
    RF_TX_PWR_LVL_MINUS_8d0     = 3U,       // -8 dBm
    RF_TX_PWR_LVL_MINUS_6d0     = 4U,       // -6 dBm
    RF_TX_PWR_LVL_MINUS_3d0     = 5U,       // -3 dBm
    RF_TX_PWR_LVL_MINUS_2d0     = 6U,       // -2 dBm
    RF_TX_PWR_LVL_MINUS_1d0     = 7U,       // -1 dBm
    RF_TX_PWR_LVL_0d0           = 8U,       // 0 dBm
    RF_TX_PWR_LVL_PLUS_1d5      = 9U,       // +1.5 dBm
    RF_TX_PWR_LVL_PLUS_2d0      = 10U,      // +2 dBm
    RF_TX_PWR_LVL_PLUS_3d0      = 11U,      // +3 dBm
    RF_TX_PWR_LVL_PLUS_4d0      = 12U,      // +4 dBm
    RF_TX_PWR_LVL_PLUS_4d5      = 13U,      // +4.5 dBm
    RF_TX_PWR_LVL_PLUS_5d0      = 14U,      // +5 dBm
    RF_TX_PWR_LVL_PLUS_6d0      = 15U,      // +6 dBm
}_pdll_tx_pwr_lvl;
 
typedef enum __pdll_adv_tx_pwr_lvl
{
    GAP_TX_POWER_MIN            = 0U,       // -50 dBm
    GAP_TX_POWER_MINUS_50_dBm   = 0U,       // -50 dBm
    GAP_TX_POWER_MINUS_26_dBm   = 1U,       // -26 dBm
    GAP_TX_POWER_MINUS_22_dBm   = 2U,       // -22 dBm
    GAP_TX_POWER_MINUS_18_dBm   = 3U,       // -18 dBm
    GAP_TX_POWER_MINUS_12_dBm   = 4U,       // -12 dBm
    GAP_TX_POWER_MINUS_8_dBm    = 5U,       // -8 dBm
    GAP_TX_POWER_MINUS_6_dBm    = 6U,       // -6 dBm
    GAP_TX_POWER_MINUS_3_dBm    = 7U,       // -3 dBm
    GAP_TX_POWER_MINUS_2_dBm    = 8U,       // -2 dBm
    GAP_TX_POWER_MINUS_1_dBm    = 9U,       // -1 dBm
    GAP_TX_POWER_0_dBm          = 10U,      // 0 dBm
    GAP_TX_POWER_1_5_dBm        = 11U,      // +1.5 dBm
    GAP_TX_POWER_2_dBm          = 12U,      // +2 dBm
    GAP_TX_POWER_3_dBm          = 13U,      // +3 dBm
    GAP_TX_POWER_4_dBm          = 14U,      // +4 dBm
    GAP_TX_POWER_4_5_dBm        = 15U,      // +4.5 dBm
    GAP_TX_POWER_5_dBm          = 16U,      // +5 dBm
    GAP_TX_POWER_6_dBm          = 17U,      // +6 dBm
    GAP_TX_POWER_MAX            = 17U,      // +6 dBm
}_pdll_adv_tx_pwr_lvl;
 
typedef struct __pdll_fw_versions
{
    char                prod_test_gu_app_fw_ver[LOG_PARAM_STR_SIZE]; 
    char                prod_test_gu_ble_fw_ver[LOG_PARAM_STR_SIZE]; 
    char                prod_test_app_fw_ver[LOG_PARAM_STR_SIZE];    
    char                prod_test_ble_fw_ver[LOG_PARAM_STR_SIZE];    
    char                pdll_ver[LOG_PARAM_STR_SIZE];                
}_pdll_fw_versions;
 
typedef struct __gu_scan_data
{
    uint8_t             bd_addr_found[BD_ADDR_SIZE];    
    float               rssi;                           
}_gu_scan_data;
 
typedef struct __rx_stats
{
    uint32_t            pkts_crc_ok;                    
    uint32_t            pkts_sync_err;                  
    uint32_t            pkts_crc_err;                   
    uint32_t            xtal_trim_val;                  
    uint16_t            audio_pwr_lvl;                  
    uint32_t            custom_data;                    
    float               rssi;                           
    _gu_scan_data       gu_scan_data[MAX_DEVS_TO_SCAN]; 
    uint8_t             timestamp[TIMESTAMP_SIZE];      
    _pdll_fw_versions   pdll_fw_versions;               
}_rx_stats;
 
typedef void (*_user_callback_pdll) (uint32_t com_port_number, int status, _rx_stats *rx_stats_t);
 
 
typedef struct __pdll_rf_test
{
    _pdll_test_id       test_id;                        
    uint32_t            freq;                           
    _payload_type       payload_type;                   
}_pdll_rf_test;
 
typedef struct __pdll_audio_test
{
    _pdll_test_id       test_id;                        
    _audio_test_op      test_op;                        
    uint16_t            pwr_lvl_lim;                    
}_pdll_audio_test;
 
typedef struct __pdll_audio_tone
{
    _pdll_test_id       test_id;                        
    _audio_tone_op      tone_op;                        
}_pdll_audio_tone;
 
typedef struct __pdll_gpio_toggle
{
    _pdll_test_id       test_id;                        
    _ic_gpio            gpio;                           
    uint16_t            time_low;                       
    uint16_t            time_high;                      
    uint16_t            retries;                        
    _gpio_pwr_lvl       pwr_lvl;                        
}_pdll_gpio_toggle;
 
typedef struct __pdll_gpio_watchdog
{
    _pdll_test_id       test_id;                        
    _ic_gpio            gpio;                           
    _gpio_pwr_lvl       pwr_lvl;                        
}_pdll_gpio_watchdog;
 
typedef struct __pdll_gpio_set
{
    _pdll_test_id       test_id;                        
    _ic_gpio            gpio;                           
    _gpio_mode          mode;                           
    bool                level;                          
    _gpio_pwr_lvl       pwr_lvl;                        
    uint8_t             pwm;                            
    uint8_t             pwm_duty;                       
}_pdll_gpio_set;
 
typedef struct __pdll_gpio_get
{
    _pdll_test_id       test_id;                        
    _ic_gpio            gpio;                           
}_pdll_gpio_get;
 
typedef struct __pdll_custom_test
{
    _pdll_test_id       test_id;                        
    uint8_t             data;                           
}_pdll_custom_test;
 
typedef struct __pdll_rdtester_init
{
    _pdll_test_id       test_id;                        
    uint8_t             version;                        
    uint8_t             rst_polarity;                   
}_pdll_rdtester_init;
 
typedef struct __pdll_rdtester_vbat_uart_rst
{
    _pdll_test_id       test_id;                         
    uint16_t            data;                            
    uint8_t             rst_polarity;                    
    uint16_t            rst_pulse_ms;                    
}_pdll_rdtester_vbat_uart_rst;
 
typedef struct __pdll_rdtester_rst
{
    _pdll_test_id       test_id;                        
    uint8_t             rst_polarity;                   
    uint16_t            rst_pulse_ms;                   
}_pdll_rdtester_rst;
 
typedef struct __pdll_rdtester
{
    _pdll_test_id       test_id;                          
    uint16_t            data;                             
}_pdll_rdtester;
 
typedef struct __pdll_scan_test
{
    _pdll_test_id       test_id;                                            
    uint8_t             periph_bd_addr[MAX_DEVS_TO_SCAN][BD_ADDR_SIZE];     
}_pdll_scan_test;
 
typedef struct __pdll_xtal_test
{
    _pdll_test_id       test_id;                            
    _ic_gpio            trim_gpio;                          
}_pdll_xtal_test;
 
typedef struct __pdll_sensor_test
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
    char                name[TEST_NAME_STR_SIZE];           
    _sensor_iface       iface;                              
    bool                write;                              
    _ic_gpio            spi_clk;                            
    _ic_gpio            spi_di;                             
    _ic_gpio            spi_do;                             
    _ic_gpio            spi_cs;                             
    _ic_gpio            i2c_scl;                            
    _ic_gpio            i2c_sda;                            
    uint8_t             reg_addr;                           
    uint8_t             wr_data;                            
    uint8_t             i2c_slave_addr;                     
    bool                int_gpio_check;                     
    _ic_gpio            int_gpio;                           
    uint8_t             valid_data;                         
    _gpio_pwr_lvl       pwr_lvl;                            
}_pdll_sensor_test;
 
typedef struct __pdll_sleep_test
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
    _sleep_modes        sleep_mode;                         
    uint32_t            seconds;                            
}_pdll_sleep_test;
 
typedef struct __pdll_uart_loop_test
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
    _baud_rate          baud_rate;                          
    uint32_t            times;                              
}_pdll_uart_loop_test;
 
typedef struct __pdll_ble_adv_start_test
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
    uint8_t             delay_ms;                           
    _pdll_tx_pwr_lvl    rf_tx_pwr_lvl;                      
    _adv_channel        adv_channel;                        
    uint8_t             bd_addr[BD_ADDR_SIZE];              
}_pdll_ble_adv_start_test;
 
typedef struct __pdll_ble_adv_stop_test
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
}_pdll_ble_adv_stop_test;
 
typedef struct __pdll_ext32Khz_test
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
}_pdll_ext32Khz_test;
 
typedef struct __pdll_adc_vbat_en
{
    _pdll_test_id       test_id;                            
    bool                en;                                 
}_pdll_adc_vbat_en;
 
typedef struct __pdll_set_tx_pwr
{
    _pdll_test_id       test_id;                            
    _pdll_tx_pwr_lvl    rf_tx_pwr_lvl;                      
}_pdll_set_tx_pwr;
 
typedef union __pdll_test_data
{
    _pdll_test_id                   id;                     
    _pdll_rf_test                   rf;                     
    _pdll_audio_test                audio;                  
    _pdll_audio_tone                audio_tone;             
    _pdll_custom_test               custom;                 
    _pdll_rdtester_init             rdtester_init;          
    _pdll_rdtester_vbat_uart_rst    rdtester_vbat_uart_rst; 
    _pdll_rdtester_rst              rdtester_rst;           
    _pdll_rdtester                  rdtester;               
    _pdll_scan_test                 scan;                   
    _pdll_xtal_test                 xtal_trim;              
    _pdll_gpio_toggle               gpio_toggle;            
    _pdll_gpio_get                  gpio_get;               
    _pdll_gpio_set                  gpio_set;               
    _pdll_sensor_test               sensor;                 
    _pdll_sleep_test                sleep;                  
    _pdll_gpio_watchdog             gpio_wd;                
    _pdll_uart_loop_test            uart_loop;              
    _pdll_ble_adv_start_test        ble_adv_start;          
    _pdll_ble_adv_stop_test         ble_adv_stop;           
    _pdll_ext32Khz_test             ext32Khz_test;          
    _pdll_adc_vbat_en               adc_vbat_en;            
    _pdll_set_tx_pwr                set_tx_pwr;             
}_pdll_test_data;
 
typedef struct __pdll_device
{
    bool                            is_active;              
    _dut_ic                         dut_ic;                 
    uint32_t                        com_port;               
    uint32_t                        baud_rate;              
    _user_callback_pdll             clbck;                  
    _pdll_test_data                 test;                   
    bool                            is_GU;                  
}_pdll_device;
 
#ifdef __cplusplus                                          // If used by C++ code,
extern "C" {                                                // we need to export the C interface
#endif
P_DLL_API PDLL_RET pdll_dbg_init(const _dbg_params *dbg_params_t);
 
P_DLL_API PDLL_RET pdll_dbg_close(void);
 
P_DLL_API PDLL_RET pdll_init(void);
 
P_DLL_API PDLL_RET pdll_set_device_params(const _pdll_device *dev);
 
P_DLL_API PDLL_RET pdll_perform_test(_pdll_test_id test_id);
 // @defgroup pdll_funcs
 
#ifdef __cplusplus
}
#endif // @defgroup pdll_api
 
#endif /* _P_DLL_H_ */