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Macros | |
Maximum payload for a Write Instruction | |
| #define | PTX_NSC_HAL_PAYLOAD_LENGTH_WI_MAX (252u) |
Masks for write and read operations | |
| #define | PTX_NSC_HAL_WRITE_INSTRUCTION_MASK (0x04u) |
| #define | PTX_NSC_HAL_WRITE_RANDOM_ADDRESS_MASK (0x05u) |
| #define | PTX_NSC_HAL_READ_BUFFER_MASK (0x03u) |
| #define | PTX_NSC_HAL_WRITE_BUFFER_MASK (0x07u) |
| #define | PTX_NSC_HAL_READ_RANDOM_ADDRESS_MASK (0x01u) |
| #define | PTX_NSC_HAL_READ_CONTINUOUS_ADDRESS_MASK (0x02u) |
| #define | PTX_NSC_HAL_WRITE_CONTINUOUS_ADDRESS_MASK (0x06u) |
| #define | PTX_NSC_HAL_BUFFER_ADDRESS_MASK (0x1Fu) |
Masks for map addresses | |
| #define | PTX_NSC_HAL_ADDRESS_RAM_INITIAL (0x0000u) |
| #define | PTX_NSC_HAL_ADDRES_RAM_END (0x0FFFu) |
| #define | PTX_NSC_HAL_ADDRESS_SFR_INITIAL (0x1000u) |
| #define | PTX_NSC_HAL_ADDRES_SFR_END (0x10FFu) |
Functions | |
| ptxStatus_t | ptxNSC_Hal_WriteBuffer_Async (struct ptxNSC *nscCtx, uint8_t addressOfBuffer, uint8_t *pPayload, size_t txLen) |
| Do a write buffer operation on the chip. | |
| ptxStatus_t | ptxNSC_Hal_WriteRawData (struct ptxNSC *nscCtx, uint8_t *pPayload, size_t txLen) |
| Send raw data directly to the chip. Do a Write Buffer operation. | |
| ptxStatus_t | ptxNSC_Hal_WriteInstruction_Synchronous (struct ptxNSC *nscCtx, uint16_t address, uint8_t *pPayload, size_t txLen) |
| Do a Write Instruction operation on the chip and wait for the ACK (0x00). This function stop the receiving thread so it works in HW_CONTROL_MODE. | |
| ptxStatus_t | ptxNSC_Hal_WRA (struct ptxNSC *nscCtx, uint16_t address, uint8_t value) |
| ptxStatus_t | ptxNSC_Hal_WRA_HwAck (struct ptxNSC *nscCtx, uint16_t address, uint8_t value) |
| ptxStatus_t | ptxNSC_Hal_WriteRandomAddressMulti_Synchronous (struct ptxNSC *nscCtx, ptxTypes_WRA_t *pWRA) |
| ptxStatus_t | ptxNSC_Hal_WriteContinuousAddress_Synchronous (struct ptxNSC *nscCtx, uint16_t address, uint8_t *value, size_t length) |
| ptxStatus_t | ptxNSC_Hal_WriteBuffer_Synchronous (struct ptxNSC *nscCtx, uint8_t addressOfBuffer, uint8_t *pPayload, size_t txLen) |
| ptxStatus_t | ptxNSC_Hal_ReadRandomAddress_Synchronous (struct ptxNSC *nscCtx, uint16_t address, uint8_t *value) |
| ptxStatus_t | ptxNSC_Hal_WriteInstruction_Framing (struct ptxNSC *nscCtx, uint16_t address, uint8_t *pPayload, size_t txLen) |
| Split the payload to write to memory program in chunks of 252 B and update memory address accordingly. This function call ptxNSC_Hal_WriteRawData as many times as needed accordingly to the length of payload. | |
| ptxStatus_t | ptxNSC_Hal_ReadBuffer_Synchronous (struct ptxNSC *nscCtx, uint8_t *payload, size_t *length) |
| ptxStatus_t | ptxNSC_Hal_ReadContinuousAddress_Synchronous (struct ptxNSC *nscCtx, uint16_t address, size_t length, uint8_t *bytesReceived) |
| ptxHal_InterfaceType_t | ptxNSC_Hal_GetActiveIfType (struct ptxNSC *nscCtx) |
| Wrapper function used to get the Active Interface at Hal. | |
| ptxStatus_t | ptxNSC_Hal_Cancel (struct ptxNSC *nscCtx) |
| Wrapper function used to call Cancel Operation at Hal. | |
| ptxStatus_t | ptxNSC_Hal_TRx (struct ptxNSC *nscCtx, uint8_t *txBuf[], size_t txLen[], size_t numBuffers, uint8_t *rxBuf, size_t *rxLen) |
| Wrapper function used to call Trx at Hal. | |
Detailed Description
SPDX-License-Identifier: BSD-3-Clause
Copyright (c) 2026, Renesas Electronics Corporation and/or its affiliates
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
- Neither the name of Renesas nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY Renesas "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RENESAS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Project : PTX1K Module : HAL (Hardware Abstraction Layer) File : ptxNSC_Hal.h
Description : Definition of NSC HAL intermediate layer which implements PTX Host Interface (HIF) Protocol.
